xilskey: Added Xilskey write and read regs APIs

Modified CRC calculation API to calculate CRC of
ZynqMP efuse PS's AES CRC.
Added Ceil function to calculate ceil.
Added write and read registers APIs.
Modified Xilskey_CrcCalculation API to
XilSKey_CrcCalculation

Signed-off-by: VNSL Durga <vnsldurg@xilinx.com>
Reviewed-by: Harini Katakam <harinik@xilinx.com>
This commit is contained in:
VNSL Durga 2015-10-10 16:37:56 +05:30 committed by Nava kishore Manne
parent 66a63c151b
commit 72073f36fe
7 changed files with 110 additions and 23 deletions

View file

@ -314,7 +314,7 @@ u32 XilSKey_EfusePl_ReadStatus(XilSKey_EPl *InstancePtr, u32 *StatusBits);
u32 XilSKey_EfusePl_ReadKey(XilSKey_EPl *InstancePtr);
u32 Xilskey_CrcCalculation(u8 *Key);
u32 XilSKey_CrcCalculation(u8 *Key);
#ifdef __cplusplus
}

View file

@ -52,8 +52,11 @@
* XSK_EFUSEPL_RSA_KEY_HASH_STRING_SIZE
* Added efuse functionality for Ultrascale.
* 4.0 vns 10/01/15 Added efuse functionality for ZynqMp platform.
* Added Xsk_Ceil API. Added error code for efuse and
* Added XilSKey_Ceil API. Added error code for efuse and
* bbram PS for Zynq MP.
* Modified Xilskey_CrcCalculation API name to
* XilSKey_CrcCalculation. and Xilskey_Timer_Intialise API
* to XilSKey_Timer_Intialise
*
*****************************************************************************/
@ -528,8 +531,46 @@ typedef enum {
#define XSK_EFUSEPS_ERROR_READ_VCCINT_VOLTAGE_OUT_OF_RANGE XSK_EFUSEPS_ERROR_READ_VCCPINT_VOLTAGE_OUT_OF_RANGE
#define XSK_EFUSEPS_ERROR_WRITE_VCCAUX_VOLTAGE_OUT_OF_RANGE XSK_EFUSEPS_ERROR_WRITE_VCCPAUX_VOLTAGE_OUT_OF_RANGE
#define XSK_EFUSEPS_ERROR_WRITE_VCCINT_VOLTAGE_OUT_OF_RANGE XSK_EFUSEPS_ERROR_WRITE_VCCPINT_VOLTAGE_OUT_OF_RANGE
#define XilSKey_CrcCalculation XilSKey_CrcCalculation
#define Xilskey_Timer_Intialise XilSKey_Timer_Intialise
/*****************************************************************************/
/**
*
* This macro reads the given register.
*
* @param BaseAddress is the Xilinx base address of the eFuse or Bbram
* controller.
* @param RegOffset is the register offset of the register.
*
* @return The 32-bit value of the register.
*
* @note C-style signature:
* u32 XilSKey_ReadReg(u32 BaseAddress, u32 RegOffset)
*
******************************************************************************/
#define XilSKey_ReadReg(BaseAddress, RegOffset) \
Xil_In32((BaseAddress) + (u32)(RegOffset))
/*****************************************************************************/
/**
*
* This macro writes the value into the given register.
*
* @param BaseAddress is the Xilinx base address of the eFuse or Bbram
* controller.
* @param RegOffset is the register offset of the register.
* @param Data is the 32-bit value to write to the register.
*
* @return None.
*
* @note C-style signature:
* void XilSKey_WriteReg(u32 BaseAddress, u32 RegOffset, u32 Data)
*
******************************************************************************/
#define XilSKey_WriteReg(BaseAddress, RegOffset, Data) \
Xil_Out32(((BaseAddress) + (u32)(RegOffset)), (u32)(Data))
/************************** Function Prototypes *****************************/
u32 XilSKey_EfusePs_XAdcInit (void );
@ -549,10 +590,11 @@ u32 XilSKey_Efuse_IsValidChar(const char *c);
u32 XilSKey_Efuse_ConvertStringToHexLE(const char * Str, u8 * Buf, u32 Len);
u32 XilSKey_Efuse_ConvertStringToHexBE(const char * Str, u8 * Buf, u32 Len);
u32 XilSKey_Efuse_ValidateKey(const char *Key, u32 Len);
u32 Xilskey_Timer_Intialise();
u32 Xilskey_Efuse_ReverseHex(u32 Input);
void Xilskey_StrCpyRange(u8 *Src, u8 *Dst, u32 From, u32 To);
u32 Xilskey_CrcCalculation(u8 *Key);
u32 XilSKey_Timer_Intialise();
u32 XilSKey_Efuse_ReverseHex(u32 Input);
void XilSKey_StrCpyRange(u8 *Src, u8 *Dst, u32 From, u32 To);
u32 XilSKey_CrcCalculation(u8 *Key);
u32 XilSKey_Ceil(float Freq);
/***************************************************************************/

View file

@ -111,7 +111,7 @@ int XilSKey_Bbram_Program(XilSKey_Bbram *InstancePtr)
}
/* Get timer values */
RefClk = Xilskey_Timer_Intialise();
RefClk = XilSKey_Timer_Intialise();
/*
* Initialize and start the timer
*/

View file

@ -388,7 +388,7 @@ u32 XilSKey_EfusePl_Program(XilSKey_EPl *InstancePtr)
#ifdef XSK_ARM_PLATFORM
u32 RefClk;
RefClk = Xilskey_Timer_Intialise();
RefClk = XilSKey_Timer_Intialise();
/**
* Return error if the reference clock frequency is not in
* between 20 & 60MHz
@ -411,7 +411,7 @@ u32 XilSKey_EfusePl_Program(XilSKey_EPl *InstancePtr)
return (XSK_EFUSEPL_ERROR_XADC + ErrorCode);
}
#else
if (Xilskey_Timer_Intialise() == XST_FAILURE) {
if (XilSKey_Timer_Intialise() == XST_FAILURE) {
return (XSK_EFUSEPL_ERROR_TIMER_INTIALISE_ULTRA);
}
#endif
@ -1159,7 +1159,7 @@ u32 XilSKey_EfusePl_ReadStatus(XilSKey_EPl *InstancePtr, u32 *StatusBits)
/**
* Initialize the variables
*/
RefClk = Xilskey_Timer_Intialise();
RefClk = XilSKey_Timer_Intialise();
/**
* Return error if the reference clock frequency is not in
@ -1279,7 +1279,7 @@ u32 XilSKey_EfusePl_ReadKey(XilSKey_EPl *InstancePtr)
#ifdef XSK_ARM_PLATFORM
u32 RefClk;
RefClk = Xilskey_Timer_Intialise();
RefClk = XilSKey_Timer_Intialise();
/**
* Return error if the reference clock frequency is not in

View file

@ -108,7 +108,7 @@ u32 XilSKey_EfusePs_Write(XilSKey_EPs *InstancePtr)
return XSK_EFUSEPS_ERROR_PS_STRUCT_NULL;
}
RefClk = Xilskey_Timer_Intialise();
RefClk = XilSKey_Timer_Intialise();
/**
* Check the variables
@ -347,7 +347,7 @@ u32 XilSKey_EfusePs_Read(XilSKey_EPs *InstancePtr)
InstancePtr->RsaKeyReadback[Index] = 0;
}
RefClk = Xilskey_Timer_Intialise();
RefClk = XilSKey_Timer_Intialise();
/**
* Check the variables

View file

@ -2244,7 +2244,7 @@ void JtagRead_Status_Ultrascale(u32 *Rowdata)
RowDataPtr[2] = RdBuffer [2];
RowDataPtr[3] = RdBuffer [3];
*(u32 *)RowDataPtr = Xilskey_Efuse_ReverseHex(*(u32 *)RowDataPtr);
*(u32 *)RowDataPtr = XilSKey_Efuse_ReverseHex(*(u32 *)RowDataPtr);
}

View file

@ -48,6 +48,9 @@
* 3.00 vns 31/07/15 Added efuse functionality for Ultrascale.
* 4.0 vns 10/01/15 Modified condtional compilation
* to support ZynqMp platform also.
* Added new API Xsk_Ceil
* Modified Xilskey_CrcCalculation() API for providing
* support for efuse ZynqMp also.
*
*****************************************************************************/
@ -74,7 +77,7 @@ u32 TimerTicksfor500ns; /**< Global Variable for 5 micro secs for microblaze */
/************************** Function Prototypes *****************************/
static u32 XilSKey_EfusePs_ConvertCharToNibble (char InChar, u8 *Num);
extern void Jtag_Read_Sysmon(u8 Row, u32 *Row_Data);
static u32 Xilskey_RowCrcCalculation(u32 PrevCRC, u32 Data, u32 Addr);
u32 XilSKey_RowCrcCalculation(u32 PrevCRC, u32 Data, u32 Addr);
/***************************************************************************/
/**
* This function is used to initialize the XADC driver
@ -812,7 +815,7 @@ u32 XilSKey_Efuse_IsValidChar(const char *c)
* @note None.
*
****************************************************************************/
u32 Xilskey_Timer_Intialise()
u32 XilSKey_Timer_Intialise()
{
u32 RefClk;
@ -885,7 +888,7 @@ u32 Xilskey_Timer_Intialise()
* @note None.
*
****************************************************************************/
void Xilskey_StrCpyRange(u8 *Src, u8 *Dst, u32 From, u32 To)
void XilSKey_StrCpyRange(u8 *Src, u8 *Dst, u32 From, u32 To)
{
u32 Index,J = 0;
for (Index = From; Index <= To; Index++) {
@ -904,10 +907,14 @@ void Xilskey_StrCpyRange(u8 *Src, u8 *Dst, u32 From, u32 To)
*
* @return Crc of AES key value.
*
* @note None.
* @note This API calculates CRC of AES key for Ultrascale Microblaze's
* PL eFuse and ZynqMp Ultrascale's PS eFuse.
* In Microblaze CRC will be calculated from 8th word of key to 0th
* word whereas in ZynqMp Ultrascale's PS eFuse from 0th word to
* 8th word
*
****************************************************************************/
u32 Xilskey_CrcCalculation(u8 *Key)
u32 XilSKey_CrcCalculation(u8 *Key)
{
u32 Crc = 0;
u8 Key_8[8];
@ -930,12 +937,27 @@ u32 Xilskey_CrcCalculation(u8 *Key)
}
for (Index = 0; Index <8;Index++) {
Xilskey_StrCpyRange(FullKey, Key_8, ((7 - Index)*8),
#ifdef XSK_MICROBLAZE_PLATFORM
XilSKey_StrCpyRange(FullKey, Key_8, ((7 - Index)*8),
((((7 - Index) + 1)*8)-1));
#endif
#ifdef XSK_ZYNQ_ULTRA_MP_PLATFORM
XilSKey_StrCpyRange(FullKey, Key_8, ((Index) * 8),
((((Index) *8) + 8) -1));
#endif
XilSKey_Efuse_ConvertStringToHexBE((char *)Key_8, Key_Hex, 8);
Key_32 = (Key_Hex[0] << 24) | (Key_Hex[1] << 16) |
(Key_Hex[2] << 8) | (Key_Hex[3]);
Crc = Xilskey_RowCrcCalculation(Crc, Key_32, 20+Index);
#ifdef XSK_MICROBLAZE_PLATFORM
Crc = XilSKey_RowCrcCalculation(Crc, Key_32, 20 + Index);
#endif
#ifdef XSK_ZYNQ_ULTRA_MP_PLATFORM
Crc = XilSKey_RowCrcCalculation(Crc, Key_32, 8 - Index);
#endif
}
return Crc;
@ -954,7 +976,7 @@ u32 Xilskey_CrcCalculation(u8 *Key)
* @note None.
*
****************************************************************************/
u32 Xilskey_RowCrcCalculation(u32 PrevCRC, u32 Data, u32 Addr)
u32 XilSKey_RowCrcCalculation(u32 PrevCRC, u32 Data, u32 Addr)
{
u32 Crc = PrevCRC;
u32 Value = Data;
@ -996,7 +1018,7 @@ u32 Xilskey_RowCrcCalculation(u32 PrevCRC, u32 Data, u32 Addr)
* @note None.
*
****************************************************************************/
u32 Xilskey_Efuse_ReverseHex(u32 Input)
u32 XilSKey_Efuse_ReverseHex(u32 Input)
{
u32 Index = 0;
u32 Rev = 0;
@ -1012,3 +1034,26 @@ u32 Xilskey_Efuse_ReverseHex(u32 Input)
return Rev;
}
/****************************************************************************/
/**
* This API celis the provided float value.
*
* @param Value is a float variable which has to ceiled to nearest
* integer.
*
* @return Returns ceiled value.
*
* @note None.
*
*****************************************************************************/
u32 XilSKey_Ceil(float Value)
{
u32 RetValue;
RetValue = ((Value > (u32)Value) || ((u32)Value == 0)) ?
(u32)(Value + 1) : (u32)Value;
return RetValue;
}