v_hscaler: Bug Fix in phase calculation logic

4 Samples/Clock phase calculation logic works on 64bit entities.
However a 32bit variable was used that caused wrong phase
information to be generated. Updated relevant variables to 64b

Signed-off-by: Rohit Consul <rohit.consul@xilinx.com>
Reviewed-by: Andrei Simion <andreis@xilinx.com>
This commit is contained in:
Rohit Consul 2015-07-31 13:47:46 -07:00 committed by Nava kishore Manne
parent b015782fbc
commit 759573e90f

View file

@ -273,10 +273,10 @@ static void CalculatePhases(XV_hscaler *pHsc,
int x,s;
int offset = 0;
int xWritePos = 0;
int OutputWriteEn;
u64 OutputWriteEn;
int GetNewPix;
int PhaseH;
int arrayIdx;
u64 PhaseH;
u64 arrayIdx;
int xReadPos = 0;
int nrRds = 0;
int nrRdsClck = 0;