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nandpsu_v1_0: Modified driver source file for removing compilation warning.

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Modified driver source file to remove compiler warning.
1. Did Type Conversion
2. Made two API's public
3. Removed redeclaration

Signed-off-by: Shakti Bhatnagar <shaktib@xilinx.com>
This commit is contained in:
Shakti Bhatnagar 2015-02-25 16:53:55 +05:30 • committed by Nava kishore Manne
parent f382b3403f
commit 8240571709
3 changed files with 10 additions and 6 deletions
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10
XilinxProcessorIPLib/drivers/nandpsu/src/xnandpsu.c
View file

@ -2151,7 +2151,7 @@ static s32 XNandPsu_ProgramPage(XNandPsu *InstancePtr, u32 Target, u32 Page,
/*
* Flush the Data Cache
*/
Xil_DCacheFlushRange(Buf, (PktSize * PktCount));
Xil_DCacheFlushRange((INTPTR)Buf, (PktSize * PktCount));
#ifdef __aarch64__
XNandPsu_WriteReg(InstancePtr->Config.BaseAddress,
@ -2427,7 +2427,7 @@ s32 XNandPsu_WriteSpareBytes(XNandPsu *InstancePtr, u32 Page, u8 *Buf)
/*
* Flush the Data Cache
*/
Xil_DCacheFlushRange(BufPtr, (PktSize * PktCount));
Xil_DCacheFlushRange((INTPTR)BufPtr, (PktSize * PktCount));
#ifdef __aarch64__
XNandPsu_WriteReg(InstancePtr->Config.BaseAddress,
@ -2681,7 +2681,7 @@ static s32 XNandPsu_ReadPage(XNandPsu *InstancePtr, u32 Target, u32 Page,
/*
* Invalidate the Data Cache
*/
Xil_DCacheInvalidateRange(Buf, (PktSize * PktCount));
Xil_DCacheInvalidateRange((INTPTR)Buf, (PktSize * PktCount));
#ifdef __aarch64__
XNandPsu_WriteReg(InstancePtr->Config.BaseAddress,
@ -2957,7 +2957,7 @@ s32 XNandPsu_ReadSpareBytes(XNandPsu *InstancePtr, u32 Page, u8 *Buf)
/*
* Invalidate the Data Cache
*/
Xil_DCacheInvalidateRange(Buf, (PktSize * PktCount));
Xil_DCacheInvalidateRange((INTPTR)Buf, (PktSize * PktCount));
#ifdef __aarch64__
XNandPsu_WriteReg(InstancePtr->Config.BaseAddress,
XNANDPSU_DMA_SYS_ADDR1_OFFSET,
@ -3737,7 +3737,7 @@ static s32 XNandPsu_ChangeReadColumn(XNandPsu *InstancePtr, u32 Target,
/*
* Invalidate the Data Cache
*/
Xil_DCacheInvalidateRange(Buf, (PktSize * PktCount));
Xil_DCacheInvalidateRange((INTPTR)Buf, (PktSize * PktCount));
#ifdef __aarch64__
XNandPsu_WriteReg(InstancePtr->Config.BaseAddress,
XNANDPSU_DMA_SYS_ADDR1_OFFSET,

5
XilinxProcessorIPLib/drivers/nandpsu/src/xnandpsu.h
View file

@ -552,6 +552,11 @@ s32 XNandPsu_GetFeature(XNandPsu *InstancePtr, u32 Target, u8 Feature,
s32 XNandPsu_SetFeature(XNandPsu *InstancePtr, u32 Target, u8 Feature,
u8 *Buf);
s32 XNandPsu_ScanBbt(XNandPsu *InstancePtr);
s32 XNandPsu_MarkBlockBad(XNandPsu *InstancePtr, u32 Block);
void XNandPsu_EnableDmaMode(XNandPsu *InstancePtr);
void XNandPsu_DisableDmaMode(XNandPsu *InstancePtr);

1
XilinxProcessorIPLib/drivers/nandpsu/src/xnandpsu_sinit.c
View file

@ -52,7 +52,6 @@
#include "xparameters.h"
#include "xnandpsu.h"
/************************** Constant Definitions ****************************/
#define XPAR_XNANDPSU_NUM_INSTANCES 1U
/**************************** Type Definitions ******************************/