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dp: rx: Initialization now enables PHY reset during training and rate changes.

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The IP documentation "recommends" enabling the following:
- Issuing reset at every training iteration.
- Issuing reset at every link rate change.
- Issuing reset at start of training pattern 1.

Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
This commit is contained in:
Andrei-Liviu Simion 2015-02-13 17:24:31 -07:00 • committed by Nava kishore Manne
parent 1c42a7097b
commit 8bbd926b0b
1 changed files with 7 additions and 2 deletions
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9
XilinxProcessorIPLib/drivers/dp/src/xdp.c
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@ -1871,9 +1871,14 @@ static u32 XDp_RxInitialize(XDp *InstancePtr)
return XST_FAILURE;
}
/* Remove the reset from the PHY. */
/* Remove the reset from the PHY and configure to issue reset after
* every training iteration, link rate change, and start of training
* pattern. */
XDp_WriteReg(InstancePtr->Config.BaseAddr, XDP_RX_PHY_CONFIG,
XDP_RX_PHY_CONFIG_PHY_RESET_ENABLE_MASK);
XDP_RX_PHY_CONFIG_PHY_RESET_ENABLE_MASK |
XDP_RX_PHY_CONFIG_RESET_AT_TRAIN_ITER_MASK |
XDP_RX_PHY_CONFIG_RESET_AT_LINK_RATE_CHANGE_MASK |
XDP_RX_PHY_CONFIG_RESET_AT_TP1_START_MASK);
/* Wait until the PHY has completed the reset cycle. */
if (InstancePtr->Config.MaxLaneCount > 2) {