Xilinx Embedded Software (embeddedsw) Development

Andrei-Liviu Simion 8bbd926b0b dp: rx: Initialization now enables PHY reset during training and rate changes. ... The IP documentation "recommends" enabling the following: - Issuing reset at every training iteration. - Issuing reset at every link rate change. - Issuing reset at start of training pattern 1. Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>		2015-07-07 00:12:08 +05:30
doc	doc: update pdf for standalone bsp	2015-05-22 11:35:21 +05:30
lib	Revert "sw_apps:zynqmp_fsbl: Changed alignment of MMU tables for A53"	2015-07-06 23:45:58 +05:30
ThirdParty/sw_services	lwip: Update tcl to support User parameters	2015-06-20 13:08:14 +05:30
XilinxProcessorIPLib/drivers	dp: rx: Initialization now enables PHY reset during training and rate changes.	2015-07-07 00:12:08 +05:30