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nandpsu: Convert the three line comments to single line

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This patch converts the three line comments to single line

Signed-off-by: Punnaiah Choudary Kalluri <punnaia@xilinx.com>
Acked-by: Anirudha Sarangi   <anirudh@xilinx.com>
This commit is contained in:
Punnaiah Choudary Kalluri 2015-07-28 17:15:13 +05:30 • committed by Nava kishore Manne
parent 30c8402cdc
commit c46210930c
5 changed files with 227 additions and 681 deletions
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648
XilinxProcessorIPLib/drivers/nandpsu/src/xnandpsu.c
View file

File diff suppressed because it is too large Load diff

12
XilinxProcessorIPLib/drivers/nandpsu/src/xnandpsu.h
View file

@ -301,9 +301,7 @@ typedef struct {
* The XNandPsu_Geometry structure contains the ONFI geometry information.
*/
typedef struct {
/*
* Parameter page information
*/
/* Parameter page information */
u32 BytesPerPage; /**< Number of bytes per page */
u16 SpareBytesPerPage; /**< Number of spare bytes per page */
u32 PagesPerBlock; /**< Number of pages per block */
@ -314,9 +312,7 @@ typedef struct {
u8 NumBitsPerCell; /**< Number of bits per cell (Hamming/BCH) */
u8 NumBitsECC; /**< Number of bits ECC correctability */
u32 EccCodeWordSize; /**< ECC codeword size */
/*
* Driver specific information
*/
/* Driver specific information */
u32 BlockSize; /**< Block size */
u32 NumTargetPages; /**< Total number of pages in a Target */
u32 NumTargetBlocks; /**< Total number of blocks in a Target */
@ -560,9 +556,7 @@ void XNandPsu_DisableEccMode(XNandPsu *InstancePtr);
void XNandPsu_Prepare_Cmd(XNandPsu *InstancePtr, u8 Cmd1, u8 Cmd2, u8 EccState,
u8 DmaMode, u8 AddrCycles);
/*
* XNandPsu_LookupConfig in xnandpsu_sinit.c
*/
/* XNandPsu_LookupConfig in xnandpsu_sinit.c */
XNandPsu_Config *XNandPsu_LookupConfig(u16 DevID);

188
XilinxProcessorIPLib/drivers/nandpsu/src/xnandpsu_bbm.c
View file

@ -105,9 +105,7 @@ void XNandPsu_InitBbtDesc(XNandPsu *InstancePtr)
Xil_AssertVoid(InstancePtr != NULL);
Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
/*
* Initialize primary Bad Block Table(BBT)
*/
/* Initialize primary Bad Block Table(BBT) */
for (Index = 0U; Index < XNANDPSU_MAX_TARGETS; Index++) {
InstancePtr->BbtDesc.PageOffset[Index] =
XNANDPSU_BBT_DESC_PAGE_OFFSET;
@ -127,17 +125,13 @@ void XNandPsu_InitBbtDesc(XNandPsu *InstancePtr)
}
InstancePtr->BbtDesc.Valid = 0U;
/*
* Assuming that the flash device will have at least 4 blocks.
*/
/* Assuming that the flash device will have at least 4 blocks. */
if (InstancePtr->Geometry.NumTargetBlocks <= InstancePtr->
BbtDesc.MaxBlocks){
InstancePtr->BbtDesc.MaxBlocks = 4U;
}
/*
* Initialize mirror Bad Block Table(BBT)
*/
/* Initialize mirror Bad Block Table(BBT) */
for (Index = 0U; Index < XNANDPSU_MAX_TARGETS; Index++) {
InstancePtr->BbtMirrorDesc.PageOffset[Index] =
XNANDPSU_BBT_DESC_PAGE_OFFSET;
@ -161,17 +155,13 @@ void XNandPsu_InitBbtDesc(XNandPsu *InstancePtr)
}
InstancePtr->BbtMirrorDesc.Valid = 0U;
/*
* Assuming that the flash device will have at least 4 blocks.
*/
/* Assuming that the flash device will have at least 4 blocks. */
if (InstancePtr->Geometry.NumTargetBlocks <= InstancePtr->
BbtMirrorDesc.MaxBlocks){
InstancePtr->BbtMirrorDesc.MaxBlocks = 4U;
}
/*
* Initialize Bad block search pattern structure
*/
/* Initialize Bad block search pattern structure */
if (InstancePtr->Geometry.BytesPerPage > 512U) {
/* For flash page size > 512 bytes */
InstancePtr->BbPattern.Options = XNANDPSU_BBT_SCAN_2ND_PAGE;
@ -216,32 +206,22 @@ static void XNandPsu_CreateBbt(XNandPsu *InstancePtr, u32 Target)
u32 NumBlocks = InstancePtr->Geometry.NumTargetBlocks;
s32 Status;
/*
* Number of pages to search for bad block pattern
*/
/* Number of pages to search for bad block pattern */
if ((InstancePtr->BbPattern.Options & XNANDPSU_BBT_SCAN_2ND_PAGE) != 0U)
{
NumPages = 2U;
} else {
NumPages = 1U;
}
/*
* Scan all the blocks for factory marked bad blocks
*/
/* Scan all the blocks for factory marked bad blocks */
for(BlockIndex = StartBlock; BlockIndex < (StartBlock + NumBlocks);
BlockIndex++) {
/*
* Block offset in Bad Block Table(BBT) entry
*/
/* Block offset in Bad Block Table(BBT) entry */
BlockOffset = BlockIndex >> XNANDPSU_BBT_BLOCK_SHIFT;
/*
* Block shift value in the byte
*/
/* Block shift value in the byte */
BlockShift = XNandPsu_BbtBlockShift(BlockIndex);
Page = BlockIndex * InstancePtr->Geometry.PagesPerBlock;
/*
* Search for the bad block pattern
*/
/* Search for the bad block pattern */
for(PageIndex = 0U; PageIndex < NumPages; PageIndex++) {
Status = XNandPsu_ReadSpareBytes(InstancePtr,
(Page + PageIndex), &Buf[0]);
@ -297,9 +277,7 @@ s32 XNandPsu_ScanBbt(XNandPsu *InstancePtr)
Xil_AssertNonvoid(InstancePtr != NULL);
Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
/*
* Zero the RAM based Bad Block Table(BBT) entries
*/
/* Zero the RAM based Bad Block Table(BBT) entries */
BbtLen = InstancePtr->Geometry.NumBlocks >>
XNANDPSU_BBT_BLOCK_SHIFT;
(void)memset(&InstancePtr->Bbt[0], 0, BbtLen);
@ -307,22 +285,16 @@ s32 XNandPsu_ScanBbt(XNandPsu *InstancePtr)
for (Index = 0U; Index < InstancePtr->Geometry.NumTargets; Index++) {
if (XNandPsu_ReadBbt(InstancePtr, Index) != XST_SUCCESS) {
/*
* Create memory based Bad Block Table(BBT)
*/
/* Create memory based Bad Block Table(BBT) */
XNandPsu_CreateBbt(InstancePtr, Index);
/*
* Write the Bad Block Table(BBT) to the flash
*/
/* Write the Bad Block Table(BBT) to the flash */
Status = XNandPsu_WriteBbt(InstancePtr,
&InstancePtr->BbtDesc,
&InstancePtr->BbtMirrorDesc, Index);
if (Status != XST_SUCCESS) {
goto Out;
}
/*
* Write the Mirror Bad Block Table(BBT) to the flash
*/
/* Write the Mirror Bad Block Table(BBT) to the flash */
Status = XNandPsu_WriteBbt(InstancePtr,
&InstancePtr->BbtMirrorDesc,
&InstancePtr->BbtDesc, Index);
@ -379,13 +351,9 @@ static void XNandPsu_ConvertBbt(XNandPsu *InstancePtr, u8 *Buf, u32 Target)
for(BlockOffset = StartBlock; BlockOffset < (StartBlock + BbtLen);
BlockOffset++) {
Data = *(Buf + BlockOffset);
/*
* Clear the RAM based Bad Block Table(BBT) contents
*/
/* Clear the RAM based Bad Block Table(BBT) contents */
InstancePtr->Bbt[BlockOffset] = 0x0U;
/*
* Loop through the every 4 blocks in the bitmap
*/
/* Loop through the every 4 blocks in the bitmap */
for(BlockIndex = 0U; BlockIndex < XNANDPSU_BBT_ENTRY_NUM_BLOCKS;
BlockIndex++) {
BlockShift = XNandPsu_BbtBlockShift(BlockIndex);
@ -447,9 +415,7 @@ static s32 XNandPsu_ReadBbt(XNandPsu *InstancePtr, u32 Target)
XNandPsu_BbtDesc *MirrorDesc = &InstancePtr->BbtMirrorDesc;
BufLen = InstancePtr->Geometry.NumBlocks >>
XNANDPSU_BBT_BLOCK_SHIFT;
/*
* Search the Bad Block Table(BBT) in flash
*/
/* Search the Bad Block Table(BBT) in flash */
Status1 = XNandPsu_SearchBbt(InstancePtr, Desc, Target);
Status2 = XNandPsu_SearchBbt(InstancePtr, MirrorDesc, Target);
if ((Status1 != XST_SUCCESS) && (Status2 != XST_SUCCESS)) {
@ -462,13 +428,9 @@ static s32 XNandPsu_ReadBbt(XNandPsu *InstancePtr, u32 Target)
#ifdef XNANDPSU_DEBUG
xil_printf("%s: Bad block table found\r\n",__func__);
#endif
/*
* Bad Block Table found
*/
/* Bad Block Table found */
if ((Desc->Valid != 0U) && (MirrorDesc->Valid != 0U)) {
/*
* Valid BBT & Mirror BBT found
*/
/* Valid BBT & Mirror BBT found */
if (Desc->Version[Target] > MirrorDesc->Version[Target]) {
Offset = (u64)Desc->PageOffset[Target] *
(u64)InstancePtr->Geometry.BytesPerPage;
@ -477,15 +439,11 @@ static s32 XNandPsu_ReadBbt(XNandPsu *InstancePtr, u32 Target)
if (Status != XST_SUCCESS) {
goto Out;
}
/*
* Convert flash BBT to memory based BBT
*/
/* Convert flash BBT to memory based BBT */
XNandPsu_ConvertBbt(InstancePtr, &Buf[0], Target);
MirrorDesc->Version[Target] = Desc->Version[Target];
/*
* Write the BBT to Mirror BBT location in flash
*/
/* Write the BBT to Mirror BBT location in flash */
Status = XNandPsu_WriteBbt(InstancePtr, MirrorDesc,
Desc, Target);
if (Status != XST_SUCCESS) {
@ -500,15 +458,11 @@ static s32 XNandPsu_ReadBbt(XNandPsu *InstancePtr, u32 Target)
if (Status != XST_SUCCESS) {
goto Out;
}
/*
* Convert flash BBT to memory based BBT
*/
/* Convert flash BBT to memory based BBT */
XNandPsu_ConvertBbt(InstancePtr, &Buf[0], Target);
Desc->Version[Target] = MirrorDesc->Version[Target];
/*
* Write the Mirror BBT to BBT location in flash
*/
/* Write the Mirror BBT to BBT location in flash */
Status = XNandPsu_WriteBbt(InstancePtr, Desc,
MirrorDesc, Target);
if (Status != XST_SUCCESS) {
@ -523,54 +477,40 @@ static s32 XNandPsu_ReadBbt(XNandPsu *InstancePtr, u32 Target)
if (Status != XST_SUCCESS) {
goto Out;
}
/*
* Convert flash BBT to memory based BBT
*/
/* Convert flash BBT to memory based BBT */
XNandPsu_ConvertBbt(InstancePtr, &Buf[0], Target);
}
} else if (Desc->Valid != 0U) {
/*
* Valid Primary BBT found
*/
/* Valid Primary BBT found */
Offset = (u64)Desc->PageOffset[Target] *
(u64)InstancePtr->Geometry.BytesPerPage;
Status = XNandPsu_Read(InstancePtr, Offset, BufLen, &Buf[0]);
if (Status != XST_SUCCESS) {
goto Out;
}
/*
* Convert flash BBT to memory based BBT
*/
/* Convert flash BBT to memory based BBT */
XNandPsu_ConvertBbt(InstancePtr, &Buf[0], Target);
MirrorDesc->Version[Target] = Desc->Version[Target];
/*
* Write the BBT to Mirror BBT location in flash
*/
/* Write the BBT to Mirror BBT location in flash */
Status = XNandPsu_WriteBbt(InstancePtr, MirrorDesc, Desc,
Target);
if (Status != XST_SUCCESS) {
goto Out;
}
} else {
/*
* Valid Mirror BBT found
*/
/* Valid Mirror BBT found */
Offset = (u64)MirrorDesc->PageOffset[Target] *
(u64)InstancePtr->Geometry.BytesPerPage;
Status = XNandPsu_Read(InstancePtr, Offset, BufLen, &Buf[0]);
if (Status != XST_SUCCESS) {
goto Out;
}
/*
* Convert flash BBT to memory based BBT
*/
/* Convert flash BBT to memory based BBT */
XNandPsu_ConvertBbt(InstancePtr, &Buf[0], Target);
Desc->Version[Target] = MirrorDesc->Version[Target];
/*
* Write the Mirror BBT to BBT location in flash
*/
/* Write the Mirror BBT to BBT location in flash */
Status = XNandPsu_WriteBbt(InstancePtr, Desc, MirrorDesc,
Target);
if (Status != XST_SUCCESS) {
@ -617,9 +557,7 @@ static s32 XNandPsu_SearchBbt(XNandPsu *InstancePtr, XNandPsu_BbtDesc *Desc,
MaxBlocks = Desc->MaxBlocks;
SigLength = Desc->SigLength;
/*
* Read the last 4 blocks for Bad Block Table(BBT) signature
*/
/* Read the last 4 blocks for Bad Block Table(BBT) signature */
for(Block = 0U; Block < MaxBlocks; Block++) {
PageOff = (StartBlock - Block) *
InstancePtr->Geometry.PagesPerBlock;
@ -628,9 +566,7 @@ static s32 XNandPsu_SearchBbt(XNandPsu *InstancePtr, XNandPsu_BbtDesc *Desc,
if (Status != XST_SUCCESS) {
continue;
}
/*
* Check the Bad Block Table(BBT) signature
*/
/* Check the Bad Block Table(BBT) signature */
for(Offset = 0U; Offset < SigLength; Offset++) {
if (Buf[Offset + SigOffset] !=
(u8)(Desc->Signature[Offset]))
@ -639,9 +575,7 @@ static s32 XNandPsu_SearchBbt(XNandPsu *InstancePtr, XNandPsu_BbtDesc *Desc,
}
}
if (Offset >= SigLength) {
/*
* Bad Block Table(BBT) found
*/
/* Bad Block Table(BBT) found */
Desc->PageOffset[Target] = PageOff;
Desc->Version[Target] = Buf[VerOffset];
Desc->Valid = 1U;
@ -650,9 +584,7 @@ static s32 XNandPsu_SearchBbt(XNandPsu *InstancePtr, XNandPsu_BbtDesc *Desc,
goto Out;
}
}
/*
* Bad Block Table(BBT) not found
*/
/* Bad Block Table(BBT) not found */
Status = XST_FAILURE;
Out:
return Status;
@ -691,9 +623,7 @@ static s32 XNandPsu_WriteBbt(XNandPsu *InstancePtr, XNandPsu_BbtDesc *Desc,
u8 BlockType;
u32 BbtLen = InstancePtr->Geometry.NumBlocks >>
XNANDPSU_BBT_BLOCK_SHIFT;
/*
* Find a valid block to write the Bad Block Table(BBT)
*/
/* Find a valid block to write the Bad Block Table(BBT) */
if ((!Desc->Valid) != 0U) {
for(Index = 0U; Index < Desc->MaxBlocks; Index++) {
Block = (EndBlock - Index);
@ -720,9 +650,7 @@ static s32 XNandPsu_WriteBbt(XNandPsu *InstancePtr, XNandPsu_BbtDesc *Desc,
}
}
/*
* Block not found for writing Bad Block Table(BBT)
*/
/* Block not found for writing Bad Block Table(BBT) */
if (Index >= Desc->MaxBlocks) {
#ifdef XNANDPSU_DEBUG
xil_printf("%s: Blocks unavailable for writing BBT\r\n",
@ -735,19 +663,13 @@ static s32 XNandPsu_WriteBbt(XNandPsu *InstancePtr, XNandPsu_BbtDesc *Desc,
Block = Desc->PageOffset[Target] /
InstancePtr->Geometry.PagesPerBlock;
}
/*
* Convert the memory based BBT to flash based table
*/
/* Convert the memory based BBT to flash based table */
(void)memset(Buf, 0xff, BbtLen);
/*
* Loop through the number of blocks
*/
/* Loop through the number of blocks */
for(BlockOffset = 0U; BlockOffset < BbtLen; BlockOffset++) {
Data = InstancePtr->Bbt[BlockOffset];
/*
* Calculate the bit mask for 4 blocks at a time in loop
*/
/* Calculate the bit mask for 4 blocks at a time in loop */
for(BlockIndex = 0U; BlockIndex < XNANDPSU_BBT_ENTRY_NUM_BLOCKS;
BlockIndex++) {
BlockShift = XNandPsu_BbtBlockShift(BlockIndex);
@ -757,9 +679,7 @@ static s32 XNandPsu_WriteBbt(XNandPsu *InstancePtr, XNandPsu_BbtDesc *Desc,
Data >>= XNANDPSU_BBT_BLOCK_SHIFT;
}
}
/*
* Write the Bad Block Table(BBT) to flash
*/
/* Write the Bad Block Table(BBT) to flash */
Status = XNandPsu_EraseBlock(InstancePtr, 0U, Block);
if (Status != XST_SUCCESS) {
goto Out;
@ -811,9 +731,7 @@ static s32 XNandPsu_UpdateBbt(XNandPsu *InstancePtr, u32 Target)
s32 Status;
u8 Version;
/*
* Update the version number
*/
/* Update the version number */
Version = InstancePtr->BbtDesc.Version[Target];
InstancePtr->BbtDesc.Version[Target] = (u8)(((u16)Version +
(u16)1) % (u16)256U);
@ -821,9 +739,7 @@ static s32 XNandPsu_UpdateBbt(XNandPsu *InstancePtr, u32 Target)
Version = InstancePtr->BbtMirrorDesc.Version[Target];
InstancePtr->BbtMirrorDesc.Version[Target] = (u8)(((u16)Version +
(u16)1) % (u16)256);
/*
* Update the primary Bad Block Table(BBT) in flash
*/
/* Update the primary Bad Block Table(BBT) in flash */
Status = XNandPsu_WriteBbt(InstancePtr, &InstancePtr->BbtDesc,
&InstancePtr->BbtMirrorDesc,
Target);
@ -831,9 +747,7 @@ static s32 XNandPsu_UpdateBbt(XNandPsu *InstancePtr, u32 Target)
goto Out;
}
/*
* Update the mirrored Bad Block Table(BBT) in flash
*/
/* Update the mirrored Bad Block Table(BBT) in flash */
Status = XNandPsu_WriteBbt(InstancePtr, &InstancePtr->BbtMirrorDesc,
&InstancePtr->BbtDesc,
Target);
@ -870,9 +784,7 @@ static s32 XNandPsu_MarkBbt(XNandPsu* InstancePtr, XNandPsu_BbtDesc *Desc,
u32 UpdateBbt = 0U;
u32 Index;
/*
* Mark the last four blocks as Reserved
*/
/* Mark the last four blocks as Reserved */
BlockIndex = ((Target + (u32)1) * InstancePtr->Geometry.NumTargetBlocks) -
Desc->MaxBlocks - (u32)1;
@ -891,9 +803,7 @@ static s32 XNandPsu_MarkBbt(XNandPsu* InstancePtr, XNandPsu_BbtDesc *Desc,
BlockIndex++;
}
/*
* Update the BBT to flash
*/
/* Update the BBT to flash */
if (UpdateBbt != 0U) {
Status = XNandPsu_UpdateBbt(InstancePtr, Target);
if (Status != XST_SUCCESS) {
@ -980,18 +890,14 @@ s32 XNandPsu_MarkBlockBad(XNandPsu *InstancePtr, u32 Block)
BlockShift = XNandPsu_BbtBlockShift(Block);
Data = InstancePtr->Bbt[BlockOffset]; /* Block information in BBT */
/*
* Mark the block as bad in the RAM based Bad Block Table
*/
/* Mark the block as bad in the RAM based Bad Block Table */
OldVal = Data;
Data &= ~(XNANDPSU_BLOCK_TYPE_MASK << BlockShift);
Data |= (XNANDPSU_BLOCK_BAD << BlockShift);
NewVal = Data;
InstancePtr->Bbt[BlockOffset] = Data;
/*
* Update the Bad Block Table(BBT) in flash
*/
/* Update the Bad Block Table(BBT) in flash */
if (OldVal != NewVal) {
Status = XNandPsu_UpdateBbt(InstancePtr, Target);
if (Status != XST_SUCCESS) {

8
XilinxProcessorIPLib/drivers/nandpsu/src/xnandpsu_bbm.h
View file

@ -104,17 +104,13 @@ extern "C" {
#include "xnandpsu.h"
/************************** Constant Definitions *****************************/
/*
* Block definitions for RAM based Bad Block Table (BBT)
*/
/* Block definitions for RAM based Bad Block Table (BBT) */
#define XNANDPSU_BLOCK_GOOD 0x0U /**< Block is good */
#define XNANDPSU_BLOCK_BAD 0x1U /**< Block is bad */
#define XNANDPSU_BLOCK_RESERVED 0x2U /**< Reserved block */
#define XNANDPSU_BLOCK_FACTORY_BAD 0x3U /**< Factory marked bad
block */
/*
* Block definitions for FLASH based Bad Block Table (BBT)
*/
/* Block definitions for FLASH based Bad Block Table (BBT) */
#define XNANDPSU_FLASH_BLOCK_GOOD 0x3U /**< Block is good */
#define XNANDPSU_FLASH_BLOCK_BAD 0x2U /**< Block is bad */
#define XNANDPSU_FLASH_BLOCK_RESERVED 0x1U /**< Reserved block */

52
XilinxProcessorIPLib/drivers/nandpsu/src/xnandpsu_onfi.h
View file

@ -60,12 +60,8 @@ extern "C" {
#include "xil_types.h"
/************************** Constant Definitions *****************************/
/*
* Standard ONFI 3.1 Commands
*/
/*
* ONFI 3.1 Mandatory Commands
*/
/* Standard ONFI 3.1 Commands */
/* ONFI 3.1 Mandatory Commands */
#define ONFI_CMD_RD1 0x00U /**< Read (1st cycle) */
#define ONFI_CMD_RD2 0x30U /**< Read (2nd cycle) */
#define ONFI_CMD_CHNG_RD_COL1 0x05U /**< Change Read Column
@ -81,9 +77,7 @@ extern "C" {
#define ONFI_CMD_RD_ID 0x90U /**< Read ID */
#define ONFI_CMD_RD_PRM_PG 0xECU /**< Read Parameter Page */
#define ONFI_CMD_RST 0xFFU /**< Reset */
/*
* ONFI 3.1 Optional Commands
*/
/* ONFI 3.1 Optional Commands */
#define ONFI_CMD_MUL_RD1 0x00U /**< Multiplane Read
(1st cycle) */
#define ONFI_CMD_MUL_RD2 0x32U /**< Multiplane Read
@ -140,9 +134,7 @@ extern "C" {
#define ONFI_CMD_RST_LUN 0xFAU /**< Reset LUN */
#define ONFI_CMD_SYN_RST 0xFCU /**< Synchronous Reset */
/*
* ONFI Status Register bit offsets
*/
/* ONFI Status Register bit offsets */
#define ONFI_STS_FAIL 0x01U /**< FAIL */
#define ONFI_STS_FAILC 0x02U /**< FAILC */
#define ONFI_STS_CSP 0x08U /**< CSP */
@ -151,9 +143,7 @@ extern "C" {
#define ONFI_STS_RDY 0x40U /**< RDY */
#define ONFI_STS_WP 0x80U /**< WP_n */
/*
* ONFI constants
*/
/* ONFI constants */
#define ONFI_CRC_LEN 254U /**< ONFI CRC Buf Length */
#define ONFI_PRM_PG_LEN 256U /**< Parameter Page Length */
#define ONFI_MND_PRM_PGS 3U /**< Number of mandatory
@ -209,13 +199,9 @@ enum OnfiCommandList {
};
/**************************** Type Definitions *******************************/
/*
* Parameter page structure of ONFI 3.1 specification.
*/
/* Parameter page structure of ONFI 3.1 specification. */
typedef struct {
/*
* Revision information and features block
*/
/* Revision information and features block */
u8 Signature[4]; /**< Parameter page signature */
u16 Revision; /**< Revision Number */
u16 Features; /**< Features supported */
@ -226,17 +212,13 @@ typedef struct {
u16 ExtParamPageLen; /**< Extended Parameter Page Length */
u8 NumOfParamPages; /**< Number of Parameter Pages */
u8 Reserved1[17]; /**< Reserved (15-31) */
/*
* Manufacturer information block
*/
/* Manufacturer information block */
u8 DeviceManufacturer[12]; /**< Device manufacturer */
u8 DeviceModel[20]; /**< Device model */
u8 JedecManufacturerId; /**< JEDEC Manufacturer ID */
u8 DateCode[2]; /**< Date code */
u8 Reserved2[13]; /**< Reserved (67-79) */
/*
* Memory organization block
*/
/* Memory organization block */
u32 BytesPerPage; /**< Number of data bytes per page */
u16 SpareBytesPerPage; /**< Number of spare bytes per page */
u32 BytesPerPartialPage; /**< Number of data bytes per
@ -263,9 +245,7 @@ typedef struct {
attributes */
u8 EzNandSupport; /**< EZ NAND support */
u8 Reserved3[12]; /**< Reserved (116 - 127) */
/*
* Electrical parameters block
*/
/* Electrical parameters block */
u8 IOPinCapacitance; /**< I/O pin capacitance, maximum */
u16 SDRTimingMode; /**< SDR Timing mode support */
u16 SDRPagecacheTimingMode; /**< SDR Program cache timing mode */
@ -290,17 +270,13 @@ typedef struct {
u8 NVDDR2Features; /**< NVDDR2 Features */
u8 NVDDR2WarmupCycles; /**< NVDDR2 Warmup Cycles */
u8 Reserved4[4]; /**< Reserved (160 - 163) */
/*
* Vendor block
*/
/* Vendor block */
u16 VendorRevisionNum; /**< Vendor specific revision number */
u8 VendorSpecific[88]; /**< Vendor specific */
u16 Crc; /**< Integrity CRC */
}__attribute__((packed))OnfiParamPage;
/*
* ONFI extended parameter page structure.
*/
/* ONFI extended parameter page structure. */
typedef struct {
u16 Crc;
u8 Sig[4];
@ -313,9 +289,7 @@ typedef struct {
u8 SectionData[256];
}__attribute__((packed))OnfiExtPrmPage;
/*
* Driver extended parameter page information.
*/
/* Driver extended parameter page information. */
typedef struct {
u8 NumEccBits;
u8 CodeWordSize;