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sdps: Support data cache

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Make changes to enable use of data cache.

Signed-off-by: Harini Katakam <harinik@xilinx.com>
Acked-by: Anirudha Sarangi <anirudh@xilinx.com>
This commit is contained in:
Harini Katakam 2014-08-04 13:02:46 +05:30 • committed by Jagannadha Sutradharudu Teki
parent c361aa8b5b
commit c7905e97cb
2 changed files with 17 additions and 2 deletions
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9
XilinxProcessorIPLib/drivers/sdps/src/xsdps.c
View file

@ -45,6 +45,7 @@
* 1.00a hk/sg 10/17/13 Initial release
* 2.0 hk 12/13/13 Added check for arm to use sleep.h and its API's
* 2.1 hk 04/18/14 Add sleep for microblaze designs. CR# 781117.
* 2.2 hk 07/28/14 Make changes to enable use of data cache.
*
* </pre>
*
@ -685,6 +686,8 @@ int XSdPs_ReadPolled(XSdPs *InstancePtr, u32 Arg, u32 BlkCnt, u8 *Buff)
XSDPS_TM_BLK_CNT_EN_MASK | XSDPS_TM_DAT_DIR_SEL_MASK |
XSDPS_TM_DMA_EN_MASK | XSDPS_TM_MUL_SIN_BLK_SEL_MASK);
Xil_DCacheInvalidateRange(Buff, BlkCnt * XSDPS_BLK_SIZE_512_MASK);
/*
* Send block read command
*/
@ -723,7 +726,7 @@ int XSdPs_ReadPolled(XSdPs *InstancePtr, u32 Arg, u32 BlkCnt, u8 *Buff)
Status = XST_SUCCESS;
RETURN_PATH:
return Status;
return Status;
}
/*****************************************************************************/
@ -773,6 +776,7 @@ int XSdPs_WritePolled(XSdPs *InstancePtr, u32 Arg, u32 BlkCnt, const u8 *Buff)
}
XSdPs_SetupADMA2DescTbl(InstancePtr, BlkCnt, Buff);
Xil_DCacheFlushRange(Buff, BlkCnt * XSDPS_BLK_SIZE_512_MASK);
XSdPs_WriteReg16(InstancePtr->Config.BaseAddress,
XSDPS_XFER_MODE_OFFSET,
@ -933,6 +937,9 @@ void XSdPs_SetupADMA2DescTbl(XSdPs *InstancePtr, u32 BlkCnt, const u8 *Buff)
XSdPs_WriteReg(InstancePtr->Config.BaseAddress, XSDPS_ADMA_SAR_OFFSET,
(u32)&(InstancePtr->Adma2_DescrTbl[0]));
Xil_DCacheFlushRange(&(InstancePtr->Adma2_DescrTbl[0]),
sizeof(XSdPs_Adma2Descriptor) * 32);
}
/*****************************************************************************/

10
XilinxProcessorIPLib/drivers/sdps/src/xsdps.h
View file

@ -103,6 +103,7 @@
* 2.0 hk 03/07/14 Version number revised.
* 2.1 hk 04/18/14 Increase sleep for eMMC switch command.
* Add sleep for microblaze designs. CR# 781117.
* 2.2 hk 07/28/14 Make changes to enable use of data cache.
*
* </pre>
*
@ -153,7 +154,14 @@ typedef struct {
u32 HCS; /**< High capacity support in card */
u32 CardID[4]; /**< Card ID */
u32 RelCardAddr; /**< Relative Card Address */
XSdPs_Adma2Descriptor Adma2_DescrTbl[32]; /**< ADMA Descriptors */
/**< ADMA Descriptors */
#ifdef __ICCARM__
#pragma data_alignment = 32
XSdPs_Adma2Descriptor Adma2_DescrTbl[32];
#pragma data_alignment = 4
#else
XSdPs_Adma2Descriptor Adma2_DescrTbl[32] __attribute__ ((aligned(32)));
#endif
} XSdPs;
/***************** Macros (Inline Functions) Definitions *********************/