dp: rx: Increased the time to wait for the PHY to be ready.

Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
This commit is contained in:
Andrei-Liviu Simion 2015-01-15 17:59:51 -08:00 committed by Nava kishore Manne
parent ccfd95487f
commit c80bd4b59d
2 changed files with 6 additions and 3 deletions

View file

@ -94,7 +94,10 @@ u32 XDprx_InitializeRx(XDprx *InstancePtr)
XDprx_WriteReg(InstancePtr->Config.BaseAddr, XDPRX_PHY_CONFIG, 0x02); XDprx_WriteReg(InstancePtr->Config.BaseAddr, XDPRX_PHY_CONFIG, 0x02);
/* Wait until all lane CPLLs have locked. */ /* Wait until all lane CPLLs have locked. */
XDprx_WaitPhyReady(InstancePtr, 0x30); Status = XDprx_WaitPhyReady(InstancePtr, 0x30);
if (Status != XST_SUCCESS) {
return XST_FAILURE;
}
/* Remove the reset from the PHY. */ /* Remove the reset from the PHY. */
XDprx_WriteReg(InstancePtr->Config.BaseAddr, XDPRX_PHY_CONFIG, 0x00); XDprx_WriteReg(InstancePtr->Config.BaseAddr, XDPRX_PHY_CONFIG, 0x00);
@ -291,7 +294,7 @@ void XDprx_WaitUs(XDprx *InstancePtr, u32 MicroSeconds)
*******************************************************************************/ *******************************************************************************/
static u32 XDprx_WaitPhyReady(XDprx *InstancePtr, u8 Mask) static u32 XDprx_WaitPhyReady(XDprx *InstancePtr, u8 Mask)
{ {
u32 Timeout = 100; u16 Timeout = 20000;
u32 PhyStatus; u32 PhyStatus;
/* Wait until the PHY is ready. */ /* Wait until the PHY is ready. */

View file

@ -2623,7 +2623,7 @@ static u32 XDptx_SetClkSpeed(XDptx *InstancePtr, u32 Speed)
*******************************************************************************/ *******************************************************************************/
static u32 XDptx_WaitPhyReady(XDptx *InstancePtr) static u32 XDptx_WaitPhyReady(XDptx *InstancePtr)
{ {
u32 Timeout = 100; u16 Timeout = 20000;
u32 PhyStatus; u32 PhyStatus;
u32 Mask; u32 Mask;