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sw_apps: modified openamp echo test application

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This patch modifies openamp echo test to support the latest kernel
changes by modifying IPI channel bit mask, moving the code to DDR
from 0xfffc0000 to avoid conflict with ATF

Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
Acked by: Anirudha Sarangi <anirudh@xilinx.com>
This commit is contained in:
Kinjal Pravinbhai Patel 2015-08-20 02:02:10 +05:30 • committed by Nava kishore Manne
parent fefbadcdf0
commit ebb97640ae
5 changed files with 44 additions and 45 deletions
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2
lib/sw_apps/openamp_echo_test/data/openamp_echo_test.tcl
View file

@ -53,7 +53,7 @@ proc check_standalone_os {} {
proc swapp_is_supported_sw {} {
# make sure we are using standalone OS
#check_standalone_os;
check_standalone_os;
# make sure xilffs is available
set librarylist [hsi::get_libs -filter "NAME==xilopenamp"];

60
lib/sw_apps/openamp_echo_test/src/lscript.ld
View file

@ -45,7 +45,7 @@ MEMORY
{
ps8_bbram_0_S_AXI_BASEADDR : ORIGIN = 0xFFCC4000, LENGTH = 0x00001000
ps8_csu_ram_0_S_AXI_BASEADDR : ORIGIN = 0xFFC40000, LENGTH = 0x00008000
ps8_ocm_ram_0_S_AXI_BASEADDR : ORIGIN = 0xFFFC0000, LENGTH = 0x00020000
ps8_ddr_S_AXI_BASEADDR : ORIGIN = 0x3ED00000, LENGTH = 0x00040000
ps8_ocm_ram_1_S_AXI_BASEADDR : ORIGIN = 0xFFFF0000, LENGTH = 0x00010000
ps8_r5_tcm_ram_0_S_AXI_BASEADDR : ORIGIN = 0x00000050, LENGTH = 0x0001FFB1
}
@ -84,23 +84,23 @@ _binary_firmware2_end = 0;
*(.vfp11_veneer)
*(.ARM.extab)
*(.gnu.linkonce.armextab.*)
} > ps8_ocm_ram_0_S_AXI_BASEADDR
} > ps8_ddr_S_AXI_BASEADDR
.init : {
KEEP (*(.init))
} > ps8_ocm_ram_0_S_AXI_BASEADDR
} > ps8_ddr_S_AXI_BASEADDR
.fini : {
KEEP (*(.fini))
} > ps8_ocm_ram_0_S_AXI_BASEADDR
} > ps8_ddr_S_AXI_BASEADDR
.interp : {
KEEP (*(.interp))
} > ps8_ocm_ram_0_S_AXI_BASEADDR
} > ps8_ddr_S_AXI_BASEADDR
.note-ABI-tag : {
KEEP (*(.note-ABI-tag))
} > ps8_ocm_ram_0_S_AXI_BASEADDR
} > ps8_ddr_S_AXI_BASEADDR
.rodata : {
__rodata_start = .;
@ -108,14 +108,14 @@ _binary_firmware2_end = 0;
*(.rodata.*)
*(.gnu.linkonce.r.*)
__rodata_end = .;
} > ps8_ocm_ram_0_S_AXI_BASEADDR
} > ps8_ddr_S_AXI_BASEADDR
.rodata1 : {
__rodata1_start = .;
*(.rodata1)
*(.rodata1.*)
__rodata1_end = .;
} > ps8_ocm_ram_0_S_AXI_BASEADDR
} > ps8_ddr_S_AXI_BASEADDR
.sdata2 : {
__sdata2_start = .;
@ -123,7 +123,7 @@ _binary_firmware2_end = 0;
*(.sdata2.*)
*(.gnu.linkonce.s2.*)
__sdata2_end = .;
} > ps8_ocm_ram_0_S_AXI_BASEADDR
} > ps8_ddr_S_AXI_BASEADDR
.sbss2 : {
__sbss2_start = .;
@ -131,7 +131,7 @@ _binary_firmware2_end = 0;
*(.sbss2.*)
*(.gnu.linkonce.sb2.*)
__sbss2_end = .;
} > ps8_ocm_ram_0_S_AXI_BASEADDR
} > ps8_ddr_S_AXI_BASEADDR
.data : {
__data_start = .;
@ -142,18 +142,18 @@ _binary_firmware2_end = 0;
*(.got)
*(.got.plt)
__data_end = .;
} > ps8_ocm_ram_0_S_AXI_BASEADDR
} > ps8_ddr_S_AXI_BASEADDR
.data1 : {
__data1_start = .;
*(.data1)
*(.data1.*)
__data1_end = .;
} > ps8_ocm_ram_0_S_AXI_BASEADDR
} > ps8_ddr_S_AXI_BASEADDR
.got : {
*(.got)
} > ps8_ocm_ram_0_S_AXI_BASEADDR
} > ps8_ddr_S_AXI_BASEADDR
.ctors : {
__CTOR_LIST__ = .;
@ -164,7 +164,7 @@ _binary_firmware2_end = 0;
KEEP (*(.ctors))
__CTOR_END__ = .;
___CTORS_END___ = .;
} > ps8_ocm_ram_0_S_AXI_BASEADDR
} > ps8_ddr_S_AXI_BASEADDR
.dtors : {
__DTOR_LIST__ = .;
@ -175,67 +175,67 @@ _binary_firmware2_end = 0;
KEEP (*(.dtors))
__DTOR_END__ = .;
___DTORS_END___ = .;
} > ps8_ocm_ram_0_S_AXI_BASEADDR
} > ps8_ddr_S_AXI_BASEADDR
.fixup : {
__fixup_start = .;
*(.fixup)
__fixup_end = .;
} > ps8_ocm_ram_0_S_AXI_BASEADDR
} > ps8_ddr_S_AXI_BASEADDR
.eh_frame : {
*(.eh_frame)
} > ps8_ocm_ram_0_S_AXI_BASEADDR
} > ps8_ddr_S_AXI_BASEADDR
.eh_framehdr : {
__eh_framehdr_start = .;
*(.eh_framehdr)
__eh_framehdr_end = .;
} > ps8_ocm_ram_0_S_AXI_BASEADDR
} > ps8_ddr_S_AXI_BASEADDR
.gcc_except_table : {
*(.gcc_except_table)
} > ps8_ocm_ram_0_S_AXI_BASEADDR
} > ps8_ddr_S_AXI_BASEADDR
.mmu_tbl (ALIGN(16384)) : {
__mmu_tbl_start = .;
*(.mmu_tbl)
__mmu_tbl_end = .;
} > ps8_ocm_ram_0_S_AXI_BASEADDR
} > ps8_ddr_S_AXI_BASEADDR
.ARM.exidx : {
__exidx_start = .;
*(.ARM.exidx*)
*(.gnu.linkonce.armexidix.*.*)
__exidx_end = .;
} > ps8_ocm_ram_0_S_AXI_BASEADDR
} > ps8_ddr_S_AXI_BASEADDR
.preinit_array : {
__preinit_array_start = .;
KEEP (*(SORT(.preinit_array.*)))
KEEP (*(.preinit_array))
__preinit_array_end = .;
} > ps8_ocm_ram_0_S_AXI_BASEADDR
} > ps8_ddr_S_AXI_BASEADDR
.init_array : {
__init_array_start = .;
KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array))
__init_array_end = .;
} > ps8_ocm_ram_0_S_AXI_BASEADDR
} > ps8_ddr_S_AXI_BASEADDR
.fini_array : {
__fini_array_start = .;
KEEP (*(SORT(.fini_array.*)))
KEEP (*(.fini_array))
__fini_array_end = .;
} > ps8_ocm_ram_0_S_AXI_BASEADDR
} > ps8_ddr_S_AXI_BASEADDR
.ARM.attributes : {
__ARM.attributes_start = .;
*(.ARM.attributes)
__ARM.attributes_end = .;
} > ps8_ocm_ram_0_S_AXI_BASEADDR
} > ps8_ddr_S_AXI_BASEADDR
.sdata : {
__sdata_start = .;
@ -243,7 +243,7 @@ _binary_firmware2_end = 0;
*(.sdata.*)
*(.gnu.linkonce.s.*)
__sdata_end = .;
} > ps8_ocm_ram_0_S_AXI_BASEADDR
} > ps8_ddr_S_AXI_BASEADDR
.sbss (NOLOAD) : {
__sbss_start = .;
@ -251,7 +251,7 @@ _binary_firmware2_end = 0;
*(.sbss.*)
*(.gnu.linkonce.sb.*)
__sbss_end = .;
} > ps8_ocm_ram_0_S_AXI_BASEADDR
} > ps8_ddr_S_AXI_BASEADDR
.tdata : {
__tdata_start = .;
@ -259,7 +259,7 @@ _binary_firmware2_end = 0;
*(.tdata.*)
*(.gnu.linkonce.td.*)
__tdata_end = .;
} > ps8_ocm_ram_0_S_AXI_BASEADDR
} > ps8_ddr_S_AXI_BASEADDR
.tbss : {
__tbss_start = .;
@ -267,7 +267,7 @@ _binary_firmware2_end = 0;
*(.tbss.*)
*(.gnu.linkonce.tb.*)
__tbss_end = .;
} > ps8_ocm_ram_0_S_AXI_BASEADDR
} > ps8_ddr_S_AXI_BASEADDR
.bss (NOLOAD) : {
. = ALIGN(4);
@ -278,7 +278,7 @@ _binary_firmware2_end = 0;
*(COMMON)
. = ALIGN(4);
__bss_end__ = .;
} > ps8_ocm_ram_0_S_AXI_BASEADDR
} > ps8_ddr_S_AXI_BASEADDR
_SDA_BASE_ = __sdata_start + ((__sbss_end - __sdata_start) / 2 );

2
lib/sw_apps/openamp_echo_test/src/platform.h
View file

@ -48,7 +48,7 @@ struct ipi_info {
#define SHM_ADDR (void *)0x3ED08000
#define SHM_SIZE 0x00200000
#define IPI_BASEADDR 0xff310000
#define IPI_CHN_BITMASK 0x00000001 /* IPI channel bit mask APU<->RPU0 */
#define IPI_CHN_BITMASK 0x01000000 /* IPI channel bit mask APU<->RPU0 */
#define VRING0_IPI_INTR_VECT -1
#define VRING1_IPI_INTR_VECT 65
#define MASTER_CPU_ID 0

23
lib/sw_apps/openamp_echo_test/src/rsc_table.c
View file

@ -41,34 +41,33 @@
#define RPMSG_IPU_C0_FEATURES 1
/* VirtIO rpmsg device id */
#define VIRTIO_ID_RPMSG_ 7
/* Remote supports Name Service announcement */
#define VIRTIO_RPMSG_F_NS 0
#define OCM_0_START 0xFFFC0000
#define OCM_0_LEN 0x20000
#define OCM_1_START 0xFFFF0000
#define OCM_1_LEN 0x10000
#define TCM_0_START_DA 0x00000000
#define TCM_0_LEN 0x10000
#define TCM_0_LEN 0x20000
#define TCM_0_START_PA 0xFFE00000
#define TCM_1_START_DA 0x00020000
#define TCM_1_LEN 0x10000
#define TCM_1_LEN 0x20000
#define TCM_1_START_PA 0xFFE40000
#define DDR_ELF_START 0x3ED00000
#define DDR_ELF_LEN 0x40000
#define NUM_VRINGS 0x02
#define VRING_ALIGN 0x1000
#define RING_TX 0x3ED00000
#define RING_RX 0x3ED04000
#define RING_TX 0x3ED40000
#define RING_RX 0x3ED44000
#define VRING_SIZE 256
#define NUM_TABLE_ENTRIES 3
#define CARVEOUT_SRC_OFFSETS offsetof(struct remote_resource_table, ocm_0_cout), \
offsetof(struct remote_resource_table, ocm_1_cout),
#define CARVEOUT_SRC_OFFSETS offsetof(struct remote_resource_table, ocm_1_cout), \
offsetof(struct remote_resource_table, ddr_cout),
#define CARVEOUT_SRC {RSC_CARVEOUT, OCM_0_START, OCM_0_START, OCM_0_LEN, 0, 0, "OCM0_COUT",}, \
{RSC_CARVEOUT, OCM_1_START, OCM_1_START, OCM_1_LEN, 0, 0, "ELF_DATA_COUT",},
#define CARVEOUT_SRC {RSC_CARVEOUT, OCM_1_START, OCM_1_START, OCM_1_LEN, 0, 0, "OCM1_COUT",}, \
{RSC_CARVEOUT, DDR_ELF_START, DDR_ELF_START, DDR_ELF_LEN, 0, 0, "ELF_DATA_COUT",},
const struct remote_resource_table __resource resources =

2
lib/sw_apps/openamp_echo_test/src/rsc_table.h
View file

@ -45,7 +45,7 @@ struct remote_resource_table {
unsigned int offset[NO_RESOURCE_ENTRIES];
/* text carve out entry */
struct fw_rsc_carveout ocm_0_cout;
struct fw_rsc_carveout ddr_cout;
struct fw_rsc_carveout ocm_1_cout;
/* rpmsg vdev entry */
struct fw_rsc_vdev rpmsg_vdev;