sw_apps:zynq_fsbl: Updated misc folder for 2015.4
Updated ps7 init and xparameters files in misc folder for zc702, zc706, zed boards - with 2015.4 Signed-off-by: Sarat Chand Savitala <saratcha@xilinx.com> Acked-by: Srikanth Vemula <svemula@xilinx.com>
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9 changed files with 7531 additions and 5179 deletions
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@ -39,6 +39,14 @@
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#define XPAR_XCANPS_0_CAN_CLK_FREQ_HZ 23809523
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/******************************************************************/
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/* Definitions for peripheral PS7_DDR_0 */
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#define XPAR_PS7_DDR_0_S_AXI_BASEADDR 0x00100000
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#define XPAR_PS7_DDR_0_S_AXI_HIGHADDR 0x3FFFFFFF
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/******************************************************************/
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/* Definitions for driver DEVCFG */
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#define XPAR_PS7_AFI_3_S_AXI_HIGHADDR 0xF800BFFF
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/* Definitions for peripheral PS7_CORESIGHT_COMP_0 */
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#define XPAR_PS7_CORESIGHT_COMP_0_S_AXI_BASEADDR 0xF8800000
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#define XPAR_PS7_CORESIGHT_COMP_0_S_AXI_HIGHADDR 0xF88FFFFF
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/* Definitions for peripheral PS7_DDR_0 */
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#define XPAR_PS7_DDR_0_S_AXI_BASEADDR 0x00100000
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#define XPAR_PS7_DDR_0_S_AXI_HIGHADDR 0x3FFFFFFF
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/* Definitions for peripheral PS7_DDRC_0 */
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#define XPAR_PS7_DDRC_0_S_AXI_BASEADDR 0xF8006000
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#define XPAR_PS7_DDRC_0_S_AXI_HIGHADDR 0xF8006FFF
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/******************************************************************/
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/***Definitions for Core_nIRQ/nFIQ interrupts ****/
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/* Definitions for driver SCUGIC */
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#define XPAR_XSCUGIC_NUM_INSTANCES 1
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#define XPAR_PS7_SD_0_BASEADDR 0xE0100000
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#define XPAR_PS7_SD_0_HIGHADDR 0xE0100FFF
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#define XPAR_PS7_SD_0_SDIO_CLK_FREQ_HZ 50000000
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#define XPAR_PS7_SD_0_HAS_CD 1
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#define XPAR_PS7_SD_0_HAS_WP 1
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/******************************************************************/
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#define XPAR_XSDPS_0_BASEADDR 0xE0100000
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#define XPAR_XSDPS_0_HIGHADDR 0xE0100FFF
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#define XPAR_XSDPS_0_SDIO_CLK_FREQ_HZ 50000000
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#define XPAR_XSDPS_0_HAS_CD 1
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#define XPAR_XSDPS_0_HAS_WP 1
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/******************************************************************/
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#define STDIN_BASEADDRESS 0xE0001000
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#define STDOUT_BASEADDRESS 0xE0001000
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/******************************************************************/
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/* Definitions for peripheral PS7_DDR_0 */
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#define XPAR_PS7_DDR_0_S_AXI_BASEADDR 0x00100000
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#define XPAR_PS7_DDR_0_S_AXI_HIGHADDR 0x3FFFFFFF
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/******************************************************************/
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/* Definitions for driver DEVCFG */
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#define XPAR_PS7_AFI_3_S_AXI_HIGHADDR 0xF800BFFF
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/* Definitions for peripheral PS7_CORESIGHT_COMP_0 */
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#define XPAR_PS7_CORESIGHT_COMP_0_S_AXI_BASEADDR 0xF8800000
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#define XPAR_PS7_CORESIGHT_COMP_0_S_AXI_HIGHADDR 0xF88FFFFF
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/* Definitions for peripheral PS7_DDR_0 */
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#define XPAR_PS7_DDR_0_S_AXI_BASEADDR 0x00100000
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#define XPAR_PS7_DDR_0_S_AXI_HIGHADDR 0x3FFFFFFF
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/* Definitions for peripheral PS7_DDRC_0 */
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#define XPAR_PS7_DDRC_0_S_AXI_BASEADDR 0xF8006000
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#define XPAR_PS7_DDRC_0_S_AXI_HIGHADDR 0xF8006FFF
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/* Definitions for peripheral PS7_QSPI_LINEAR_0 */
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#define XPAR_PS7_QSPI_LINEAR_0_S_AXI_BASEADDR 0xFC000000
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#define XPAR_PS7_QSPI_LINEAR_0_S_AXI_HIGHADDR 0xFCFFFFFF
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#define XPAR_PS7_QSPI_LINEAR_0_S_AXI_HIGHADDR 0xFDFFFFFF
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/* Definitions for peripheral PS7_RAM_0 */
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/******************************************************************/
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/***Definitions for Core_nIRQ/nFIQ interrupts ****/
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/* Definitions for driver SCUGIC */
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#define XPAR_XSCUGIC_NUM_INSTANCES 1
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#define XPAR_PS7_SD_0_BASEADDR 0xE0100000
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#define XPAR_PS7_SD_0_HIGHADDR 0xE0100FFF
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#define XPAR_PS7_SD_0_SDIO_CLK_FREQ_HZ 50000000
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#define XPAR_PS7_SD_0_HAS_CD 1
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#define XPAR_PS7_SD_0_HAS_WP 1
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/******************************************************************/
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#define XPAR_XSDPS_0_BASEADDR 0xE0100000
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#define XPAR_XSDPS_0_HIGHADDR 0xE0100FFF
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#define XPAR_XSDPS_0_SDIO_CLK_FREQ_HZ 50000000
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#define XPAR_XSDPS_0_HAS_CD 1
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#define XPAR_XSDPS_0_HAS_WP 1
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/******************************************************************/
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#define STDIN_BASEADDRESS 0xE0001000
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#define STDOUT_BASEADDRESS 0xE0001000
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/******************************************************************/
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/* Definitions for peripheral PS7_DDR_0 */
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#define XPAR_PS7_DDR_0_S_AXI_BASEADDR 0x00100000
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#define XPAR_PS7_DDR_0_S_AXI_HIGHADDR 0x1FFFFFFF
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/******************************************************************/
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/* Definitions for driver DEVCFG */
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#define XPAR_PS7_AFI_3_S_AXI_HIGHADDR 0xF800BFFF
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/* Definitions for peripheral PS7_CORESIGHT_COMP_0 */
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#define XPAR_PS7_CORESIGHT_COMP_0_S_AXI_BASEADDR 0xF8800000
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#define XPAR_PS7_CORESIGHT_COMP_0_S_AXI_HIGHADDR 0xF88FFFFF
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/* Definitions for peripheral PS7_DDR_0 */
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#define XPAR_PS7_DDR_0_S_AXI_BASEADDR 0x00100000
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#define XPAR_PS7_DDR_0_S_AXI_HIGHADDR 0x1FFFFFFF
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/* Definitions for peripheral PS7_DDRC_0 */
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#define XPAR_PS7_DDRC_0_S_AXI_BASEADDR 0xF8006000
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#define XPAR_PS7_DDRC_0_S_AXI_HIGHADDR 0xF8006FFF
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/******************************************************************/
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/***Definitions for Core_nIRQ/nFIQ interrupts ****/
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/* Definitions for driver SCUGIC */
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#define XPAR_XSCUGIC_NUM_INSTANCES 1
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#define XPAR_PS7_SD_0_BASEADDR 0xE0100000
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#define XPAR_PS7_SD_0_HIGHADDR 0xE0100FFF
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#define XPAR_PS7_SD_0_SDIO_CLK_FREQ_HZ 50000000
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#define XPAR_PS7_SD_0_HAS_CD 1
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#define XPAR_PS7_SD_0_HAS_WP 1
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/******************************************************************/
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#define XPAR_XSDPS_0_BASEADDR 0xE0100000
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#define XPAR_XSDPS_0_HIGHADDR 0xE0100FFF
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#define XPAR_XSDPS_0_SDIO_CLK_FREQ_HZ 50000000
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#define XPAR_XSDPS_0_HAS_CD 1
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#define XPAR_XSDPS_0_HAS_WP 1
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/******************************************************************/
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