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14 commits

Author SHA1 Message Date
Andrei-Liviu Simion
1a280fdfc7 dp: Unified naming of xdptx and xdprx to xdp. 
As per Xilinx standalone coding guidelines.

Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
 2015-04-26 10:34:21 +05:30
Andrei-Liviu Simion
4d686c08e0 dp: Check for ARM first for usleep. 
Zynq systems may have both MicroBlaze and ARM. If this is the case, assume that
the application is running on an ARM processor.

Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
 2015-04-26 10:34:03 +05:30
Andrei-Liviu Simion
3736bcbce0 dp: Reordered the listing of initialization functions. 
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
 2015-04-26 10:33:34 +05:30
Andrei-Liviu Simion
c80bd4b59d dp: rx: Increased the time to wait for the PHY to be ready. 
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
 2015-04-26 10:33:34 +05:30
Andrei-Liviu Simion
bd16c255da dp: rx: Added timer functionality. 
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
 2015-04-26 10:33:28 +05:30
Andrei-Liviu Simion
31a7c5fa1d dp: Updated copyright for 2015. 
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
 2015-04-26 10:33:12 +05:30
Andrei-Liviu Simion
9c570b85fa dp: dptx: The maximum iteration count for channel equalization is fixed at 5. 
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
 2015-04-26 10:33:07 +05:30
Andrei-Liviu Simion
6cdf439d02 dp: tx: The channel equalization sequence only depends on the loop counter. 
No check is done for same voltage swing.

Required for DisplayPort compliance.

Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
 2015-04-26 10:33:06 +05:30
Andrei-Liviu Simion
331244ad31 dp: dptx: Training should fail if clock recovery fails on maximum voltage swing. 
Required for DisplayPort compliance.

Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
 2015-04-26 10:33:05 +05:30
Andrei-Liviu Simion
55889d1a8d dp: dptx: Set training pattern to 0 even if training fails. 
Required for DisplayPort compliance.

Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
 2015-04-26 10:33:05 +05:30
Andrei-Liviu Simion
e6006d9818 dp: XDptx_TimerHandler->XDp_TimerHandler. 
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
 2015-04-26 10:32:21 +05:30
Andrei-Liviu Simion
81cb2fe913 dp: Export IP configuration parameter for the DisplayPort core type - TX or RX. 
Exporting the C_FLOW_DIRECTION configuration parameter.
XDp_Config's IsRx member specifies that the core is an RX if = 0, TX if = 1.

Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
 2015-04-26 10:32:19 +05:30
Andrei-Liviu Simion
f44bb328d6 dp: XDptx_Config->XDp_Config 
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
 2015-04-26 10:32:16 +05:30
Andrei-Liviu Simion
202d0114c1 dp: Initial version based on dptx. 
Dptx driver moved to a common DisplayPort driver, Dp, in order to have a common
location for both transmit (Dptx) and receive (Dprx).

Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
 2015-04-26 10:32:14 +05:30