Commit graph

3 commits

Author SHA1 Message Date
Rohit Consul
cf3ea2ed03 vprocss: Add 2 sec wait to example design source files
VTC in example design has switched to a slower 9MHz clock.This
essentially provides < 2fps frame rate. Vidout needs 3-4 frames
to acquire lock. After vpss configuration wait for 2 sec (mb_sleep)
before checking for vidout lock

Signed-off-by: Rohit Consul <rohit.consul@xilinx.com>
Acked-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
2015-09-15 18:47:40 +05:30
Rohit Consul
f60694c29d vprocss example: MIG instance name changed in example design
Updated the system.c to use canonical name for MIG to avoid
dependency on instance name

Signed-off-by: Rohit Consul <rohit.consul@xilinx.com>
Acked-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
2015-09-04 11:04:31 +05:30
Rohit Consul
c32323a043 vprocss: Add xsct tck script to automate sdk project creation
xsct scipt file added to automate the process of generating the
elf file(s) from the provided hdf file

Signed-off-by: Rohit Consul <rohit.consul@xilinx.com>
Acked-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
2015-09-04 11:03:32 +05:30