Class Members

Xilinx Processor IP Library

Software Drivers

Here is a list of all documented file members with links to the documentation:

- x -

XSRIO_ASM_ID_CAR_ASMID_MASK : xsrio_hw.h
XSRIO_ASM_ID_CAR_ASMID_SHIFT : xsrio_hw.h
XSRIO_ASM_ID_CAR_ASMVID_MASK : xsrio_hw.h
XSRIO_ASM_ID_CAR_OFFSET : xsrio_hw.h
XSRIO_ASM_INFO_CAR_ASMREV_MASK : xsrio_hw.h
XSRIO_ASM_INFO_CAR_ASMREV_SHIFT : xsrio_hw.h
XSRIO_ASM_INFO_CAR_EFP_MASK : xsrio_hw.h
XSRIO_ASM_INFO_CAR_OFFSET : xsrio_hw.h
XSRIO_BASE_DID_CSR_BDID_MASK : xsrio_hw.h
XSRIO_BASE_DID_CSR_BDID_SHIFT : xsrio_hw.h
XSRIO_BASE_DID_CSR_LBDID_MASK : xsrio_hw.h
XSRIO_BASE_DID_CSR_OFFSET : xsrio_hw.h
XSrio_CfgInitialize() : xsrio.c
XSRIO_COMPONENT_TAG_CSR_OFFSET : xsrio_hw.h
XSRIO_DEV_ID_CAR_OFFSET : xsrio_hw.h
XSRIO_DEV_ID_DEVID_CAR_MASK : xsrio_hw.h
XSRIO_DEV_ID_DEVID_CAR_SHIFT : xsrio_hw.h
XSRIO_DEV_ID_VDRID_CAR_MASK : xsrio_hw.h
XSRIO_DEV_INFO_CAR_DEVREV_MASK : xsrio_hw.h
XSRIO_DEV_INFO_CAR_MAJREV_MASK : xsrio_hw.h
XSRIO_DEV_INFO_CAR_MINREV_MASK : xsrio_hw.h
XSRIO_DEV_INFO_CAR_OFFSET : xsrio_hw.h
XSRIO_DEV_INFO_CAR_PATCH_MASK : xsrio_hw.h
XSRIO_DST_OPS_CAR_OFFSET : xsrio_hw.h
XSRIO_EFB_HEADER_EFID_MASK : xsrio_hw.h
XSRIO_EFB_HEADER_EFP_MASK : xsrio_hw.h
XSRIO_EFB_HEADER_EFP_SHIFT : xsrio_hw.h
XSRIO_EFB_HEADER_OFFSET : xsrio_hw.h
XSRIO_EFB_LPSL_OFFSET : xsrio_hw.h
XSrio_GetPEType() : xsrio.c
XSrio_GetPortStatus() : xsrio.c
XSrio_GetWaterMark() : xsrio.c
XSRIO_HOST_DID_LOCK_CSR_HBDID_MASK : xsrio_hw.h
XSRIO_HOST_DID_LOCK_CSR_OFFSET : xsrio_hw.h
XSRIO_IMP_BCSR_FRX_FLOW_CNTL_MASK : xsrio_hw.h
XSRIO_IMP_BCSR_OFFSET : xsrio_hw.h
XSRIO_IMP_BCSR_RXFLOW_CNTLONLY_MASK : xsrio_hw.h
XSRIO_IMP_BCSR_RXSIZE_MASK : xsrio_hw.h
XSRIO_IMP_BCSR_TX_FLOW_CNTL_MASK : xsrio_hw.h
XSRIO_IMP_BCSR_TXREQ_REORDER_MASK : xsrio_hw.h
XSRIO_IMP_BCSR_TXSIZE_MASK : xsrio_hw.h
XSRIO_IMP_BCSR_TXSIZE_SHIFT : xsrio_hw.h
XSRIO_IMP_BCSR_UNIFIED_CLK_MASK : xsrio_hw.h
XSRIO_IMP_MRIR_OFFSET : xsrio_hw.h
XSRIO_IMP_MRIR_REQ_CRF_MASK : xsrio_hw.h
XSRIO_IMP_MRIR_REQ_DESTID_MASK : xsrio_hw.h
XSRIO_IMP_MRIR_REQ_PRIO_MASK : xsrio_hw.h
XSRIO_IMP_MRIR_REQ_TID_MASK : xsrio_hw.h
XSRIO_IMP_WCSR_OFFSET : xsrio_hw.h
XSRIO_IMP_WCSR_WM0_MASK : xsrio_hw.h
XSRIO_IMP_WCSR_WM1_MASK : xsrio_hw.h
XSRIO_IMP_WCSR_WM1_SHIFT : xsrio_hw.h
XSRIO_IMP_WCSR_WM2_MASK : xsrio_hw.h
XSRIO_IMP_WCSR_WM2_SHIFT : xsrio_hw.h
XSrio_IsOperationSupported() : xsrio.c
XSRIO_LCS0_BASEADDR_CSR_OFFSET : xsrio_hw.h
XSRIO_LCS1_BASEADDR_CSR_OFFSET : xsrio_hw.h
XSRIO_LCS1_BASEADDR_LCSBA_CSR_MASK : xsrio_hw.h
XSRIO_LCS1_BASEADDR_LCSBA_CSR_SHIFT : xsrio_hw.h
XSrio_LookupConfig() : xsrio_sinit.c
XSRIO_PEF_CAR_BRIDGE_MASK : xsrio_hw.h
XSRIO_PEF_CAR_CRF_MASK : xsrio_hw.h
XSRIO_PEF_CAR_CTS_MASK : xsrio_hw.h
XSRIO_PEF_CAR_EAS_MASK : xsrio_hw.h
XSRIO_PEF_CAR_EF_MASK : xsrio_hw.h
XSRIO_PEF_CAR_MEMORY_MASK : xsrio_hw.h
XSRIO_PEF_CAR_MPORT_MASK : xsrio_hw.h
XSRIO_PEF_CAR_OFFSET : xsrio_hw.h
XSRIO_PEF_CAR_PROCESSOR_MASK : xsrio_hw.h
XSRIO_PEF_CAR_SWITCH_MASK : xsrio_hw.h
XSRIO_PELL_CTRL_CSR_EAC_MASK : xsrio_hw.h
XSRIO_PELL_CTRL_CSR_OFFSET : xsrio_hw.h
XSRIO_PORT_GEN_CTL_CSR_DISCOVERED_MASK : xsrio_hw.h
XSRIO_PORT_GEN_CTL_CSR_HOST_MASK : xsrio_hw.h
XSRIO_PORT_GEN_CTL_CSR_MENABLE_MASK : xsrio_hw.h
XSRIO_PORT_GEN_CTL_CSR_OFFSET : xsrio_hw.h
XSRIO_PORT_LINK_TOUT_CSR_OFFSET : xsrio_hw.h
XSRIO_PORT_LINK_TOUT_CSR_TOUTVAL_MASK : xsrio_hw.h
XSRIO_PORT_LINK_TOUT_CSR_TOUTVAL_SHIFT : xsrio_hw.h
XSRIO_PORT_N_ACKID_CSR_CLSACKID_MASK : xsrio_hw.h
XSRIO_PORT_N_ACKID_CSR_IBACKID_MASK : xsrio_hw.h
XSRIO_PORT_N_ACKID_CSR_IBACKID_SHIFT : xsrio_hw.h
XSRIO_PORT_N_ACKID_CSR_OBACKID_MASK : xsrio_hw.h
XSRIO_PORT_N_ACKID_CSR_OFFSET : xsrio_hw.h
XSRIO_PORT_N_ACKID_CSR_OSACKID_MASK : xsrio_hw.h
XSRIO_PORT_N_ACKID_CSR_RESET_IBACKID_MASK : xsrio_hw.h
XSRIO_PORT_N_ACKID_CSR_RESET_OBACKID_MASK : xsrio_hw.h
XSRIO_PORT_N_CTL_CSR_ENUMB_MASK : xsrio_hw.h
XSRIO_PORT_N_CTL_CSR_EPWDS_MASK : xsrio_hw.h
XSRIO_PORT_N_CTL_CSR_EPWOR_MASK : xsrio_hw.h
XSRIO_PORT_N_CTL_CSR_ERRD_MASK : xsrio_hw.h
XSRIO_PORT_N_CTL_CSR_IPE_MASK : xsrio_hw.h
XSRIO_PORT_N_CTL_CSR_IPW_MASK : xsrio_hw.h
XSRIO_PORT_N_CTL_CSR_MCENT_MASK : xsrio_hw.h
XSRIO_PORT_N_CTL_CSR_OFFSET : xsrio_hw.h
XSRIO_PORT_N_CTL_CSR_OPE_MASK : xsrio_hw.h
XSRIO_PORT_N_CTL_CSR_PD_MASK : xsrio_hw.h
XSRIO_PORT_N_CTL_CSR_PTYPE_MASK : xsrio_hw.h
XSRIO_PORT_N_CTL_CSR_PW_MASK : xsrio_hw.h
XSRIO_PORT_N_CTL_CSR_PW_SHIFT : xsrio_hw.h
XSRIO_PORT_N_CTL_CSR_PWO_MASK : xsrio_hw.h
XSRIO_PORT_N_CTL_CSR_PWO_SHIFT : xsrio_hw.h
XSRIO_PORT_N_CTL_CSR_RESET_PWO_MASK : xsrio_hw.h
XSRIO_PORT_N_CTL_CSR_STATUS_ALL_MASK : xsrio_hw.h
XSRIO_PORT_N_ERR_STS_CSR_ERR_ALL_MASK : xsrio_hw.h
XSRIO_PORT_N_ERR_STS_CSR_FLOWCNTL_MASK : xsrio_hw.h
XSRIO_PORT_N_ERR_STS_CSR_IDL_SEQ_MASK : xsrio_hw.h
XSRIO_PORT_N_ERR_STS_CSR_IDL_SEQE_MASK : xsrio_hw.h
XSRIO_PORT_N_ERR_STS_CSR_IDL_SEQS_MASK : xsrio_hw.h
XSRIO_PORT_N_ERR_STS_CSR_IERRE_MASK : xsrio_hw.h
XSRIO_PORT_N_ERR_STS_CSR_IERRS_MASK : xsrio_hw.h
XSRIO_PORT_N_ERR_STS_CSR_IRTS_MASK : xsrio_hw.h
XSRIO_PORT_N_ERR_STS_CSR_OERRE_MASK : xsrio_hw.h
XSRIO_PORT_N_ERR_STS_CSR_OERRS_MASK : xsrio_hw.h
XSRIO_PORT_N_ERR_STS_CSR_OFFSET : xsrio_hw.h
XSRIO_PORT_N_ERR_STS_CSR_OR_MASK : xsrio_hw.h
XSRIO_PORT_N_ERR_STS_CSR_ORE_MASK : xsrio_hw.h
XSRIO_PORT_N_ERR_STS_CSR_ORTS_MASK : xsrio_hw.h
XSRIO_PORT_N_ERR_STS_CSR_PERR_MASK : xsrio_hw.h
XSRIO_PORT_N_ERR_STS_CSR_POK_MASK : xsrio_hw.h
XSRIO_PORT_N_ERR_STS_CSR_PUINT_MASK : xsrio_hw.h
XSRIO_PORT_N_MNT_REQ_CSR_CMD_MASK : xsrio_hw.h
XSRIO_PORT_N_MNT_REQ_CSR_OFFSET : xsrio_hw.h
XSRIO_PORT_N_MNT_RES_CSR_ACKS_MASK : xsrio_hw.h
XSRIO_PORT_N_MNT_RES_CSR_LS_MASK : xsrio_hw.h
XSRIO_PORT_N_MNT_RES_CSR_OFFSET : xsrio_hw.h
XSRIO_PORT_N_MNT_RES_CSR_RVALID_MASK : xsrio_hw.h
XSRIO_PORT_RESP_TOUT_CSR_OFFSET : xsrio_hw.h
XSRIO_PORT_RESP_TOUT_CSR_TOUTVAL_MASK : xsrio_hw.h
XSRIO_PORT_RESP_TOUT_CSR_TOUTVAL_SHIFT : xsrio_hw.h
XSrio_ReadReg : xsrio_hw.h
XSrio_SetWaterMark() : xsrio.c
XSRIO_SL_HEADER_EFID_MASK : xsrio_hw.h
XSRIO_SL_HEADER_EFP_MASK : xsrio_hw.h
XSRIO_SL_HEADER_EFP_SHIFT : xsrio_hw.h
XSRIO_SL_HEADER_OFFSET : xsrio_hw.h
XSRIO_SLS0_CSR_DECODING_ERRORS_MASK : xsrio_hw.h
XSRIO_SLS0_CSR_LANE_NUM_MASK : xsrio_hw.h
XSRIO_SLS0_CSR_LANESYNC_CHAN_MASK : xsrio_hw.h
XSRIO_SLS0_CSR_OFFSET : xsrio_hw.h
XSRIO_SLS0_CSR_PORT_NUM_MASK : xsrio_hw.h
XSRIO_SLS0_CSR_RCV_INPUT_INV_MASK : xsrio_hw.h
XSRIO_SLS0_CSR_RCV_TRAINED_MASK : xsrio_hw.h
XSRIO_SLS0_CSR_RCVLANE_RDY_MASK : xsrio_hw.h
XSRIO_SLS0_CSR_RCVLANE_SYNC_MASK : xsrio_hw.h
XSRIO_SLS0_CSR_RCVTRAINED_CHAN_MASK : xsrio_hw.h
XSRIO_SLS0_CSR_STAT1_IMP_MASK : xsrio_hw.h
XSRIO_SLS0_CSR_TRANSMIT_MODE_MASK : xsrio_hw.h
XSRIO_SLS0_CSR_TRANSMIT_TYPE_MASK : xsrio_hw.h
XSRIO_SLS1_CSR_CPLR_TRAINED_MASK : xsrio_hw.h
XSRIO_SLS1_CSR_CPTEDS_MASK : xsrio_hw.h
XSRIO_SLS1_CSR_CPTEIS_MASK : xsrio_hw.h
XSRIO_SLS1_CSR_IDLE2_INFO_MASK : xsrio_hw.h
XSRIO_SLS1_CSR_IDLE2_REC_MASK : xsrio_hw.h
XSRIO_SLS1_CSR_IMPDEFINED_MASK : xsrio_hw.h
XSRIO_SLS1_CSR_LANENUM_MASK : xsrio_hw.h
XSRIO_SLS1_CSR_OFFSET : xsrio_hw.h
XSRIO_SLS1_CSR_RXPORT_WIDTH_MASK : xsrio_hw.h
XSRIO_SLS1_CSR_SCRDSCR_EN_MASK : xsrio_hw.h
XSRIO_SLS1_CSR_VALCHANGED_MASK : xsrio_hw.h
XSRIO_SRC_OPS_CAR_OFFSET : xsrio_hw.h
XSRIO_SRCDST_OPS_CAR_ATOMIC_CLR_MASK : xsrio_hw.h
XSRIO_SRCDST_OPS_CAR_ATOMIC_CSWP_MASK : xsrio_hw.h
XSRIO_SRCDST_OPS_CAR_ATOMIC_DECR_MASK : xsrio_hw.h
XSRIO_SRCDST_OPS_CAR_ATOMIC_INCR_MASK : xsrio_hw.h
XSRIO_SRCDST_OPS_CAR_ATOMIC_SET_MASK : xsrio_hw.h
XSRIO_SRCDST_OPS_CAR_ATOMIC_SWP_MASK : xsrio_hw.h
XSRIO_SRCDST_OPS_CAR_ATOMIC_TSWP_MASK : xsrio_hw.h
XSRIO_SRCDST_OPS_CAR_DATA_MSG_MASK : xsrio_hw.h
XSRIO_SRCDST_OPS_CAR_DOORBELL_MASK : xsrio_hw.h
XSRIO_SRCDST_OPS_CAR_PORT_WRITE_MASK : xsrio_hw.h
XSRIO_SRCDST_OPS_CAR_READ_MASK : xsrio_hw.h
XSRIO_SRCDST_OPS_CAR_SWRITE_MASK : xsrio_hw.h
XSRIO_SRCDST_OPS_CAR_WRITE_MASK : xsrio_hw.h
XSRIO_SRCDST_OPS_CAR_WRITE_RESPONSE_MASK : xsrio_hw.h
XSRIO_SWP_INFO_CAR_OFFSET : xsrio_hw.h
XSrio_WriteReg : xsrio_hw.h