201 lines
5.8 KiB
C
201 lines
5.8 KiB
C
/******************************************************************************
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* Copyright (C) 2015 Xilinx, Inc. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* Use of the Software is limited solely to applications:
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* (a) running on a Xilinx device, or
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* (b) that interact with a Xilinx device through a bus or interconnect.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
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* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Except as contained in this notice, the name of the Xilinx shall not be used
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* in advertising or otherwise to promote the sale, use or other dealings in
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* this Software without prior written authorization from Xilinx.
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******************************************************************************/
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#include "xpfw_scheduler.h"
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/**
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* PMU PIT Clock Frequency and Tick Calculation
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* TODO: Replace with respective CLK_FREQ from xparameters.h
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*/
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#define PMU_PIT_CLK_FREQ 4000000U
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#define TICK_MILLISECONDS 10U
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#define COUNT_PER_TICK ((PMU_PIT_CLK_FREQ / 1000U)* TICK_MILLISECONDS )
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/**
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* Microblaze IOModule PIT Register Offsets
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* Used internally in this file
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*/
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#define PIT_PRELOAD_OFFSET 0U
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#define PIT_COUNTER_OFFSET 4U
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#define PIT_CONTROL_OFFSET 8U
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XStatus XPfw_SchedulerInit(XPfw_Scheduler_t *SchedPtr, u32 PitBaseAddr)
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{
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u32 Idx;
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XStatus Status;
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if (SchedPtr == NULL) {
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Status = XST_FAILURE;
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goto done;
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}
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/* Disable all the tasks */
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for (Idx = 0U; Idx < XPFW_SCHED_MAX_TASK; Idx++) {
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SchedPtr->TaskList[Idx].Interval = 0U;
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SchedPtr->TaskList[Idx].Callback = NULL;
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SchedPtr->TaskList[Idx].Status = XPFW_TASK_STATUS_DISABLED;
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}
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SchedPtr->Enabled = FALSE;
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SchedPtr->PitBaseAddr = PitBaseAddr;
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SchedPtr->Tick = 0U;
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XPfw_Write32(SchedPtr->PitBaseAddr + PIT_CONTROL_OFFSET, 0U);
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/* Successfully completed init */
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Status = XST_SUCCESS;
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done:
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return Status;
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}
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XStatus XPfw_SchedulerStart(XPfw_Scheduler_t *SchedPtr)
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{
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XStatus Status;
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if (SchedPtr == NULL) {
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Status = XST_FAILURE;
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goto done;
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}
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SchedPtr->Enabled = TRUE;
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XPfw_Write32(SchedPtr->PitBaseAddr + PIT_PRELOAD_OFFSET,
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COUNT_PER_TICK);
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XPfw_Write32(SchedPtr->PitBaseAddr + PIT_CONTROL_OFFSET, 3U);
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Status = XST_SUCCESS;
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done:
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return Status;
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}
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XStatus XPfw_SchedulerStop(XPfw_Scheduler_t *SchedPtr)
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{
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SchedPtr->Enabled =FALSE;
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XPfw_Write32(SchedPtr->PitBaseAddr + PIT_PRELOAD_OFFSET, 0U );
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XPfw_Write32(SchedPtr->PitBaseAddr + PIT_CONTROL_OFFSET, 0U );
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return XST_SUCCESS;
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}
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void XPfw_SchedulerTickHandler(XPfw_Scheduler_t *SchedPtr)
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{
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u32 Idx;
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/* TODO: Add check to detect task misses */
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SchedPtr->Tick++;
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for (Idx = 0U; Idx < XPFW_SCHED_MAX_TASK; Idx++) {
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/* Check if it this task can be triggered */
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if ((0U != SchedPtr->TaskList[Idx].Interval) &&
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(NULL != SchedPtr->TaskList[Idx].Callback) &&
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(0U == (SchedPtr->Tick % SchedPtr->TaskList[Idx].Interval))) {
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/* Mark the Task as TRIGGERED */
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SchedPtr->TaskList[Idx].Status = XPFW_TASK_STATUS_TRIGGERED;
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}
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}
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}
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XStatus XPfw_SchedulerProcess(XPfw_Scheduler_t *SchedPtr)
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{
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u32 Idx;
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XStatus Status;
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u32 CallCount = 0U;
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for (Idx = 0U; Idx < XPFW_SCHED_MAX_TASK; Idx++) {
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/* Check if the task is triggered and has a valid Callback */
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if ((XPFW_TASK_STATUS_TRIGGERED == SchedPtr->TaskList[Idx].Status) &&
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(NULL != SchedPtr->TaskList[Idx].Callback)) {
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/* Execute the Task */
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SchedPtr->TaskList[Idx].Callback();
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/* Disable the executed Task */
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SchedPtr->TaskList[Idx].Status = XPFW_TASK_STATUS_DISABLED;
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CallCount++;
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}
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}
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if (CallCount > 0U) {
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Status = XST_SUCCESS;
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} else {
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/* Failed because none of the tasks were triggered */
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Status = XST_FAILURE;
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}
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return Status;
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}
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XStatus XPfw_SchedulerAddTask(XPfw_Scheduler_t *SchedPtr, u32 OwnerId,u32 MilliSeconds, XPfw_Callback_t Callback)
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{
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u32 Idx;
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XStatus Status;
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/* Get the Next Free Task Index */
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for (Idx=0U;Idx < XPFW_SCHED_MAX_TASK;Idx++) {
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if (0U == SchedPtr->TaskList[Idx].Interval) {
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break;
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}
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}
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/* Check if we have reached Max Task limit */
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if (XPFW_SCHED_MAX_TASK == Idx) {
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Status = XST_FAILURE;
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goto done;
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}
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/* Add Interval as a factor of TICK_MILLISECONDS */
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SchedPtr->TaskList[Idx].Interval = MilliSeconds/TICK_MILLISECONDS;
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SchedPtr->TaskList[Idx].OwnerId = OwnerId;
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SchedPtr->TaskList[Idx].Callback = Callback;
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Status = XST_SUCCESS;
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done:
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return Status;
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}
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XStatus XPfw_SchedulerRemoveTask(XPfw_Scheduler_t *SchedPtr, u32 OwnerId, u32 MilliSeconds, XPfw_Callback_t Callback)
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{
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u32 Idx;
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u32 TaskCount = 0;
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/*Find the Task Index */
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for (Idx = 0U; Idx < XPFW_SCHED_MAX_TASK; Idx++) {
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if ((Callback == SchedPtr->TaskList[Idx].Callback) &&
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(SchedPtr->TaskList[Idx].OwnerId == OwnerId) &&
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((SchedPtr->TaskList[Idx].Interval == MilliSeconds/TICK_MILLISECONDS) ||
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(0U == MilliSeconds))) {
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SchedPtr->TaskList[Idx].Interval = 0U;
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SchedPtr->TaskList[Idx].OwnerId = 0U;
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SchedPtr->TaskList[Idx].Callback = NULL;
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TaskCount++;
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}
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}
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fw_printf("%s: Removed %d tasks\r\n", __func__, TaskCount);
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return ((TaskCount > 0) ? XST_SUCCESS : XST_FAILURE);
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}
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