667 lines
23 KiB
C
667 lines
23 KiB
C
/******************************************************************************
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*
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* Copyright (C) 2014 Xilinx, Inc. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* Use of the Software is limited solely to applications:
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* (a) running on a Xilinx device, or
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* (b) that interact with a Xilinx device through a bus or interconnect.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
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* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Except as contained in this notice, the name of the Xilinx shall not be used
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* in advertising or otherwise to promote the sale, use or other dealings in
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* this Software without prior written authorization from Xilinx.
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*
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******************************************************************************/
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/*****************************************************************************/
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/**
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*
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* ZDMA is a general purpose DMA designed to support memory to memory and memory
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* to IO buffer transfers. ALTO has two instance of general purpose ZDMA.
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* One is located in FPD (full power domain) which is GDMA and other is located
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* in LPD (low power domain) which is ADMA.
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*
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* GMDA & ADMA are configured each with 8 DMA channels and and each channel can
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* be programmed secure or non-secure.
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* Each channel is divided into two functional sides, Source (Read) and
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* Destination (Write). Each DMA channel can be independently programmed
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* in one of following DMA modes.
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* - Simple DMA
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* - Normal data transfer from source to destination.
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* - Write Only mode.
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* - Read Only mode.
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* - Scatter Gather DMA
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* - Only Normal mode it can't support other two modes.
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* In Scatter gather descriptor can be of 3 types
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* - Linear descriptor.
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* - Linked list descriptor
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* - Hybrid descriptor (Combination of both Linear and Linked list)
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* Our driver will not support Hybrid type of descriptor.
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*
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* <b>Initialization & Configuration</b>
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*
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* The device driver enables higher layer software (e.g., an application) to
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* communicate to the ZDMA core.
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*
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* XZDma_CfgInitialize() API is used to initialize the ZDMA core.
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* The user needs to first call the XZDma_LookupConfig() API which returns
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* the Configuration structure pointer which is passed as a parameter to the
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* XZDma_CfgInitialize() API.
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*
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* <b> Interrupts </b>
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* The driver provides an interrupt handler XZDma_IntrHandler for handling
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* the interrupt from the ZDMA core. The users of this driver have to
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* register this handler with the interrupt system and provide the callback
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* functions by using XZDma_SetCallBack API. In this version Descriptor done
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* option is disabled.
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*
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* <b> Virtual Memory </b>
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*
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* This driver supports Virtual Memory. The RTOS is responsible for calculating
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* the correct device base address in Virtual Memory space.
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*
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* <b> Threads </b>
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*
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* This driver is not thread safe. Any needs for threads or thread mutual
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* exclusion must be satisfied by the layer above this driver.
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*
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* <b> Asserts </b>
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*
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* Asserts are used within all Xilinx drivers to enforce constraints on argument
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* values. Asserts can be turned off on a system-wide basis by defining, at
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* compile time, the NDEBUG identifier. By default, asserts are turned on and it
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* is recommended that users leave asserts on during development.
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*
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* <b> Building the driver </b>
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*
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* The XZDma driver is composed of several source files. This allows the user
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* to build and link only those parts of the driver that are necessary.
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*
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* @file xzdma.h
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*
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* This header file contains identifiers and register-level driver functions (or
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* macros), range macros, structure typedefs that can be used to access the
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* Xilinx ZDMA core instance.
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*
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* <pre>
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* MODIFICATION HISTORY:
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*
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* Ver Who Date Changes
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* ----- ------ -------- ------------------------------------------------------
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* 1.0 vns 2/27/15 First release
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* </pre>
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*
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******************************************************************************/
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#ifndef XZDMA_H_
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#define XZDMA_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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/***************************** Include Files *********************************/
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#include "xzdma_hw.h"
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#include "xil_assert.h"
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#include "xstatus.h"
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#include "xil_cache.h"
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/************************** Constant Definitions *****************************/
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/**************************** Type Definitions *******************************/
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/** @name ZDMA Handler Types
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* @{
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*/
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typedef enum {
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XZDMA_HANDLER_DONE, /**< For Done Handler */
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XZDMA_HANDLER_ERROR, /**< For Error Handler */
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} XZDma_Handler;
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/*@}*/
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/** @name ZDMA Descriptors Types
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* @{
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*/
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typedef enum {
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XZDMA_LINEAR, /**< Linear descriptor */
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XZDMA_LINKEDLIST, /**< Linked list descriptor */
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} XZDma_DscrType;
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/*@}*/
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/** @name ZDMA Operation modes
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* @{
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*/
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typedef enum {
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XZDMA_NORMAL_MODE, /**< Normal transfer from source to
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* destination*/
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XZDMA_WRONLY_MODE, /**< Write only mode */
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XZDMA_RDONLY_MODE /**< Read only mode */
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} XZDma_Mode;
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/*@}*/
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/** @name ZDMA state
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* @{
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*/
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typedef enum {
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XZDMA_IDLE, /**< ZDMA is in Idle state */
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XZDMA_PAUSE, /**< Paused state */
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XZDMA_BUSY, /**< Busy state */
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} XZDmaState;
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/*@}*/
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/** @name ZDMA AXI Burst type
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* @{
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*/
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typedef enum {
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XZDMA_FIXED_BURST = 0, /**< Fixed burst type */
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XZDMA_INCR_BURST /**< Increment burst type */
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} XZDma_BurstType;
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/*@}*/
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/******************************************************************************/
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/**
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* This typedef contains scatter gather descriptor fields for ZDMA core.
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*/
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typedef struct {
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void *SrcDscrPtr; /**< Source Descriptor pointer */
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void *DstDscrPtr; /**< Destination Descriptor pointer */
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u32 DscrCount; /**< Count of descriptors available */
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XZDma_DscrType DscrType;/**< Type of descriptor either Linear or
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* Linked list type */
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} XZDma_Descriptor;
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/******************************************************************************/
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/**
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* This typedef contains scatter gather descriptor fields for ZDMA core.
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*/
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typedef struct {
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u64 Address; /**< Address */
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u32 Size; /**< Word2, Size of data */
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u32 Cntl; /**< Word3 Control data */
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u64 NextDscr; /**< Address of next descriptor */
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u64 Reserved; /**< Reserved address */
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} __attribute__ ((packed)) XZDma_LlDscr;
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/******************************************************************************/
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/**
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* This typedef contains Linear descriptor fields for ZDMA core.
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*/
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typedef struct {
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u64 Address; /**< Address */
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u32 Size; /**< Word3, Size of data */
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u32 Cntl; /**< Word4, control data */
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} __attribute__ ((packed)) XZDma_LiDscr;
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/******************************************************************************/
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/**
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*
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* This typedef contains the data configurations of ZDMA core
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*/
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typedef struct {
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u8 OverFetch; /**< Enable Over fetch */
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u8 SrcIssue; /**< Outstanding transactions for Source */
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XZDma_BurstType SrcBurstType;
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/**< Burst type for SRC */
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u8 SrcBurstLen; /**< AXI length for data read */
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XZDma_BurstType DstBurstType;
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/**< Burst type for DST */
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u8 DstBurstLen; /**< AXI length for data write */
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u8 SrcCache; /**< AXI cache bits for data read */
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u8 SrcQos; /**< AXI QOS bits for data read */
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u8 DstCache; /**< AXI cache bits for data write */
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u8 DstQos; /**< AXI QOS bits for data write */
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} XZDma_DataConfig;
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/******************************************************************************/
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/**
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*
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* This typedef contains the descriptor configurations of ZDMA core
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*/
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typedef struct{
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u8 AxCoherent; /**< AXI transactions are coherent or non-coherent */
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u8 AXCache; /**< AXI cache for DSCR fetch */
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u8 AXQos; /**< Qos bit for DSCR fetch */
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} XZDma_DscrConfig;
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/******************************************************************************/
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/**
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* Callback type for Completion of all data transfers.
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*
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* @param CallBackRef is a callback reference passed in by the upper layer
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* when setting the callback functions, and passed back to the
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* upper layer when the callback is invoked.
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*******************************************************************************/
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typedef void (*XZDma_DoneHandler) (void *CallBackRef);
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/******************************************************************************/
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/**
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* Callback type for all error interrupts.
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*
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* @param CallBackRef is a callback reference passed in by the upper layer
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* when setting the callback functions, and passed back to the
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* upper layer when the callback is invoked.
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* @param ErrorMask is a bit mask indicating the cause of the error. Its
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* value equals 'OR'ing one or more XZDMA_IXR_* values defined in
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* xzdma_hw.h
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****************************************************************************/
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typedef void (*XZDma_ErrorHandler) (void *CallBackRef, u32 ErrorMask);
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/**
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* This typedef contains configuration information for a ZDMA core
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* Each ZDMA core should have a configuration structure associated.
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*/
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typedef struct {
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u16 DeviceId; /**< Device Id of ZDMA */
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u32 BaseAddress; /**< BaseAddress of ZDMA */
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u8 DmaType; /**< Type of DMA */
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} XZDma_Config;
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/******************************************************************************/
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/**
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*
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* The XZDma driver instance data structure. A pointer to an instance data
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* structure is passed around by functions to refer to a specific driver
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* instance.
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*/
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typedef struct {
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XZDma_Config Config; /**< Hardware configuration */
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u32 IsReady; /**< Device and the driver instance
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* are initialized */
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u32 IntrMask; /**< Mask for enabling interrupts */
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XZDma_Mode Mode; /**< Mode of ZDMA core to be operated */
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u8 IsSgDma; /**< Is ZDMA core is in scatter gather or
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* not will be specified */
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XZDma_Descriptor Descriptor; /**< It contains information about
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* descriptors */
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XZDma_DoneHandler DoneHandler; /**< Call back for transfer
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* done interrupt */
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void *DoneRef; /**< To be passed to the done
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* interrupt callback */
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XZDma_ErrorHandler ErrorHandler;/**< Call back for error
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* interrupt */
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void *ErrorRef; /**< To be passed to the error
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* interrupt callback */
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XZDma_DataConfig DataConfig; /**< Current configurations */
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XZDma_DscrConfig DscrConfig; /**< Current configurations */
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XZDmaState ChannelState; /**< ZDMA channel is busy */
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} XZDma;
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/******************************************************************************/
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/**
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*
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* This typedef contains the fields for transfer of data.
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*/
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typedef struct {
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UINTPTR SrcAddr; /**< Source address */
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UINTPTR DstAddr; /**< Destination Address */
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u32 Size; /**< Size of the data to be transferred */
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u8 SrcCoherent; /**< Source coherent */
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u8 DstCoherent; /**< Destination coherent */
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u8 Pause; /**< Will pause data transmission after
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* this transfer only for SG mode */
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} XZDma_Transfer;
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/***************** Macros (Inline Functions) Definitions *********************/
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/*****************************************************************************/
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/**
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*
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* This function returns interrupt status read from Interrupt Status Register.
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* Use the XZDMA_IXR_DMA_*_MASK constants defined in xzdma_hw.h to interpret the
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* returned value.
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*
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* @param InstancePtr is a pointer to the XZDma instance.
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*
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* @return The pending interrupts of the ZDMA core.
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* Use the masks specified in xzdma_hw.h to interpret
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* the returned value.
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* @note
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* C-style signature:
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* void XZDma_IntrGetStatus(XZDma *InstancePtr)
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*
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******************************************************************************/
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#define XZDma_IntrGetStatus(InstancePtr) \
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XZDma_ReadReg((InstancePtr)->Config.BaseAddress, XZDMA_CH_ISR_OFFSET)
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/*****************************************************************************/
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/**
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*
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* This function clears interrupt(s). Every bit set in Interrupt Status
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* Register indicates that a specific type of interrupt is occurring, and this
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* function clears one or more interrupts by writing a bit mask to Interrupt
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* Clear Register.
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*
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* @param InstancePtr is a pointer to the XZDma instance.
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* @param Mask is the type of the interrupts to enable. Use OR'ing of
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* XZDMA_IXR_DMA_*_MASK constants defined in xzdma_hw.h to create
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* this parameter value.
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*
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* @return None.
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*
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* @note
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* C-style signature:
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* void XZDma_IntrClear(XZDma *InstancePtr)
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*
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******************************************************************************/
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#define XZDma_IntrClear(InstancePtr, Mask) \
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XZDma_WriteReg( (InstancePtr)->Config.BaseAddress, \
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XZDMA_CH_ISR_OFFSET, ((u32)(Mask) & (u32)XZDMA_IXR_ALL_INTR_MASK))
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/*****************************************************************************/
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/**
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*
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* This function returns interrupt mask to know which interrupts are
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* enabled and which of them were disabled.
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*
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* @param InstancePtr is a pointer to the XZDma instance.
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*
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* @return The current interrupt mask. The mask indicates which interrupts
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* are enabled/disabled.
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* 0 bit represents .....corresponding interrupt is enabled.
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* 1 bit represents .....Corresponding interrupt is disabled.
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*
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* @note
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* C-style signature:
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* void XZDma_GetIntrMask(XZDma *InstancePtr)
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*
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******************************************************************************/
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#define XZDma_GetIntrMask(InstancePtr) \
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XZDma_ReadReg((InstancePtr)->Config.BaseAddress, \
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(u32)(XZDMA_CH_IMR_OFFSET))
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/*****************************************************************************/
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/**
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*
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* This function enables individual interrupts of the ZDMA core by updating
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* the Interrupt Enable register.
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*
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* @param InstancePtr is a pointer to the XZDma instance.
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* @param Mask is the type of the interrupts to enable. Use OR'ing of
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* XZDMA_IXR_DMA_*_MASK constants defined in xzdma_hw.h to create
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* this parameter value.
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*
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* @return None.
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*
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* @note The existing enabled interrupt(s) will remain enabled.
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* C-style signature:
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* void XZDma_EnableIntr(XZDma *InstancePtr, u32 Mask)
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*
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******************************************************************************/
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#define XZDma_EnableIntr(InstancePtr, Mask) \
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(InstancePtr)->IntrMask = ((InstancePtr)->IntrMask | (Mask))
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/*****************************************************************************/
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/**
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*
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* This function disables individual interrupts of the ZDMA core by updating
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* the Interrupt Disable register.
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*
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* @param InstancePtr is a pointer to the XZDma instance.
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* @param Mask is the type of the interrupts to disable. Use OR'ing of
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* XZDMA_IXR_DMA_*_MASK constants defined in xzdma_hw.h to create
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* this parameter value.
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*
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* @return None.
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*
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* @note The existing disabled interrupt(s) will remain disabled.
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* C-style signature:
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* void XZDma_DisableIntr(XZDma *InstancePtr, u32 Mask)
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*
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******************************************************************************/
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#define XZDma_DisableIntr(InstancePtr, Mask) \
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XZDma_WriteReg( (InstancePtr)->Config.BaseAddress, \
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XZDMA_CH_IDS_OFFSET, \
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((u32)XZDma_ReadReg((InstancePtr)->Config.BaseAddress, \
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XZDMA_CH_IDS_OFFSET) | ((u32)(Mask) & (u32)XZDMA_IXR_ALL_INTR_MASK)))
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/*****************************************************************************/
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/**
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*
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* This function returns source current payload address under process
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* of ZDMA core.
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*
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* @param InstancePtr is a pointer to the XZDma instance.
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*
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* @return None.
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*
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* @note This address may not be precise due to ZDMA pipeline structure
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* C-style signature:
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* u64 XZDma_SrcCurPyld(XZDma *InstancePtr)
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*
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******************************************************************************/
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#define XZDma_SrcCurPyld(InstancePtr) \
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((u64)(XZDma_ReadReg((InstancePtr)->Config.BaseAddress, \
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XZDMA_CH_SRC_CUR_PYLD_LSB_OFFSET)) | \
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((u64)(XZDma_ReadReg((InstancePtr)->Config.BaseAddress, \
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XZDMA_CH_SRC_CUR_PYLD_MSB_OFFSET)) << XZDMA_WORD1_MSB_SHIFT))
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/*****************************************************************************/
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/**
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*
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* This function returns destination current payload address under process
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* of ZDMA core.
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*
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* @param InstancePtr is a pointer to the XZDma instance.
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*
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* @return None.
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*
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* @note This address may not be precise due to ZDMA pipeline structure
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* C-style signature:
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* u64 XZDma_DstCurPyld(XZDma *InstancePtr)
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*
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******************************************************************************/
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#define XZDma_DstCurPyld(InstancePtr) \
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((u64)(XZDma_ReadReg((InstancePtr)->Config.BaseAddress, \
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XZDMA_CH_DST_CUR_PYLD_LSB_OFFSET)) | \
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((u64)(XZDma_ReadReg((InstancePtr)->Config.BaseAddress, \
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XZDMA_CH_DST_CUR_PYLD_MSB_OFFSET)) << XZDMA_WORD1_MSB_SHIFT))
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/*****************************************************************************/
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/**
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*
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* This function returns source descriptor current payload address under
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* process of ZDMA core.
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*
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* @param InstancePtr is a pointer to the XZDma instance.
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*
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* @return None.
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*
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* @note This address may not be precise due to ZDMA pipeline structure
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* C-style signature:
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* u64 XZDma_SrcDscrCurPyld(XZDma *InstancePtr)
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*
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******************************************************************************/
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#define XZDma_SrcDscrCurPyld(InstancePtr) \
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((u64)(XZDma_ReadReg((InstancePtr)->Config.BaseAddress, \
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XZDMA_CH_SRC_CUR_DSCR_LSB_OFFSET)) | \
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((u64)(XZDma_ReadReg((InstancePtr)->Config.BaseAddress, \
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XZDMA_CH_SRC_CUR_DSCR_MSB_OFFSET)) << XZDMA_WORD1_MSB_SHIFT))
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/*****************************************************************************/
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/**
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|
*
|
|
* This function returns destination descriptor current payload address under
|
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* process of ZDMA core.
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*
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* @param InstancePtr is a pointer to the XZDma instance.
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*
|
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* @return None.
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|
*
|
|
* @note This address may not be precise due to ZDMA pipeline structure
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|
* C-style signature:
|
|
* u64 XZDma_DstDscrCurPyld(XZDma *InstancePtr)
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*
|
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******************************************************************************/
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#define XZDma_DstDscrCurPyld(InstancePtr) \
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((u64)(XZDma_ReadReg((InstancePtr)->Config.BaseAddress, \
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XZDMA_CH_DST_CUR_DSCR_LSB_OFFSET)) | \
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((u64)(XZDma_ReadReg((InstancePtr)->Config.BaseAddress, \
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|
XZDMA_CH_DST_CUR_DSCR_MSB_OFFSET)) << XZDMA_WORD1_MSB_SHIFT))
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|
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/*****************************************************************************/
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/**
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|
*
|
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* This function gets the count of total bytes transferred through core
|
|
* since last clear in ZDMA core.
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|
*
|
|
* @param InstancePtr is a pointer to the XZDma instance.
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|
*
|
|
* @return None.
|
|
*
|
|
* @note
|
|
* C-style signature:
|
|
* void XZDma_GetTotalByte(XZDma *InstancePtr)
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|
*
|
|
******************************************************************************/
|
|
#define XZDma_GetTotalByte(InstancePtr) \
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|
XZDma_ReadReg((InstancePtr)->Config.BaseAddress, \
|
|
XZDMA_CH_TOTAL_BYTE_OFFSET)
|
|
|
|
/*****************************************************************************/
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/**
|
|
*
|
|
* This function clears the count of total bytes transferred in ZDMA core.
|
|
*
|
|
* @param InstancePtr is a pointer to the XZDma instance.
|
|
*
|
|
* @return None.
|
|
*
|
|
* @note
|
|
* C-style signature:
|
|
* void XZDma_TotalByteClear(XZDma *InstancePtr)
|
|
*
|
|
******************************************************************************/
|
|
#define XZDma_TotalByteClear(InstancePtr) \
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|
XZDma_WriteReg((InstancePtr)->Config.BaseAddress, \
|
|
(XZDMA_CH_TOTAL_BYTE_OFFSET), (XZDMA_WRITE_TO_CLEAR_MASK))
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
*
|
|
* This function gets the total number of Interrupt count for source after last
|
|
* call of this API.
|
|
*
|
|
* @param InstancePtr is a pointer to the XZDma instance.
|
|
*
|
|
* @return None.
|
|
*
|
|
* @note Once this API is called then count will become zero.
|
|
* C-style signature:
|
|
* void XZDma_GetSrcIntrCnt(XZDma *InstancePtr)
|
|
*
|
|
******************************************************************************/
|
|
#define XZDma_GetSrcIntrCnt(InstancePtr) \
|
|
XZDma_ReadReg((InstancePtr)->Config.BaseAddress, \
|
|
XZDMA_CH_IRQ_SRC_ACCT_OFFSET)
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
*
|
|
* This function gets the total number of Interrupt count for destination
|
|
* after last call of this API.
|
|
*
|
|
* @param InstancePtr is a pointer to the XZDma instance.
|
|
*
|
|
* @return None.
|
|
*
|
|
* @note Once this API is called then count will become zero.
|
|
* C-style signature:
|
|
* void XZDma_GetDstIntrCnt(XZDma *InstancePtr)
|
|
*
|
|
******************************************************************************/
|
|
#define XZDma_GetDstIntrCnt(InstancePtr) \
|
|
XZDma_ReadReg((InstancePtr)->Config.BaseAddress, \
|
|
XZDMA_CH_IRQ_DST_ACCT_OFFSET)
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
*
|
|
* This function Enable's the ZDMA core for initiating the data transfer once the
|
|
* data transfer completes it will be automatically disabled.
|
|
*
|
|
* @param InstancePtr is a pointer to the XZDma instance.
|
|
*
|
|
* @return None.
|
|
*
|
|
* @note None.
|
|
* C-style signature:
|
|
* void XZDma_EnableCh(XZDma *InstancePtr)
|
|
*
|
|
******************************************************************************/
|
|
#define XZDma_EnableCh(InstancePtr) \
|
|
XZDma_WriteReg((InstancePtr)->Config.BaseAddress, \
|
|
(XZDMA_CH_CTRL2_OFFSET), (XZDMA_CH_CTRL2_EN_MASK))
|
|
|
|
/*****************************************************************************/
|
|
/**
|
|
*
|
|
* This function Disable's the ZDMA core.
|
|
*
|
|
* @param InstancePtr is a pointer to the XZDma instance.
|
|
*
|
|
* @return None.
|
|
*
|
|
* @note None.
|
|
* C-style signature:
|
|
* void XZDma_DisableCh(XZDma *InstancePtr)
|
|
*
|
|
******************************************************************************/
|
|
#define XZDma_DisableCh(InstancePtr) \
|
|
XZDma_WriteReg((InstancePtr)->Config.BaseAddress,\
|
|
(XZDMA_CH_CTRL2_OFFSET), (XZDMA_CH_CTRL2_DIS_MASK))
|
|
|
|
/************************ Prototypes of functions **************************/
|
|
|
|
XZDma_Config *XZDma_LookupConfig(u16 DeviceId);
|
|
|
|
s32 XZDma_CfgInitialize(XZDma *InstancePtr, XZDma_Config *CfgPtr,
|
|
u32 EffectiveAddr);
|
|
s32 XZDma_SetMode(XZDma *InstancePtr, u8 IsSgDma, XZDma_Mode Mode);
|
|
u32 XZDma_CreateBDList(XZDma *InstancePtr, XZDma_DscrType TypeOfDscr,
|
|
UINTPTR Dscr_MemPtr, u32 NoOfBytes);
|
|
s32 XZDma_SetChDataConfig(XZDma *InstancePtr, XZDma_DataConfig *Configure);
|
|
void XZDma_GetChDataConfig(XZDma *InstancePtr, XZDma_DataConfig *Configure);
|
|
s32 XZDma_SetChDscrConfig(XZDma *InstancePtr, XZDma_DscrConfig *Configure);
|
|
void XZDma_GetChDscrConfig(XZDma *InstancePtr, XZDma_DscrConfig *Configure);
|
|
s32 XZDma_Start(XZDma *InstancePtr, XZDma_Transfer *Data, u32 Num);
|
|
void XZDma_WOData(XZDma *InstancePtr, u32 *Buffer);
|
|
void XZDma_Resume(XZDma *InstancePtr);
|
|
void XZDma_Reset(XZDma *InstancePtr);
|
|
XZDmaState XZDma_ChannelState(XZDma *InstancePtr);
|
|
|
|
s32 XZDma_SelfTest(XZDma *InstancePtr);
|
|
|
|
void XZDma_IntrHandler(void *Instance);
|
|
s32 XZDma_SetCallBack(XZDma *InstancePtr, XZDma_Handler HandlerType,
|
|
void *CallBackFunc, void *CallBackRef);
|
|
|
|
/*@}*/
|
|
|
|
#ifdef __cplusplus
|
|
}
|
|
|
|
#endif
|
|
|
|
#endif /* XZDMA_H_ */
|