234ca56569
This patch adds the SRIO standalone driver support for SRIO Gen2 Core. Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
315 lines
11 KiB
C
Executable file
315 lines
11 KiB
C
Executable file
/******************************************************************************
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*
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* (c) Copyright 2014 Xilinx, Inc. All rights reserved.
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*
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* This file contains confidential and proprietary information of Xilinx, Inc.
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* and is protected under U.S. and international copyright and other
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* intellectual property laws.
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*
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* DISCLAIMER
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* This disclaimer is not a license and does not grant any rights to the
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* materials distributed herewith. Except as otherwise provided in a valid
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* license issued to you by Xilinx, and to the maximum extent permitted by
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* applicable law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND WITH ALL
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* FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES AND CONDITIONS, EXPRESS,
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* IMPLIED, OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF
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* MERCHANTABILITY, NON-INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE;
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* and (2) Xilinx shall not be liable (whether in contract or tort, including
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* negligence, or under any other theory of liability) for any loss or damage
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* of any kind or nature related to, arising under or in connection with these
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* materials, including for any direct, or any indirect, special, incidental,
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* or consequential loss or damage (including loss of data, profits, goodwill,
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* or any type of loss or damage suffered as a result of any action brought by
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* a third party) even if such damage or loss was reasonably foreseeable or
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* Xilinx had been advised of the possibility of the same.
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*
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* CRITICAL APPLICATIONS
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* Xilinx products are not designed or intended to be fail-safe, or for use in
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* any application requiring fail-safe performance, such as life-support or
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* safety devices or systems, Class III medical devices, nuclear facilities,
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* applications related to the deployment of airbags, or any other applications
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* that could lead to death, personal injury, or severe property or
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* environmental damage (individually and collectively, "Critical
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* Applications"). Customer assumes the sole risk and liability of any use of
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* Xilinx products in Critical Applications, subject only to applicable laws
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* and regulations governing limitations on product liability.
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*
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* THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS PART OF THIS FILE
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* AT ALL TIMES.
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*
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******************************************************************************/
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/*****************************************************************************/
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/**
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*
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* @file xsrio_dma_loopback_example.c
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*
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* This file demonstrates how to use xsrio driver on the Xilinx SRIO Gen2 Core.
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* The SRIO Gen2 comprised of phy, logical and transport and buffer layers.
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* Using this IP We can generate both messaging and read/write semantics.
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*
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* This example demonstartes how to generate SWRITE(Streaming Write)
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* transactions on the core.
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*
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* Inorder to test this example external loopback is required at the boardlevel
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* Between the SRIO Tx and Rx pins.
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*
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* H/W Requirments:
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* Inorder to test this example at the h/w level the the SRIO Initiator Request
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* is connected to the AXI DMA MM2S Channel and SRIO Target Request is connected
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* to the AXI DMA S2MM Channel.
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*
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* S/W Flow:
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* 1) The system consists of two different memories.Processor runs this example
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* Code in one memory and the SRIO packet is formed in another memory.
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* 2) The SRIO Packet is framed in the Memory
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* 3) Configure the AXI DMA MM2S source address and S2MM for Destiantion address
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* and specify the byte count for both the channels and then start the dma.
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* 4) Compare the Data.
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*
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* <pre>
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* MODIFICATION HISTORY:
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*
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* Ver Who Date Changes
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* ----- ---- -------- -------------------------------------------------------
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* 1.0 adk 16/04/14 Initial release
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*
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* </pre>
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*
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* ***************************************************************************
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*/
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/***************************** Include Files *********************************/
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#include "xparameters.h"
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#include "xil_printf.h"
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#include "xil_types.h"
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#include "xstatus.h"
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#include "xsrio.h"
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#include "xbram.h"
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#include "xaxidma.h"
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/**************************** Type Definitions *******************************/
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/***************** Macros (Inline Functions) Definitions *********************/
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#define SRIO_DEVICE_ID XPAR_SRIO_0_DEVICE_ID
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#define MEM_ADDR XPAR_AXI_BRAM_CTRL_1_S_AXI_BASEADDR
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#define DMA_DEV_ID XPAR_AXIDMA_0_DEVICE_ID
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#define DATA_SIZE 256
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/******************** Variable Definitions **********************************/
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XSrio Srio; /* Instance of the XSrio */
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XAxiDma AxiDma; /* Instance of the XAxiDma */
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/******************** Function Prototypes ************************************/
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int XSrioDmaLoopbackExample(XSrio *InstancePtr, u16 DeviceId);
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/*****************************************************************************/
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/**
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*
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* Main function
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*
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* This function is the main entry of the SRIO DMA Loopback test.
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*
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* @param None
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*
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* @return - XST_SUCCESS if tests pass
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* - XST_FAILURE if fails.
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*
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* @note None
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*
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******************************************************************************/
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int main()
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{
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int Status;
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xil_printf("Entering main\n\r");
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Status = XSrioDmaLoopbackExample(&Srio, SRIO_DEVICE_ID);
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if (Status != XST_SUCCESS) {
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xil_printf("SRIO DMA Loopback Test Failed\n\r");
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xil_printf("--- Exiting main() ---\n\r");
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return XST_FAILURE;
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}
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xil_printf("SRIO DMA Loopback Test passed\n\r");
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xil_printf("--- Exiting main() ---\n\r");
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return XST_SUCCESS;
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}
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/*****************************************************************************/
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/**
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* XSrioDmaLoopbackExample This function does a minimal test on the XSrio device
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* and driver as a design example. The purpose of this function is to illustrate
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* how to use the XSrio Component.
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*
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* This function does the following:
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* - Initialize the SRIO device
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* - Initialize the DMA engine
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* - Clearing the Memory
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* - Framing the SRIO Packet in the Memory
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* - Configuring the SRIO
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* - Configuring the DMA
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* - Verifying the Data
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*
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* @param InstancePtr is a pointer to the instance of the
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* XSrio driver.
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* @param DeviceId is Device ID of the SRIO Gen2 Device.
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*
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* @return -XST_SUCCESS to indicate success
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* -XST_FAILURE to indicate failure
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*
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******************************************************************************/
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int XSrioDmaLoopbackExample(XSrio *InstancePtr, u16 DeviceId)
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{
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XSrio_Config *SrioConfig;
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XAxiDma_Config *DmaConfig;
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int Status = XST_SUCCESS;
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int Count = 0;
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/* Initialize the SRIO Device Configuration Interface driver */
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SrioConfig = XSrio_LookupConfig(DeviceId);
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if (!SrioConfig) {
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xil_printf("No SRIO config found for %d\r\n", DeviceId);
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return XST_FAILURE;
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}
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/**< This is where the virtual address would be used, this example
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* uses physical address.
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*/
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Status = XSrio_CfgInitialize(InstancePtr, SrioConfig,
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SrioConfig->BaseAddress);
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if (Status != XST_SUCCESS) {
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xil_printf("Initialization failed for SRIO\n\r");
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return Status;
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}
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/* Check for PE Configuration */
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Status = XSrio_GetPEType(InstancePtr);
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if (Status != XSRIO_IS_MEMORY) {
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xil_printf("SRIO is not configured as the Memory \n\r");
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return XST_FAILURE;
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}
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/* Clearing the Memory */
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for(Count=0; Count<(128*1024); Count += 4) {
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*(u32 *)(MEM_ADDR + Count) = 0;
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}
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/**< Check whether Streaming Write Operation is Supported by the
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* Core or not Since it is a loopback Example Checking at the both
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* Target and source Operations.
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*/
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Status = XSrio_IsOperationSupported(InstancePtr, XSRIO_OP_MODE_SWRITE,
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XSRIO_DIR_TX);
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if (Status != XST_SUCCESS) {
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return XST_FAILURE;
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}
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Status = XSrio_IsOperationSupported(InstancePtr, XSRIO_OP_MODE_SWRITE,
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XSRIO_DIR_RX);
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if (Status != XST_SUCCESS) {
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return XST_FAILURE;
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}
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/**< Frame the SRIO Write-Stream Packet in the Memory
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* The Packet-format used here is HELLO Packet format
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* More details look into pg 3.1 version:73 page(HELLO PACKET FORMAT).
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*/
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*(u32 *)(MEM_ADDR + 0x00) = 0x50000600; /**< Lower word of the
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* HELLO Packet
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*/
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*(u32 *)(MEM_ADDR + 0x04) = 0x08602F74; /**< Upper word of the
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* HELLO packet
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*/
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Count = 8;
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while(Count<(DATA_SIZE * 2)) {
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*(u32 *)(MEM_ADDR + Count) = Count;
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Count += 4;
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}
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/* SRIO Configuration */
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/* Set the Local Configuration Space Base Address */
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XSrio_SetLCSBA(InstancePtr, 0xFFF);
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/* Set the Water Mark Level to transfer priority 0 packet */
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XSrio_SetWaterMark0(InstancePtr, 0x5);
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/* Set the Water Mark Level to transfer priority 1 packet */
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XSrio_SetWaterMark1(InstancePtr, 0x4);
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/* Set the Water Mark Level to transfer priority 2 packet */
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XSrio_SetWaterMark2(InstancePtr, 0x3);
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/* Set the Port Response timeout value */
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XSrio_SetPortRespTimeOutValue(InstancePtr, 0x010203);
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/* DMA Configuration */
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DmaConfig = XAxiDma_LookupConfig(DMA_DEV_ID);
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if (!DmaConfig) {
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xil_printf("No DMA config found for %d\r\n", DMA_DEV_ID);
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return XST_FAILURE;
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}
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/* Initialize DMA engine */
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Status = XAxiDma_CfgInitialize(&AxiDma, DmaConfig);
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if (Status != XST_SUCCESS) {
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xil_printf("Initialization failed %d\r\n", Status);
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return XST_FAILURE;
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}
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/**< Configure the DMA Tx Side
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* MEM_ADDR is the address where Tx packet is formed
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*/
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XAxiDma_WriteReg(DmaConfig->BaseAddr, XAXIDMA_CR_OFFSET,
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XAXIDMA_CR_RUNSTOP_MASK);
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XAxiDma_IntrEnable(&AxiDma,XAXIDMA_IRQ_IOC_MASK, XAXIDMA_DMA_TO_DEVICE);
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XAxiDma_WriteReg(DmaConfig->BaseAddr, XAXIDMA_SRCADDR_OFFSET, MEM_ADDR);
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/**< Configure the DMA Rx Side
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* MEM_ADDR+0x5000 is the address where Rx packet is formed
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*/
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XAxiDma_WriteReg(DmaConfig->BaseAddr,
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XAXIDMA_RX_OFFSET+XAXIDMA_CR_OFFSET, XAXIDMA_CR_RUNSTOP_MASK);
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XAxiDma_IntrEnable(&AxiDma, XAXIDMA_IRQ_IOC_MASK, XAXIDMA_DEVICE_TO_DMA);
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XAxiDma_WriteReg(DmaConfig->BaseAddr,
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XAXIDMA_RX_OFFSET + XAXIDMA_DESTADDR_OFFSET, MEM_ADDR+0x5000);
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for(Count=8; Count<DATA_SIZE; Count += 4) {
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*(u32 *)(MEM_ADDR + Count) = Count;
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}
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XAxiDma_WriteReg(DmaConfig->BaseAddr, XAXIDMA_BUFFLEN_OFFSET, 256);
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/* Wait till DMA MM2S Transfer Complete */
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while(!(XAxiDma_ReadReg(DmaConfig->BaseAddr, XAXIDMA_SR_OFFSET)
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& 0x1000));
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XAxiDma_WriteReg(DmaConfig->BaseAddr,
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XAXIDMA_RX_OFFSET+XAXIDMA_BUFFLEN_OFFSET, 256);
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/* Wait till S2MM Transfer Complete */
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while(!( XAxiDma_ReadReg(DmaConfig->BaseAddr,
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XAXIDMA_RX_OFFSET+XAXIDMA_SR_OFFSET) & 0x1000));
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/* Verifying the Data */
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for(Count=8; Count<DATA_SIZE; Count += 4) {
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if(*(u32 *)(MEM_ADDR + 0x5000 + Count)
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!= *(u32 *)(MEM_ADDR + Count)) {
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xil_printf("\n ERROR in Transfer\n\r");
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return XST_FAILURE;
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}
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}
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/* Clearing the Memory */
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for(Count=0x5000; Count<(0x6000); Count += 4) {
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*(u32 *)(MEM_ADDR + Count) = 0;
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}
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for(Count=0; Count<DATA_SIZE; Count += 4) {
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if(*(u32 *)(MEM_ADDR + 0x5000+ Count) != 0x00) {
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xil_printf("\n ERROR in Clearing Memory\n\r");
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return XST_FAILURE;
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}
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}
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return Status;
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}
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