660 lines
28 KiB
C
660 lines
28 KiB
C
/*******************************************************************************
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*
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* Copyright (C) 2014 - 2015 Xilinx, Inc. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* Use of the Software is limited solely to applications:
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* (a) running on a Xilinx device, or
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* (b) that interact with a Xilinx device through a bus or interconnect.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
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* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Except as contained in this notice, the name of the Xilinx shall not be used
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* in advertising or otherwise to promote the sale, use or other dealings in
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* this Software without prior written authorization from Xilinx.
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*
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*******************************************************************************/
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/******************************************************************************/
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/**
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*
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* @file xdptx.h
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*
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* The Xilinx DisplayPort transmitter (DPTX) driver. This driver supports the
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* Xilinx DisplayPort soft IP core in source (TX) mode. This driver follows the
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* DisplayPort 1.2a specification.
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*
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* <b>Driver description</b>
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*
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* The device driver enables higher-level software (e.g., an application) to
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* configure and control a DisplayPort TX soft IP, communicate and control an
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* RX device/sink monitor over the AUX channel, and to initialize and transmit
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* data streams over the main link.
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*
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* This driver implements link layer functionality: a Link Policy Maker (LPM)
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* and a Stream Policy Maker (SPM) as per the DisplayPort 1.2a specification.
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* - The LPM manages the main link and is responsible for keeping the link
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* synchronized. It will establish a link with a downstream RX device by
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* undergoing a link training sequence which consists of:
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* - Clock recovery: The clock needs to be recovered and PLLs need to be
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* locked for all lanes.
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* - Channel equalization: All lanes need to achieve channel equalization
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* and and symbol lock, as well as for interlane alignment to take place.
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* - The SPM manages transportation of an isochronous stream. That is, it will
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* initialize and maintain a video stream, establish a virtual channel to a
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* sink monitor, and transmit the stream.
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*
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* Using AUX transactions to read/write from/to the sink's DisplayPort
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* Configuration Data (DPCD) address space, the LPM obtains the link
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* capabilities, obtains link configuration and link and sink status, and
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* configures and controls the link and sink. The main link is trained this way.
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*
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* I2C-over-AUX transactions are used to obtain the sink's Extended Display
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* Identification Data (EDID) which give information on the display capabilities
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* of the monitor. The SPM may use this information to determine what available
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* screen resolutions and video timing are possible.
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*
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* <b>Interrupt processing</b>
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*
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* DisplayPort interrupts occur on the HPD signal line when the DisplayPort
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* cable is connected/disconnected or when the RX device sends a pulse. The user
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* hardware design must contain an interrupt controller which the DisplayPort
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* TX instance's interrupt signal is connected to. The user application must
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* enable interrupts in the system and set up the interrupt controller such that
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* the XDptx_HpdInterruptHandler handler will service DisplayPort interrupts.
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* When the XDptx_HpdInterruptHandler function is invoked, the handler will
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* identify what type of DisplayPort interrupt has occurred, and will call
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* either the HPD event handler function or the HPD pulse handler function,
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* depending on whether a an HPD event on an HPD pulse event occurred.
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*
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* The DisplayPort TX's XDPTX_INTERRUPT_STATUS register indicates the type of
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* interrupt that has occured, and the XDptx_HpdInterruptHandler will use this
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* information to decide which handler to call. An HPD event is identified if
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* bit XDPTX_INTERRUPT_STATUS_HPD_EVENT_MASK is set, and an HPD pulse is
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* identified from the XDPTX_INTERRUPT_STATUS_HPD_PULSE_DETECTED_MASK bit.
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*
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* The HPD event handler may be set up by using the XDptx_SetHpdEventHandler
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* function and, for the HPD pulse handler, the XDptx_SetHpdPulseHandler
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* function.
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*
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* <b>Multi-stream transport (MST) mode</b>
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*
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* The driver handles MST mode functionality, including sideband messaging,
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* topology discovery, virtual channel payload ID table management, and
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* directing streams to different sinks.
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*
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* MST testing has been done at all possible link rate/lane count/topology/
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* resolution/color depth combinations with each setting using following values:
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* - Link rate: 1.62, 2.70, and 5.40Gbps per lane.
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* - Lane count: 1, 2, and 4 lanes.
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* - Number of sink displays: 1, 2, 3, and 4 sink displays in both a daisy-chain
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* configuration and in a configuration using a combination of a 1-to-3 hub
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* and daisy-chain. Each stream was using the same resolution.
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* - Resolutions (60Hz): 640x480, 800x600, 1024x768, 1280x800, 1280x1024,
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* 1360x768, 1400x1050, 1680x1050, 1920x1080, 1920x2160, and 3840x2160.
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* - Color depths: 18, 24, 30, 36, and 48 bits per pixel.
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*
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* <b>Audio</b>
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*
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* The driver does not handle audio. For an example as to how to configure and
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* transmit audio, examples/xdptx_audio_example.c illustrates the required
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* sequence. The user will need to configure the audio source connected to the
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* Displayport TX instance and set up the audio info frame as per user
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* requirements.
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*
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* <b>Limitations</b>
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*
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* - For MST mode to correctly display, the current version of the driver
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* requires that each of the DisplayPort TX streams be allocated without
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* skipping streams (i.e. assign stream 1, stream 2, and stream 3 - problems
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* were experienced if skipping stream 2 and assigning stream 4 instead).
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* skipping monitors in a daisy chain is OK as long as they are assigned to
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* streams in order.
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* - In MST mode, the current version of the driver does not support removal of
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* an allocated stream from the virtual channel payload ID table without
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* clearing the entire table.
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* - Some sideband messages have not been implemented in the current version of
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* the driver for MST mode. Notably, reception of a CONNECTION_STATUS_NOTIFY
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* sideband message.
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* - The driver does not handle audio. See the audio example in the driver
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* examples directory for the required sequence for enabling audio.
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*
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* @note None.
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*
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* <pre>
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* MODIFICATION HISTORY:
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*
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* Ver Who Date Changes
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* ----- ---- -------- -----------------------------------------------
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* 1.0 als 05/17/14 Initial release.
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* als 08/03/14 Initial MST addition.
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* 2.0 als 09/21/14 Added XDptx_DiscoverTopology function and changed
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* XDptx_IsConnected from macro to function.
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* 3.0 als 12/16/14 Updated to use common video library.
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* Added topology reordering functions:
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* XDptx_TopologySwapSinks,
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* XDptx_TopologySortSinksByTiling
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* Added wrapper functions for remote DPCD/I2C read/writes:
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* XDptx_RemoteDpcdRead, XDptx_RemoteDpcdWrite,
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* XDptx_RemoteIicRead, XDptx_RemoteIicWrite
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* Added EDID utility functions:
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* XDptx_GetRemoteEdid, XDptx_GetEdidBlock,
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* XDptx_GetRemoteEdidBlock,
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* XDptx_GetRemoteEdidDispIdExt,
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* XDptx_GetDispIdDataBlock,
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* XDptx_GetRemoteTiledDisplayDb
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* Remove unused arguments from functions:
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* LinkCountTotal, RelativeAddress from
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* XDptx_AllocatePayloadVcIdTable
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* RegStartAddress from XDptx_IicWrite
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* </pre>
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*
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*******************************************************************************/
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#ifndef XDPTX_H_
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/* Prevent circular inclusions by using protection macros. */
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#define XDPTX_H_
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/******************************* Include Files ********************************/
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#include "xdp.h"
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#include "xdptx_hw.h"
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/****************************** Type Definitions ******************************/
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/**
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* This typedef contains configuration information about the RX device.
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*/
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typedef struct {
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u8 DpcdRxCapsField[16]; /**< The first 16 bytes of the raw capabilities
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field of the RX device's DisplayPort
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Configuration Data (DPCD). */
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u8 LaneStatusAdjReqs[6];/**< This is a raw read of the RX device's
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status registers. The first 4 bytes
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correspond to the lane status associated
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with clock recovery, channel
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equalization, symbol lock, and interlane
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alignment. The remaining 2 bytes
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represent the pre-emphasis and voltage
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swing level adjustments requested by the
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RX device. */
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} XDptx_SinkConfig;
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/**
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* This typedef contains configuration information about the main link settings.
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*/
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typedef struct {
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u8 LaneCount; /**< The current lane count of the main
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link. */
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u8 LinkRate; /**< The current link rate of the main
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link. */
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u8 ScramblerEn; /**< Symbol scrambling is currently in
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use over the main link. */
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u8 EnhancedFramingMode; /**< Enhanced frame mode is currently in
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use over the main link. */
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u8 DownspreadControl; /**< Downspread control is currently in
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use over the main link. */
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u8 MaxLaneCount; /**< The maximum lane count of the main
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link. */
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u8 MaxLinkRate; /**< The maximum link rate of the main
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link. */
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u8 SupportEnhancedFramingMode; /**< Enhanced frame mode is supported by
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the RX device. */
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u8 SupportDownspreadControl; /**< Downspread control is supported by
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the RX device. */
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u8 VsLevel; /**< The current voltage swing level for
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each lane. */
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u8 PeLevel; /**< The current pre-emphasis/cursor
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level for each lane. */
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u8 Pattern; /**< The current pattern currently in
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use over the main link. */
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} XDptx_LinkConfig;
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/**
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* This typedef contains the main stream attributes which determine how the
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* video will be displayed.
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*/
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typedef struct {
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XVidC_VideoTimingMode Vtm; /**< The video timing. */
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u32 PixelClockHz; /**< The pixel clock of the stream (in
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Hz). */
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u32 HStart; /**< Horizontal blank start (in
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pixels). */
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u32 VStart; /**< Vertical blank start (in lines). */
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u32 Misc0; /**< Miscellaneous stream attributes 0
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as specified by the DisplayPort
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1.2 specification. */
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u32 Misc1; /**< Miscellaneous stream attributes 1
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as specified by the DisplayPort
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1.2 specification. */
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u32 NVid; /**< N value for the video stream. */
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u32 UserPixelWidth; /**< The width of the user data input
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port. */
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u32 DataPerLane; /**< Used to translate the number of
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pixels per line to the native
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internal 16-bit datapath. */
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u32 AvgBytesPerTU; /**< Average number of bytes per
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transfer unit, scaled up by a
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factor of 1000. */
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u32 TransferUnitSize; /**< Size of the transfer unit in the
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framing logic. In MST mode, this
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is also the number of time slots
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that are alloted in the payload
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ID table. */
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u32 InitWait; /**< Number of initial wait cycles at
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the start of a new line by
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the framing logic. */
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u32 BitsPerColor; /**< Number of bits per color
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component. */
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u8 ComponentFormat; /**< The component format currently in
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use by the video stream. */
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u8 DynamicRange; /**< The dynamic range currently in use
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by the video stream. */
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u8 YCbCrColorimetry; /**< The YCbCr colorimetry currently in
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use by the video stream. */
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u8 SynchronousClockMode; /**< Synchronous clock mode is currently
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in use by the video stream. */
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u8 OverrideUserPixelWidth; /**< If set to 1, the value stored for
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UserPixelWidth will be used as
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the pixel width. */
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} XDptx_MainStreamAttributes;
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/**
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* This typedef describes a stream when the driver is running in multi-stream
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* transport (MST) mode.
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*/
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typedef struct {
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u8 LinkCountTotal; /** The total number of DisplayPort
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links from the DisplayPort TX to
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the sink device that this MST
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stream is targeting.*/
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u8 RelativeAddress[15]; /** The relative address from the
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DisplayPort TX to the sink
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device that this MST stream is
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targeting.*/
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u16 MstPbn; /**< Payload bandwidth number used to
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allocate bandwidth for the MST
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stream. */
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u8 MstStreamEnable; /**< In MST mode, enables the
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corresponding stream for this
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MSA configuration. */
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} XDptx_MstStream;
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/**
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* This typedef describes some board characteristics information that affects
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* link training.
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*/
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typedef struct {
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u8 HasRedriverInPath; /**< Redriver in path requires different voltage
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swing and pre-emphasis. */
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u8 TxVsLevels[4]; /**< The voltage swing levels to be used by the
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DisplayPort TX. */
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u8 TxPeLevels[4]; /**< The pre-emphasis/cursor level to be used by
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the DisplayPort TX. */
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u8 TxVsOffset; /**< Voltage swing compensation offset used when
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pre-emphasis is used. */
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} XDptx_BoardChar;
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/**
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* This typedef describes a downstream DisplayPort device when the driver is
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* running in multi-stream transport (MST) mode.
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*/
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typedef struct {
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u32 Guid[4]; /**< The global unique identifier (GUID)
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of the device. */
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u8 RelativeAddress[15]; /**< The relative address from the
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DisplayPort TX to this
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device. */
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u8 DeviceType; /**< The type of DisplayPort device.
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Either a branch or sink. */
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u8 LinkCountTotal; /**< The total number of DisplayPort
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links connecting this device to
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the DisplayPort TX. */
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u8 DpcdRev; /**< The revision of the device's
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DisplayPort Configuration Data
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(DPCD). For this device to
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support MST features, this value
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must represent a protocl version
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greater or equal to 1.2. */
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u8 MsgCapStatus; /**< This device is capable of sending
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and receiving sideband
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messages. */
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} XDptx_TopologyNode;
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/**
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* This typedef describes a the entire topology of connected downstream
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* DisplayPort devices (from the DisplayPort TX) when the driver is operating
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* in multi-stream transport (MST) mode.
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*/
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typedef struct {
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u8 NodeTotal; /**< The total number of nodes that were
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found in the MST topology. */
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XDptx_TopologyNode NodeTable[63]; /**< A table listing all the nodes in
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the MST topology. */
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u8 SinkTotal; /**< The total number of sinks in the
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MST topology. */
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XDptx_TopologyNode *SinkList[63]; /**< A pointer list of sinks in the
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MST topology. The entries will
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point to the sinks in the
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NodeTable. */
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} XDptx_Topology;
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/**
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* This typedef describes a port that is connected to a DisplayPort branch
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* device. This structure is used when the driver is operating in multi-stream
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* transport (MST) mode.
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*/
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typedef struct {
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u8 InputPort; /**< Specifies that this port is an
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input port. */
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u8 PeerDeviceType; /**< Specifies the device type connected
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to this port. */
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u8 PortNum; /**< The port number of this port. */
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u8 MsgCapStatus; /**< This port or the device at this
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port can send and receive MST
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messages. */
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u8 DpDevPlugStatus; /**< There is a device connected to this
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port. */
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u8 LegacyDevPlugStatus; /**< This port is connected to a legacy
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device. */
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u8 DpcdRev; /**< The DisplayPort Configuration Data
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(DPCD) revision of the device
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connected to this port. */
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u32 Guid[4]; /**< The global unique identifier (GUID)
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of the device connected to this
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port. */
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u8 NumSdpStreams; /**< The total number of Secondary-Data
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Packet (SDP) streams that this
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port can handle. */
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u8 NumSdpStreamSinks; /**< The number of SDP streams
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associated with this port. */
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} XDptx_SbMsgLinkAddressReplyPortDetail;
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/**
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* This typedef describes a DisplayPort branch device. This structure is used
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* when the driver is operating in multi-stream transport (MST) mode.
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*/
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typedef struct {
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u8 ReplyType; /**< The reply type of the sideband
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message. A value of 1 indicates
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that the request wasn't
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successful and the return data
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will give the reason for a
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negative-acknowledge (NACK). */
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u8 RequestId; /**< The request identifier of the
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reply. This should correspond to
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the request identifier for the
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LINK_ADDRESS sideband message
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request. */
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u32 Guid[4]; /**< The global unique identifier (GUID)
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of the branch device. */
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u8 NumPorts; /**< The number of ports associated with
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this branch device. */
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XDptx_SbMsgLinkAddressReplyPortDetail PortDetails[16]; /**< An array
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describing all ports attached to
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this branch device. */
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} XDptx_SbMsgLinkAddressReplyDeviceInfo;
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/******************************************************************************/
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/**
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* Callback type which represents the handler for a Hot-Plug-Detect (HPD) event
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* interrupt.
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*
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* @param InstancePtr is a pointer to the XDptx instance.
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*
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* @note None.
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*
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*******************************************************************************/
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typedef void (*XDptx_HpdEventHandler)(void *InstancePtr);
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/******************************************************************************/
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/**
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* Callback type which represents the handler for a Hot-Plug-Detect (HPD) pulse
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* interrupt.
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*
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* @param InstancePtr is a pointer to the XDptx instance.
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*
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* @note None.
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*
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*******************************************************************************/
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typedef void (*XDptx_HpdPulseHandler)(void *InstancePtr);
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/**
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* The XDptx driver instance data. The user is required to allocate a variable
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* of this type for every XDptx device in the system. A pointer to a variable of
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* this type is then passed to the driver API functions.
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*/
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typedef struct {
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XDp_Config Config; /**< Configuration structure for
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the DisplayPort TX
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core. It is important to
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keep this member first
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in the XDptx order. */
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u32 MstEnable; /**< Multi-stream transport
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(MST) mode. Enables
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functionality, allowing
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multiple streams to be
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sent over the main
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link. */
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u32 IsReady; /**< Device is initialized and
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ready. */
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u8 TrainAdaptive; /**< Downshift lane count and
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link rate if necessary
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during training. */
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XDptx_SinkConfig RxConfig; /**< Configuration structure for
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the RX device. */
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XDptx_LinkConfig LinkConfig; /**< Configuration structure for
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the main link. */
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XDptx_BoardChar BoardChar; /**< Some board characteristics
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information that affects
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link training. */
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XDptx_MainStreamAttributes MsaConfig[4]; /**< Configuration structure
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for the main stream
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attributes (MSA). Each
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stream has its own set
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of attributes. When MST
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mode is disabled, only
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MsaConfig[0] is used. */
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XDptx_MstStream MstStreamConfig[4]; /**< Configuration structure
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for a multi-stream
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transport (MST)
|
|
stream. */
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|
XDptx_Topology Topology; /**< The topology of connected
|
|
downstream DisplayPort
|
|
devices when the driver
|
|
is running in MST
|
|
mode. */
|
|
u32 AuxDelayUs; /**< Amount of latency in micro-
|
|
seconds to use between
|
|
AUX transactions. */
|
|
u32 SbMsgDelayUs; /**< Amount of latency in micro-
|
|
seconds to use between
|
|
sideband messages for
|
|
multi-stream transport
|
|
(MST) mode. */
|
|
XDp_TimerHandler UserTimerWaitUs; /**< Custom user function for
|
|
delay/sleep. */
|
|
void *UserTimerPtr; /**< Pointer to a timer instance
|
|
used by the custom user
|
|
delay/sleep function. */
|
|
XDptx_HpdEventHandler HpdEventHandler; /**< Callback function for Hot-
|
|
Plug-Detect (HPD) event
|
|
interrupts. */
|
|
void *HpdEventCallbackRef; /**< A pointer to the user data
|
|
passed to the HPD event
|
|
callback function. */
|
|
XDptx_HpdPulseHandler HpdPulseHandler; /**< Callback function for Hot-
|
|
Plug-Detect (HPD) pulse
|
|
interrupts. */
|
|
void *HpdPulseCallbackRef; /**< A pointer to the user data
|
|
passed to the HPD pulse
|
|
callback function. */
|
|
} XDptx;
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|
|
|
/**************************** Function Prototypes *****************************/
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|
|
|
/* xdptx.c: Setup and initialization functions. */
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|
void XDptx_CfgInitialize(XDptx *InstancePtr, XDp_Config *ConfigPtr,
|
|
u32 EffectiveAddr);
|
|
u32 XDptx_InitializeTx(XDptx *InstancePtr);
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|
u32 XDptx_GetRxCapabilities(XDptx *InstancePtr);
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|
|
|
/* xdptx.c: Link policy maker functions. */
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|
u32 XDptx_CfgMainLinkMax(XDptx *InstancePtr);
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|
u32 XDptx_EstablishLink(XDptx *InstancePtr);
|
|
u32 XDptx_CheckLinkStatus(XDptx *InstancePtr, u8 LaneCount);
|
|
void XDptx_EnableTrainAdaptive(XDptx *InstancePtr, u8 Enable);
|
|
void XDptx_SetHasRedriverInPath(XDptx *InstancePtr, u8 Set);
|
|
void XDptx_CfgTxVsOffset(XDptx *InstancePtr, u8 Offset);
|
|
void XDptx_CfgTxVsLevel(XDptx *InstancePtr, u8 Level, u8 TxLevel);
|
|
void XDptx_CfgTxPeLevel(XDptx *InstancePtr, u8 Level, u8 TxLevel);
|
|
|
|
/* xdptx.c: AUX transaction functions. */
|
|
u32 XDptx_AuxRead(XDptx *InstancePtr, u32 DpcdAddress, u32 BytesToRead,
|
|
void *ReadData);
|
|
u32 XDptx_AuxWrite(XDptx *InstancePtr, u32 DpcdAddress, u32 BytesToWrite,
|
|
void *WriteData);
|
|
u32 XDptx_IicRead(XDptx *InstancePtr, u8 IicAddress, u16 Offset,
|
|
u16 BytesToRead, void *ReadData);
|
|
u32 XDptx_IicWrite(XDptx *InstancePtr, u8 IicAddress, u8 BytesToWrite,
|
|
void *WriteData);
|
|
|
|
/* xdptx.c: Functions for controlling the link configuration. */
|
|
u32 XDptx_SetDownspread(XDptx *InstancePtr, u8 Enable);
|
|
u32 XDptx_SetEnhancedFrameMode(XDptx *InstancePtr, u8 Enable);
|
|
u32 XDptx_SetLaneCount(XDptx *InstancePtr, u8 LaneCount);
|
|
u32 XDptx_SetLinkRate(XDptx *InstancePtr, u8 LinkRate);
|
|
u32 XDptx_SetScrambler(XDptx *InstancePtr, u8 Enable);
|
|
|
|
/* xdptx.c: General usage functions. */
|
|
u32 XDptx_IsConnected(XDptx *InstancePtr);
|
|
void XDptx_EnableMainLink(XDptx *InstancePtr);
|
|
void XDptx_DisableMainLink(XDptx *InstancePtr);
|
|
void XDptx_ResetPhy(XDptx *InstancePtr, u32 Reset);
|
|
void XDptx_SetUserTimerHandler(XDptx *InstancePtr,
|
|
XDp_TimerHandler CallbackFunc, void *CallbackRef);
|
|
void XDptx_WaitUs(XDptx *InstancePtr, u32 MicroSeconds);
|
|
|
|
/* xdptx_spm.c: Stream policy maker functions. */
|
|
void XDptx_CfgMsaRecalculate(XDptx *InstancePtr, u8 Stream);
|
|
void XDptx_CfgMsaUseStandardVideoMode(XDptx *InstancePtr, u8 Stream,
|
|
XVidC_VideoMode VideoMode);
|
|
void XDptx_CfgMsaUseEdidPreferredTiming(XDptx *InstancePtr, u8 Stream,
|
|
u8 *Edid);
|
|
void XDptx_CfgMsaUseCustom(XDptx *InstancePtr, u8 Stream,
|
|
XDptx_MainStreamAttributes *MsaConfigCustom, u8 Recalculate);
|
|
void XDptx_CfgMsaSetBpc(XDptx *InstancePtr, u8 Stream, u8 BitsPerColor);
|
|
void XDptx_CfgMsaEnSynchClkMode(XDptx *InstancePtr, u8 Stream, u8 Enable);
|
|
void XDptx_SetVideoMode(XDptx *InstancePtr, u8 Stream);
|
|
void XDptx_ClearMsaValues(XDptx *InstancePtr, u8 Stream);
|
|
void XDptx_SetMsaValues(XDptx *InstancePtr, u8 Stream);
|
|
|
|
/* xdptx_intr.c: Interrupt handling functions. */
|
|
void XDptx_HpdInterruptHandler(XDptx *InstancePtr);
|
|
void XDptx_SetHpdEventHandler(XDptx *InstancePtr,
|
|
XDptx_HpdEventHandler CallbackFunc, void *CallbackRef);
|
|
void XDptx_SetHpdPulseHandler(XDptx *InstancePtr,
|
|
XDptx_HpdPulseHandler CallbackFunc, void *CallbackRef);
|
|
|
|
/* xdptx_selftest.c: Self test function. */
|
|
u32 XDptx_SelfTest(XDptx *InstancePtr);
|
|
|
|
/* xdptx_mst.c: Multi-stream transport (MST) functions for enabling or disabling
|
|
* MST mode. */
|
|
void XDptx_MstCfgModeEnable(XDptx *InstancePtr);
|
|
void XDptx_MstCfgModeDisable(XDptx *InstancePtr);
|
|
u32 XDptx_MstCapable(XDptx *InstancePtr);
|
|
u32 XDptx_MstEnable(XDptx *InstancePtr);
|
|
u32 XDptx_MstDisable(XDptx *InstancePtr);
|
|
|
|
/* xdptx_mst.c: Multi-stream transport (MST) functions for enabling or disabling
|
|
* MST streams and selecting their associated target sinks. */
|
|
void XDptx_MstCfgStreamEnable(XDptx *InstancePtr, u8 Stream);
|
|
void XDptx_MstCfgStreamDisable(XDptx *InstancePtr, u8 Stream);
|
|
u8 XDptx_MstStreamIsEnabled(XDptx *InstancePtr, u8 Stream);
|
|
void XDptx_SetStreamSelectFromSinkList(XDptx *InstancePtr, u8 Stream, u8
|
|
SinkNum);
|
|
void XDptx_SetStreamSinkRad(XDptx *InstancePtr, u8 Stream, u8 LinkCountTotal,
|
|
u8 *RelativeAddress);
|
|
|
|
/* xdptx_mst.c: Multi-stream transport (MST) functions related to MST topology
|
|
* discovery and management. */
|
|
u32 XDptx_DiscoverTopology(XDptx *InstancePtr);
|
|
u32 XDptx_FindAccessibleDpDevices(XDptx *InstancePtr, u8 LinkCountTotal,
|
|
u8 *RelativeAddress);
|
|
void XDptx_TopologySwapSinks(XDptx *InstancePtr, u8 Index0, u8 Index1);
|
|
void XDptx_TopologySortSinksByTiling(XDptx *InstancePtr);
|
|
|
|
/* xdptx_mst.c: Multi-stream transport (MST) functions for communicating
|
|
* with downstream DisplayPort devices. */
|
|
u32 XDptx_RemoteDpcdRead(XDptx *InstancePtr, u8 LinkCountTotal,
|
|
u8 *RelativeAddress, u32 DpcdAddress, u32 BytesToRead, u8 *ReadData);
|
|
u32 XDptx_RemoteDpcdWrite(XDptx *InstancePtr, u8 LinkCountTotal,
|
|
u8 *RelativeAddress, u32 DpcdAddress, u32 BytesToWrite, u8 *WriteData);
|
|
u32 XDptx_RemoteIicRead(XDptx *InstancePtr, u8 LinkCountTotal,
|
|
u8 *RelativeAddress, u8 IicAddress, u16 Offset, u16 BytesToRead,
|
|
u8 *ReadData);
|
|
u32 XDptx_RemoteIicWrite(XDptx *InstancePtr, u8 LinkCountTotal,
|
|
u8 *RelativeAddress, u8 IicAddress, u8 BytesToWrite, u8 *WriteData);
|
|
|
|
/* xdptx_mst.c: Multi-stream transport (MST) functions related to MST stream
|
|
* allocation. */
|
|
u32 XDptx_AllocatePayloadStreams(XDptx *InstancePtr);
|
|
u32 XDptx_AllocatePayloadVcIdTable(XDptx *InstancePtr, u8 VcId, u8 Ts);
|
|
u32 XDptx_ClearPayloadVcIdTable(XDptx *InstancePtr);
|
|
|
|
/* xdptx_mst.c: Multi-stream transport (MST) functions for issuing sideband
|
|
* messages. */
|
|
u32 XDptx_SendSbMsgRemoteDpcdWrite(XDptx *InstancePtr, u8 LinkCountTotal,
|
|
u8 *RelativeAddress, u32 DpcdAddress, u32 BytesToWrite, u8 *WriteData);
|
|
u32 XDptx_SendSbMsgRemoteDpcdRead(XDptx *InstancePtr, u8 LinkCountTotal,
|
|
u8 *RelativeAddress, u32 DpcdAddress, u32 BytesToRead, u8 *ReadData);
|
|
u32 XDptx_SendSbMsgRemoteIicWrite(XDptx *InstancePtr, u8 LinkCountTotal,
|
|
u8 *RelativeAddress, u8 IicDeviceId, u8 BytesToWrite, u8 *WriteData);
|
|
u32 XDptx_SendSbMsgRemoteIicRead(XDptx *InstancePtr, u8 LinkCountTotal,
|
|
u8 *RelativeAddress, u8 IicDeviceId, u8 Offset, u8 BytesToRead,
|
|
u8 *ReadData);
|
|
u32 XDptx_SendSbMsgLinkAddress(XDptx *InstancePtr, u8 LinkCountTotal,
|
|
u8 *RelativeAddress, XDptx_SbMsgLinkAddressReplyDeviceInfo *DeviceInfo);
|
|
u32 XDptx_SendSbMsgEnumPathResources(XDptx *InstancePtr, u8 LinkCountTotal,
|
|
u8 *RelativeAddress, u16 *AvailPbn, u16 *FullPbn);
|
|
u32 XDptx_SendSbMsgAllocatePayload(XDptx *InstancePtr, u8 LinkCountTotal,
|
|
u8 *RelativeAddress, u8 VcId, u16 Pbn);
|
|
u32 XDptx_SendSbMsgClearPayloadIdTable(XDptx *InstancePtr);
|
|
|
|
/* xdptx_mst.c: Multi-stream transport (MST) utility functions. */
|
|
void XDptx_WriteGuid(XDptx *InstancePtr, u8 LinkCountTotal, u8 *RelativeAddress,
|
|
u32 Guid[4]);
|
|
void XDptx_GetGuid(XDptx *InstancePtr, u8 LinkCountTotal, u8 *RelativeAddress,
|
|
u32 *Guid);
|
|
|
|
/* xdptx_edid.c: EDID utility functions. */
|
|
u32 XDptx_GetEdid(XDptx *InstancePtr, u8 *Edid);
|
|
u32 XDptx_GetRemoteEdid(XDptx *InstancePtr, u8 LinkCountTotal,
|
|
u8 *RelativeAddress, u8 *Edid);
|
|
u32 XDptx_GetEdidBlock(XDptx *InstancePtr, u8 *Data, u8 BlockNum);
|
|
u32 XDptx_GetRemoteEdidBlock(XDptx *InstancePtr, u8 *Data, u8 BlockNum,
|
|
u8 LinkCountTotal, u8 *RelativeAddress);
|
|
u32 XDptx_GetRemoteEdidDispIdExt(XDptx *InstancePtr, u8 *Data,
|
|
u8 LinkCountTotal, u8 *RelativeAddress);
|
|
u32 XDptx_GetDispIdDataBlock(u8 *DisplayIdRaw, u8 SectionTag,
|
|
u8 **DataBlockPtr);
|
|
u32 XDptx_GetRemoteTiledDisplayDb(XDptx *InstancePtr, u8 *EdidExt,
|
|
u8 LinkCountTotal, u8 *RelativeAddress, u8 **DataBlockPtr);
|
|
|
|
#endif /* XDPTX_H_ */
|