a545768505
This patch supports HIP based video processing subsystem by reorganizing the HLS generated code to align with xilinx driver guidelines. Signed-off-by: Rohit Consul <rohit.consul@xilinx.com> Reviewed-by: Andrei Simion <andreis@xilinx.com>
138 lines
5.4 KiB
C
138 lines
5.4 KiB
C
// ==============================================================
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// File generated by Vivado(TM) HLS - High-Level Synthesis from C, C++ and SystemC
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// Version: 2015.1
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// Copyright (C) 2015 Xilinx Inc. All rights reserved.
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//
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// ==============================================================
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#ifndef XV_VSCALER_H
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#define XV_VSCALER_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/***************************** Include Files *********************************/
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#ifndef __linux__
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#include "xil_types.h"
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#include "xil_assert.h"
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#include "xstatus.h"
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#include "xil_io.h"
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#else
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#include <stdint.h>
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#include <assert.h>
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#include <dirent.h>
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#include <fcntl.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <sys/mman.h>
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#include <unistd.h>
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#include <stddef.h>
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#endif
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#include "xv_vscaler_hw.h"
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/**************************** Type Definitions ******************************/
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#ifdef __linux__
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typedef uint8_t u8;
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typedef uint16_t u16;
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typedef uint32_t u32;
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#else
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/**
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* This typedef contains configuration information for the vertical scaler
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* core. Each core instance should have a configuration structure
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* associated.
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*/
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typedef struct {
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u16 DeviceId; /**< Unique ID of device */
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u32 BaseAddress; /**< The base address of the core instance. */
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u16 PixPerClk; /**< Samples Per Clock supported by core instance */
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u16 NumVidComponents; /**< Number of Video Components */
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u16 MaxWidth; /**< Maximum columns supported by core instance */
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u16 MaxHeight; /**< Maximum rows supported by core instance */
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u16 MaxDataWidth; /**< Maximum Data width of each channel */
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u16 PhaseShift; /**< Max num of phases (2^PhaseShift) */
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u16 ScalerType; /**< Scaling Algorithm Selected */
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u16 NumTaps; /**< Number of taps */
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} XV_vscaler_Config;
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#endif
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/**
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* Driver instance data. An instance must be allocated for each core in use.
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*/
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typedef struct {
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XV_vscaler_Config Config; /**< Hardware Configuration */
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u32 IsReady; /**< Device is initialized and ready */
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} XV_vscaler;
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/***************** Macros (Inline Functions) Definitions *********************/
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#ifndef __linux__
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#define XV_vscaler_WriteReg(BaseAddress, RegOffset, Data) \
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Xil_Out32((BaseAddress) + (RegOffset), (u32)(Data))
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#define XV_vscaler_ReadReg(BaseAddress, RegOffset) \
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Xil_In32((BaseAddress) + (RegOffset))
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#else
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#define XV_vscaler_WriteReg(BaseAddress, RegOffset, Data) \
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*(volatile u32*)((BaseAddress) + (RegOffset)) = (u32)(Data)
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#define XV_vscaler_ReadReg(BaseAddress, RegOffset) \
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*(volatile u32*)((BaseAddress) + (RegOffset))
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#define Xil_AssertVoid(expr) assert(expr)
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#define Xil_AssertNonvoid(expr) assert(expr)
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#define XST_SUCCESS 0
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#define XST_DEVICE_NOT_FOUND 2
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#define XST_OPEN_DEVICE_FAILED 3
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#define XIL_COMPONENT_IS_READY 1
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#endif
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/************************** Function Prototypes *****************************/
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#ifndef __linux__
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int XV_vscaler_Initialize(XV_vscaler *InstancePtr, u16 DeviceId);
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XV_vscaler_Config* XV_vscaler_LookupConfig(u16 DeviceId);
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int XV_vscaler_CfgInitialize(XV_vscaler *InstancePtr,
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XV_vscaler_Config *ConfigPtr,
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u32 EffectiveAddr);
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#else
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int XV_vscaler_Initialize(XV_vscaler *InstancePtr, const char* InstanceName);
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int XV_vscaler_Release(XV_vscaler *InstancePtr);
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#endif
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void XV_vscaler_Start(XV_vscaler *InstancePtr);
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u32 XV_vscaler_IsDone(XV_vscaler *InstancePtr);
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u32 XV_vscaler_IsIdle(XV_vscaler *InstancePtr);
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u32 XV_vscaler_IsReady(XV_vscaler *InstancePtr);
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void XV_vscaler_EnableAutoRestart(XV_vscaler *InstancePtr);
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void XV_vscaler_DisableAutoRestart(XV_vscaler *InstancePtr);
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void XV_vscaler_Set_HwReg_HeightIn(XV_vscaler *InstancePtr, u32 Data);
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u32 XV_vscaler_Get_HwReg_HeightIn(XV_vscaler *InstancePtr);
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void XV_vscaler_Set_HwReg_Width(XV_vscaler *InstancePtr, u32 Data);
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u32 XV_vscaler_Get_HwReg_Width(XV_vscaler *InstancePtr);
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void XV_vscaler_Set_HwReg_HeightOut(XV_vscaler *InstancePtr, u32 Data);
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u32 XV_vscaler_Get_HwReg_HeightOut(XV_vscaler *InstancePtr);
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void XV_vscaler_Set_HwReg_LineRate(XV_vscaler *InstancePtr, u32 Data);
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u32 XV_vscaler_Get_HwReg_LineRate(XV_vscaler *InstancePtr);
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u32 XV_vscaler_Get_HwReg_vfltCoeff_BaseAddress(XV_vscaler *InstancePtr);
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u32 XV_vscaler_Get_HwReg_vfltCoeff_HighAddress(XV_vscaler *InstancePtr);
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u32 XV_vscaler_Get_HwReg_vfltCoeff_TotalBytes(XV_vscaler *InstancePtr);
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u32 XV_vscaler_Get_HwReg_vfltCoeff_BitWidth(XV_vscaler *InstancePtr);
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u32 XV_vscaler_Get_HwReg_vfltCoeff_Depth(XV_vscaler *InstancePtr);
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u32 XV_vscaler_Write_HwReg_vfltCoeff_Words(XV_vscaler *InstancePtr, int offset, int *data, int length);
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u32 XV_vscaler_Read_HwReg_vfltCoeff_Words(XV_vscaler *InstancePtr, int offset, int *data, int length);
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u32 XV_vscaler_Write_HwReg_vfltCoeff_Bytes(XV_vscaler *InstancePtr, int offset, char *data, int length);
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u32 XV_vscaler_Read_HwReg_vfltCoeff_Bytes(XV_vscaler *InstancePtr, int offset, char *data, int length);
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void XV_vscaler_InterruptGlobalEnable(XV_vscaler *InstancePtr);
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void XV_vscaler_InterruptGlobalDisable(XV_vscaler *InstancePtr);
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void XV_vscaler_InterruptEnable(XV_vscaler *InstancePtr, u32 Mask);
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void XV_vscaler_InterruptDisable(XV_vscaler *InstancePtr, u32 Mask);
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void XV_vscaler_InterruptClear(XV_vscaler *InstancePtr, u32 Mask);
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u32 XV_vscaler_InterruptGetEnabled(XV_vscaler *InstancePtr);
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u32 XV_vscaler_InterruptGetStatus(XV_vscaler *InstancePtr);
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#ifdef __cplusplus
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}
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#endif
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#endif
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