embeddedsw/lib
Kinjal Pravinbhai Patel 6565a67b0e bsp: a9: change in xil_cache APIs
This patch modifies Xil_DCacheInvalidateRange and Xil_DCacheFlushRange
to remove unnecessary dsb in the APIs. It also adds necessary
Xil_L2CacheSync in Xil_L2CacheInvalidateRange API.

Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
2015-06-24 14:51:11 +05:30
..
bsp bsp: a9: change in xil_cache APIs 2015-06-24 14:51:11 +05:30
sw_apps/zynq_fsbl sw_apps:zynq_fsbl: Corrected logic to clear DMA done count for PCAP 2015-06-24 14:51:09 +05:30
sw_services xilskey: Initialised RSAKeyReadback value with zero 2015-06-24 14:51:09 +05:30