43a7c2e0c2
This patch updates the doxygen for the intc driver. Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
140 lines
10 KiB
HTML
Executable file
140 lines
10 KiB
HTML
Executable file
<html>
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<head>
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<meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1">
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<title>
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intc v3_3
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</title>
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<link href="$DriverApiDocsCssPath" rel="stylesheet" type="text/css">
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</head>
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<h3 class="PageHeader">Xilinx Processor IP Library</h3>
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<hl>Software Drivers</hl>
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<hr class="whs1">
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<!-- Generated by Doxygen 1.4.7 -->
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<div class="tabs">
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<ul>
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<li id="current"><a href="index.html"><span>Main Page</span></a></li>
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<li><a href="annotated.html"><span>Classes</span></a></li>
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<li><a href="files.html"><span>Files</span></a></li>
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</ul></div>
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<h1>intc v3_3</h1>
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<p>
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The Xilinx interrupt controller driver component. This component supports the Xilinx interrupt controller.<p>
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The interrupt controller driver uses the idea of priority for the various handlers. Priority is an integer within the range of 0 and 31 inclusive with 0 being the highest priority interrupt source.<p>
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The Xilinx interrupt controller supports the following features:<p>
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<ul>
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<li>specific individual interrupt enabling/disabling</li><li>specific individual interrupt acknowledging</li><li>attaching specific callback function to handle interrupt source</li><li>master enable/disable</li><li>single callback per interrupt or all pending interrupts handled for each interrupt of the processor</li></ul>
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<p>
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The acknowledgement of the interrupt within the interrupt controller is selectable, either prior to the device's handler being called or after the handler is called. This is necessary to support interrupt signal inputs which are either edge or level signals. Edge driven interrupt signals require that the interrupt is acknowledged prior to the interrupt being serviced in order to prevent the loss of interrupts which are occurring extremely close together. A level driven interrupt input signal requires the interrupt to acknowledged after servicing the interrupt to ensure that the interrupt only generates a single interrupt condition.<p>
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Details about connecting the interrupt handler of the driver are contained in the source file specific to interrupt processing, <a class="el" href="xintc__intr_8c.html">xintc_intr.c</a>.<p>
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This driver is intended to be RTOS and processor independent. It works with physical addresses only. Any needs for dynamic memory management, threads or thread mutual exclusion, virtual memory, or cache control must be satisfied by the layer above this driver.<p>
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<b>Interrupt Vector Tables</b><p>
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The interrupt vector table for each interrupt controller device is declared statically in <a class="el" href="xintc__g_8c.html">xintc_g.c</a> within the configuration data for each instance. The device ID of the interrupt controller device is used by the driver as a direct index into the configuration data table - to retrieve the vector table for an instance of the interrupt controller. The user should populate the vector table with handlers and callbacks at run-time using the <a class="el" href="xintc_8c.html#ee9ec5873a764994d64b4da35a110084">XIntc_Connect()</a> and <a class="el" href="xintc_8c.html#8f7caaeb26b6b264fffefbd32f90f855">XIntc_Disconnect()</a> functions.<p>
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Each vector table entry corresponds to a device that can generate an interrupt. Each entry contains an interrupt handler function and an argument to be passed to the handler when an interrupt occurs. The tools default this argument to the base address of the interrupting device. Note that the device driver interrupt handlers given in this file do not take a base address as an argument, but instead take a pointer to the driver instance. This means that although the table is created statically, the user must still use <a class="el" href="xintc_8c.html#ee9ec5873a764994d64b4da35a110084">XIntc_Connect()</a> when the interrupt handler takes an argument other than the base address. This is only to say that the existence of the static vector tables should not mislead the user into thinking they no longer need to register/connect interrupt handlers with this driver.<p>
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<pre>
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MODIFICATION HISTORY:</pre><p>
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<pre> Ver Who Date Changes
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----- ---- -------- -------------------------------------------------------
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1.00a ecm 08/16/01 First release
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1.00a rpm 01/09/02 Removed the AckLocation argument from <a class="el" href="xintc_8c.html#ee9ec5873a764994d64b4da35a110084">XIntc_Connect()</a>.
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This information is now internal in <a class="el" href="xintc__g_8c.html">xintc_g.c</a>.
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1.00b jhl 02/13/02 Repartitioned the driver for smaller files
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1.00b jhl 04/24/02 Made LookupConfig function global and relocated config
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data type
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1.00c rpm 10/17/03 New release. Support the static vector table created
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in the <a class="el" href="xintc__g_8c.html">xintc_g.c</a> configuration table. Moved vector
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table and options out of instance structure and into
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the configuration table.
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1.10c mta 03/21/07 Updated to new coding style
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1.11a sv 11/21/07 Updated driver to support access through a DCR bridge
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2.00a ktn 10/20/09 Updated to use HAL Processor APIs and _m is removed from
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all the macro names/definitions.
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2.01a sdm 04/27/10 Updated the tcl so that the defintions are generated in
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the xparameters.h to know whether the optional registers
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SIE, CIE and IVR are enabled in the HW - Refer CR 555392.
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This driver doesnot make use of these definitions and does
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not use the optional registers.
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2.03a hvm 05/24/11 Updated the tcl to generate vector Ids for external
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interrupts. CR565336
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2.04a bss 01/13/12 Added XIntc_ConnectFastHandler API for Fast Interrupt
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and XIntc_SetNormalIntrMode for setting to normal
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interrupt mode.
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2.04a asa 03/19/12 Changed the <a class="el" href="struct_x_intc___config.html">XIntc_Config</a> struct. The order of entries
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declared in the structure now matches with the
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XIntc_ConfigTable generated by the driver tcl.
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2.05a bss 08/16/12 Updated to support relocatable vectors in Microblaze,
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added IntVectorAddr to <a class="el" href="struct_x_intc___config.html">XIntc_Config</a> for this.
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Added XIntc_RegisterFastHandler API to register fast
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interrupt handlers using base address.
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2.06a bss 01/28/13 To support Cascade mode:
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Added XIN_INTC_NOCASCADE,XIN_INTC_PRIMARY,
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XIN_INTC_SECONDARY,XIN_INTC_LAST and
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XIN_CONTROLLER_MAX_INTRS macros
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Added NumberofIntrs and IntcType fields in <a class="el" href="struct_x_intc___config.html">XIntc_Config</a>
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structure.
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Modified XIntc_Initialize,XIntc_Start,XIntc_Connect
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XIntc_Disconnect,XIntc_Enable,XIntc_Disable,
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XIntc_Acknowledge,XIntc_ConnectFastHandler and
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XIntc_SetNormalIntrMode APIs.Added XIntc_InitializeSlaves
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API in <a class="el" href="xintc_8c.html">xintc.c</a>
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Modified XIntc_DeviceInterruptHandler,
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XIntc_SetIntrSvcOption,XIntc_RegisterHandler and
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XIntc_RegisterFastHandler APIs.Added XIntc_CascadeHandler
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API in <a class="el" href="xintc__l_8c.html">xintc_l.c</a>.
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Modified XIntc_SetOptions API in <a class="el" href="xintc__options_8c.html">xintc_options.c</a>.
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Modified XIntc_SimulateIntr API in <a class="el" href="xintc__selftest_8c.html">xintc_selftest.c</a>.
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Modified driver tcl:
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to check for Cascade mode and generate XPAR_INTC_TYPE
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for each controller.
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Generate XPAR_INTC_MAX_NUM_INTR_INPUTS by adding all
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interrupt sources of all Controllers in Cascade mode.
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2.07a bss 10/18/13 To support Nested interrupts:
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Modified XIntc_DeviceInterruptHandler API.
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Added XIN_ILR_OFFSET macro in <a class="el" href="xintc__l_8h.html">xintc_l.h</a>.
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Modified driver tcl to generate HAS_ILR parameter in
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xparameters.h
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3.0 bss 01/28/13 Modified <a class="el" href="xintc_8c.html">xintc.c</a> to initialize IVAR register with
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XPAR_MICROBLAZE_BASE_VECTORS + 0x10 to fix
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CR#765931.
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Modified driver tcl to generate XPAR_AXI_INTC_0_TYPE
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correctly(CR#764865).</pre><p>
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<pre><dl compact><dt><b>Note:</b></dt><dd>For Cascade mode, Interrupt IDs are generated in xparameters.h
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as shown below:</dd></dl>
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Master/Primary INTC
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______
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| |-0 Secondary INTC
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| |-. ______
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| |-. | |-32 Last INTC
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| |-. | |-. ______
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|______|<-31------| |-. | |-64
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| |-. | |-.
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|______|<-63-------| |-.
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| |-.
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|______|-95</pre><p>
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<pre> All driver functions has to be called using DeviceId/
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InstancePtr/BaseAddress of Primary/Master Controller and
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Interrupts IDs generated in xparameters.h only.
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Driver functions takes care of Slave Controllers based on
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Interrupt ID passed. User must not use Interrupt source/ID
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31 of Primary and Secondary controllers to call driver
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functions.</pre><p>
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<pre> For nested interrupts, XIntc_DeviceInterruptHandler saves
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microblaze r14 register on entry and restores on exit. This is
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required since compiler does not support nesting. It enables
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Microblaze interrupts after blocking further interrupts from
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the current interrupt number and interrupts below current
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interrupt proirity by writing to Interrupt Level Register of
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INTC on entry. On exit, it disables microblaze interrupts and
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restores ILR register default value(0xFFFFFFFF)back. It is
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recommended to increase STACK_SIZE in linker script for nested
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interrupts.
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3.0 adk 12/10/13 Updated as per the New Tcl API's
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3.0 adk 17/02/14 Fixed the CR:771287 Changes are made in the intc
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driver tcl.
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3.1 adk 8/4/14 Fixed the CR:783248 Changes are made in
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the test-app tcl
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3.2 bss 4/8/14 Fixed driver tcl to handle external interrupt pins
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correctly (CR#799609).
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3.3 adk 11/3/14 added generation of C_HAS_ILR parameter to
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xparameters.h.Changes are made in the driver tcl file
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(CR#828046).</pre><p>
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<pre> </pre> Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
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