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embeddedsw/XilinxProcessorIPLib/drivers/v_vscaler/src
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Rohit Consul a9740e3b93 v_vscaler: Coefficient register base address offset changed in IP 
Coefficient register base address offset changed in IP from
0x400 to  0x800 to accomodate all supported taps.
Split Phase and Coefficient programming logic in 2 independent
API's. For Bicubic and Bilinear scalers only Phase needs to
be programmed.

Signed-off-by: Rohit Consul <rohit.consul@xilinx.com>
Acked-by: Srikanth Vemula <svemula@xilinx.com>
2015-08-24 23:09:34 +05:30
..
Makefile v_vscaler: Update dependency driver version in mdd 2015-08-10 14:14:45 +05:30
xv_vscaler.c v_vscaler: Updated driver to align with hip flow 2015-07-23 11:01:31 +05:30
xv_vscaler.h v_vscaler: Updated driver to align with hip flow 2015-07-23 11:01:31 +05:30
xv_vscaler_coeff.c v_vscaler: Added multiple pixel per clock support 2015-08-04 14:10:51 +05:30
xv_vscaler_g.c v_vscaler: Updated driver to align with hip flow 2015-07-23 11:01:31 +05:30
xv_vscaler_hw.h v_vscaler: Coefficient register base address offset changed in IP 2015-08-24 23:09:34 +05:30
xv_vscaler_l2.c v_vscaler: Coefficient register base address offset changed in IP 2015-08-24 23:09:34 +05:30
xv_vscaler_l2.h v_vscaler: Added multiple pixel per clock support 2015-08-04 14:10:51 +05:30
xv_vscaler_linux.c v_vscaler: Updated driver to align with hip flow 2015-07-23 11:01:31 +05:30
xv_vscaler_sinit.c v_vscaler: Updated driver to align with hip flow 2015-07-23 11:01:31 +05:30