0f6fa4e9cd
This is a new driver for updated tpg ip in the catalogue Signed-off-by: Rohit Consul <rohit.consul@xilinx.com> Reviewed-by: Andrei Simion <andreis@xilinx.com>
61 lines
2.1 KiB
C
61 lines
2.1 KiB
C
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/*******************************************************************
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*
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* CAUTION: This file is automatically generated by HSI.
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* Version:
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* DO NOT EDIT.
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*
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* Copyright (C) 2010-2015 Xilinx, Inc. All Rights Reserved.*
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*Permission is hereby granted, free of charge, to any person obtaining a copy
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*in the Software without restriction, including without limitation the rights
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*to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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*copies of the Software, and to permit persons to whom the Software is
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*furnished to do so, subject to the following conditions:
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*
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*The above copyright notice and this permission notice shall be included in
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*all copies or substantial portions of the Software.
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*
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* Use of the Software is limited solely to applications:
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*(a) running on a Xilinx device, or
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*(b) that interact with a Xilinx device through a bus or interconnect.
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*
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*THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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*IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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*FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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*XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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*WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT
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*OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*Except as contained in this notice, the name of the Xilinx shall not be used
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*this Software without prior written authorization from Xilinx.
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*
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*
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* Description: Driver configuration
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*
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*******************************************************************/
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#include "xparameters.h"
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#include "xv_tpg.h"
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/*
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* The configuration table for devices
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*/
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XV_tpg_Config XV_tpg_ConfigTable[] =
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{
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{
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#ifdef XPAR_XV_TPG_NUM_INSTANCES
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XPAR_V_TPG_0_DEVICE_ID,
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XPAR_V_TPG_0_S_AXI_CTRL_BASEADDR,
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XPAR_V_TPG_0_HAS_AXI4S_SLAVE,
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XPAR_V_TPG_0_SAMPLES_PER_CLOCK,
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XPAR_V_TPG_0_NUM_VIDEO_COMPONENTS,
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XPAR_V_TPG_0_MAX_COLS,
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XPAR_V_TPG_0_MAX_ROWS,
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XPAR_V_TPG_0_MAX_DATA_WIDTH
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#endif
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}
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};
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