embeddedsw/XilinxProcessorIPLib/drivers/axicdma
Kedareswara rao Appana c6b7045164 axicdma: Handle cache flush/invalidate api's properly for a53
In a53 processor the Cache flush api does both fulsh and invalidate
of the memory once the dma transfer is done before checking the
data we shouldn't invalidate the memory unlike the a9/microblaze case
this patch updates the axicdma examples for the same.

Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Acked-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
2015-08-21 14:14:31 +05:30
..
data axicdma: Add support for 64-bit addressing 2015-07-31 16:55:55 +05:30
examples axicdma: Handle cache flush/invalidate api's properly for a53 2015-08-21 14:14:31 +05:30
src axicdma: Updated @addtogroup with appropriate version infromation. 2015-08-08 11:08:50 +05:30