
- Added dynamic scaler filter selection logic - Added indirection layer for sub-core API's (picture settings, PIP background color, debug information) - Fixed VDMA alignment in 1/2/4 pixel configurations - Added example directory. Included files to be uused with vpss example design that will be released separately Signed-off-by: Rohit Consul <rohit.consul@xilinx.com> Acked-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
223 lines
7.3 KiB
C
223 lines
7.3 KiB
C
/******************************************************************************
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*
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* (c) Copyright 2014 - 2015 Xilinx, Inc. All rights reserved.
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*
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* This file contains confidential and proprietary information
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* of Xilinx, Inc. and is protected under U.S. and
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* international copyright and other intellectual property
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* laws.
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*
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* DISCLAIMER
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* This disclaimer is not a license and does not grant any
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* rights to the materials distributed herewith. Except as
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* otherwise provided in a valid license issued to you by
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* Xilinx, and to the maximum extent permitted by applicable
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* law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND
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* WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES
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* AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING
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* BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-
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* INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and
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* (2) Xilinx shall not be liable (whether in contract or tort,
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* including negligence, or under any other theory of
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* liability) for any loss or damage of any kind or nature
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* related to, arising under or in connection with these
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* materials, including for any direct, or any indirect,
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* special, incidental, or consequential loss or damage
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* (including loss of data, profits, goodwill, or any type of
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* loss or damage suffered as a result of any action brought
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* by a third party) even if such damage or loss was
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* reasonably foreseeable or Xilinx had been advised of the
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* possibility of the same.
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*
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* CRITICAL APPLICATIONS
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* Xilinx products are not designed or intended to be fail-
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* safe, or for use in any application requiring fail-safe
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* performance, such as life-support or safety devices or
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* systems, Class III medical devices, nuclear facilities,
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* applications related to the deployment of airbags, or any
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* other applications that could lead to death, personal
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* injury, or severe property or environmental damage
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* (individually and collectively, "Critical
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* Applications"). Customer assumes the sole risk and
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* liability of any use of Xilinx products in Critical
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* Applications, subject only to applicable laws and
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* regulations governing limitations on product liability.
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*
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* THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS
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* PART OF THIS FILE AT ALL TIMES.
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*
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******************************************************************************/
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/*****************************************************************************/
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/**
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*
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* @file system.c
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*
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* This is top level resource file that will initialize all system level
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* peripherals
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*
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* <pre>
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* MODIFICATION HISTORY:
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*
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* Ver Who Date Changes
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* ----- ---- -------- -------------------------------------------------------
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* 0.01 rc 07/07/14 First release
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* </pre>
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*
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******************************************************************************/
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#include "xparameters.h"
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#include "system.h"
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/************************** Constant Definitions *****************************/
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#define USR_FRAME_BUF_BASEADDR (XPAR_MEMORY_SS_MIG_7SERIES_0_BASEADDR+(0x20000000))
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/**************************** Type Definitions *******************************/
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/**************************** Local Global *******************************/
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/***************** Macros (Inline Functions) Definitions *********************/
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/************************** Function Prototypes ******************************/
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/************************** Function Definition ******************************/
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/*****************************************************************************/
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/**
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*
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* This function is the system level initialization routine. It in turn calls
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* each of the included subsystem initialization function
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*
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* @param pPeriph is a pointer to the peripherals instance
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* @param pVprocss is a pointer to the video proc subsystem instance
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*
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* @return
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* - XST_SUCCESS if init. was successful.
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* - XST_FAILURE if init. was unsuccessful.
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*
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* @note None.
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*
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******************************************************************************/
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int XSys_Init(XPeriph *pPeriph, XVprocSs *pVprocss)
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{
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int status;
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XVprocSs_Config *VprocSsConfigPtr;
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Xil_AssertNonvoid(pPeriph != NULL);
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Xil_AssertNonvoid(pVprocss != NULL);
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//Init all instance variables to 0
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memset(pPeriph, 0, sizeof(XPeriph));
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memset(pVprocss, 0, sizeof(XVprocSs));
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xil_printf("\r\n ->Initialize System Peripherals.... \r\n");
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status = XPeriph_PowerOnInit(pPeriph);
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if(status != XST_SUCCESS)
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{
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xil_printf("ERR:: System Peripheral Init. error\n\r");
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return(XST_FAILURE);
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}
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xil_printf("\r\n ->Initialize Video Processing Subsystem...\r\n");
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VprocSsConfigPtr = XVprocSs_LookupConfig(XPAR_V_PROC_SS_0_DEVICE_ID);
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if(VprocSsConfigPtr == NULL)
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{
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xil_printf("ERR:: VprocSs device not found\r\n");
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return (XST_DEVICE_NOT_FOUND);
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}
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if(VprocSsConfigPtr->Topology == XVPROCSS_TOPOLOGY_FULL_FLEDGED)
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{
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XVprocSs_SetFrameBufBaseaddr(pVprocss, USR_FRAME_BUF_BASEADDR);
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}
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status = XVprocSs_CfgInitialize(pVprocss,
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VprocSsConfigPtr,
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VprocSsConfigPtr->BaseAddress);
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if(status != XST_SUCCESS)
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{
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xil_printf("ERR:: Video Processing Subsystem Init. error\n\r");
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return(XST_FAILURE);
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}
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return(status);
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}
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/*****************************************************************************/
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/**
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*
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* This function is to set vpss stream parameters
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*
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* @param pVprocss is a pointer to the video proc subsystem instance
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* @param Direction defined if parameters are to be applied to Input or
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* output stream
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* @param Width is stream width
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* @param Height is stream height
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* @param cfmt is stream color format
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*
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* @return None
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*
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* @note None.
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*
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******************************************************************************/
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void XSys_SetStreamParam(XVprocSs *pVprocss,
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u16 Direction,
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u16 Width,
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u16 Height,
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XVidC_ColorFormat cfmt,
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u16 IsInterlaced)
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{
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XVidC_VideoMode resId;
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XVidC_VideoStream Stream;
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resId = XVidC_GetVideoModeId(Width, Height, XVIDC_FR_60HZ, FALSE);
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//Setup Video Processing Subsystem
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Stream.VmId = resId;
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Stream.Timing.HActive = Width;
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Stream.Timing.VActive = Height;
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Stream.ColorFormatId = cfmt;
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Stream.ColorDepth = pVprocss->Config.ColorDepth;
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Stream.PixPerClk = pVprocss->Config.PixPerClock;
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Stream.FrameRate = XVIDC_FR_60HZ;
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Stream.IsInterlaced = IsInterlaced;
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if(Direction == XSYS_VPSS_STREAM_IN)
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{
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XVprocSs_SetVidStreamIn(pVprocss, &Stream);
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}
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else
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{
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XVprocSs_SetVidStreamOut(pVprocss, &Stream);
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}
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}
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/*****************************************************************************/
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/**
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*
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* This function reports all the IP's included in the system design.
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* It calls each subsystem API to report its child nodes
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*
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* @param pPeriph is a pointer to the peripherals instance
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* @param pVprocss is a pointer to the video proc subsystem instance
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*
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* @return None
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*
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* @note None.
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*
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******************************************************************************/
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void XSys_ReportSystemInfo(XPeriph *pPeriph, XVprocSs *pVprocss)
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{
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Xil_AssertVoid(pPeriph != NULL);
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Xil_AssertVoid(pVprocss != NULL);
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xil_printf("\r\n\r\r****Reporting System Design Info****\r\n");
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//Report Peripherals found at System level
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XPeriph_ReportDeviceInfo(pPeriph);
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//Report cores in Video Processing subsystem
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XVprocSs_ReportSubsystemCoreInfo(pVprocss);
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}
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