c9796ae1ff
HLS generated Layer 1 driver for csc core along with manually written layer 2. Pending update of driver tcl Signed-off-by: Rohit Consul <rohit.consul@xilinx.com>
23 lines
767 B
Tcl
23 lines
767 B
Tcl
# ==============================================================
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# File generated by Vivado(TM) HLS - High-Level Synthesis from C, C++ and SystemC
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# Version: 2015.1
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# Copyright (C) 2015 Xilinx Inc. All rights reserved.
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#
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# ==============================================================
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proc generate {drv_handle} {
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xdefine_include_file $drv_handle "xparameters.h" "XV_csc" \
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"NUM_INSTANCES" \
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"DEVICE_ID" \
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"C_S_AXI_CTRL_BASEADDR" \
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"C_S_AXI_CTRL_HIGHADDR"
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xdefine_config_file $drv_handle "xv_csc_g.c" "XV_csc" \
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"DEVICE_ID" \
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"C_S_AXI_CTRL_BASEADDR"
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xdefine_canonical_xpars $drv_handle "xparameters.h" "XV_csc" \
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"DEVICE_ID" \
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"C_S_AXI_CTRL_BASEADDR" \
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"C_S_AXI_CTRL_HIGHADDR"
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}
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