c9796ae1ff
HLS generated Layer 1 driver for csc core along with manually written layer 2. Pending update of driver tcl Signed-off-by: Rohit Consul <rohit.consul@xilinx.com>
34 lines
733 B
Makefile
34 lines
733 B
Makefile
# ==============================================================
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# File generated by Vivado(TM) HLS - High-Level Synthesis from C, C++ and SystemC
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# Version: 2015.1
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# Copyright (C) 2015 Xilinx Inc. All rights reserved.
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#
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# ==============================================================
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COMPILER=
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ARCHIVER=
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CP=cp
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COMPILER_FLAGS=
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EXTRA_COMPILER_FLAGS=
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LIB=libxil.a
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RELEASEDIR=../../../lib
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INCLUDEDIR=../../../include
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INCLUDES=-I./. -I${INCLUDEDIR}
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INCLUDEFILES=*.h
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LIBSOURCES=*.c
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OUTS = *.o
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libs:
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echo "Compiling v_csc"
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$(COMPILER) $(COMPILER_FLAGS) $(EXTRA_COMPILER_FLAGS) $(INCLUDES) $(LIBSOURCES)
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$(ARCHIVER) -r ${RELEASEDIR}/${LIB} $(OUTS)
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make clean
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include:
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${CP} $(INCLUDEFILES) $(INCLUDEDIR)
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clean:
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rm -rf ${OUTS}
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