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  • d5148f2e01 Moved "share" and "wreduce" to passes/opt/ Clifford Wolf 2014-09-01 11:45:26 +02:00
  • e07698818d Using std::vector<RTLIL::State> instead of RTLIL::Const for RTLIL::SigChunk::data Clifford Wolf 2014-09-01 11:36:02 +02:00
  • e3664066d5 Added eval testing to test_cell Clifford Wolf 2014-08-31 18:08:42 +02:00
  • 83ec3fa204 Fixed return size of const_*() eval functions Clifford Wolf 2014-08-31 18:08:26 +02:00
  • be44157c0f Added RTLIL::Const::size() Clifford Wolf 2014-08-31 18:07:48 +02:00
  • a1c7d4a8e2 Added eval model for $lut cells Clifford Wolf 2014-08-31 17:42:38 +02:00
  • 0b6769af3f Typo fixes in cell->*Param() API Clifford Wolf 2014-08-31 17:07:07 +02:00
  • 8649b57b6f Added $lut support in test_cell, techmap, satgen Clifford Wolf 2014-08-31 17:06:36 +02:00
  • 2a1b08aeb3 Added design->scratchpad Clifford Wolf 2014-08-30 19:37:12 +02:00
  • 4724d94fbc Added $alu cell type Clifford Wolf 2014-08-30 18:59:05 +02:00
  • 88db09255b Added autotest -e (do not use -noexpr on write_verilog) Clifford Wolf 2014-08-30 18:34:07 +02:00
  • 6ff46323a3 Improved write address decoder generation memory_map Clifford Wolf 2014-08-30 18:18:15 +02:00
  • dfbd7dd15a Fixed module->addPmux() Clifford Wolf 2014-08-30 18:17:22 +02:00
  • 66763fad4e Using worker class in memory_map Clifford Wolf 2014-08-30 17:39:08 +02:00
  • eb571cba6a Replaced $__alu CO/CS outputs with full-width CO output Clifford Wolf 2014-08-30 15:12:39 +02:00
  • 3a7d5d188d Don't change existing binary FSM encoding if it is already optimal Clifford Wolf 2014-08-30 14:43:06 +02:00
  • f910481f35 Using $pmux info in fsm_extract to optimize transition ctrl_in patterns Clifford Wolf 2014-08-30 14:34:49 +02:00
  • ab019b0bd5 Improved handling of $pmux cells in fsm_extract Clifford Wolf 2014-08-30 14:11:57 +02:00
  • d148b0af0d Fixed inserting of Q-inverters in dfflibmap Clifford Wolf 2014-08-27 19:44:12 +02:00
  • cfb4338319 Fixed printing of multi-line Makefile.conf Clifford Wolf 2014-08-27 12:13:53 +02:00
  • 084685f480 Implemented "rename -enumerate -pattern" Clifford Wolf 2014-08-26 12:51:08 +02:00
  • e70480655e Print Makefile.conf as make info message Clifford Wolf 2014-08-26 10:11:46 +02:00
  • 672b2c6db1 Checking for valid CONFIG value in Makefile Clifford Wolf 2014-08-25 12:48:20 +02:00
  • 7bbbe3580d Optimize shift ops with constant rhs in opt_const Clifford Wolf 2014-08-24 17:08:07 +02:00
  • 641501203c Added some additional log messages to opt_const Clifford Wolf 2014-08-24 15:14:45 +02:00
  • eda603105e Added is_signed argument to SigSpec.as_int() and Const.as_int() Clifford Wolf 2014-08-24 15:14:00 +02:00
  • 9c5a63c52c azonenberg: Make dump_vcd save model when temporal induction fails due to step limit Clifford Wolf 2014-08-24 13:27:40 +02:00
  • c642dd0b3e Only call proc_share_dirname() in techmap when necessary Clifford Wolf 2014-08-23 15:32:00 +02:00
  • 58367cd87a Removed compatbility.{h,cc}: Not using open_memstream/fmemopen anymore Clifford Wolf 2014-08-23 15:14:58 +02:00
  • 19cff41eb4 Changed frontend-api from FILE to std::istream Clifford Wolf 2014-08-23 15:03:55 +02:00
  • 5dce303a2a Changed backend-api from FILE to std::ostream Clifford Wolf 2014-08-23 13:54:21 +02:00
  • fff12c719f Added "stat -width" Clifford Wolf 2014-08-22 17:20:28 +02:00
  • 98442e019d Added emscripten (emcc) support to build system and some build fixes Clifford Wolf 2014-08-22 16:09:13 +02:00
  • ba83a7bdc6 Added DPI-C documentation to README file Clifford Wolf 2014-08-22 14:37:14 +02:00
  • e218f0eacf Added support for non-standard <plugin>:<c_name> DPI syntax Clifford Wolf 2014-08-22 14:30:29 +02:00
  • 74af3a2b70 Archibald Rust and Clifford Wolf: ffi-based dpi_call() Clifford Wolf 2014-08-22 14:22:09 +02:00
  • a3494fa9ed Added "plugin" command Clifford Wolf 2014-08-22 13:58:36 +02:00
  • 752650a062 Updated ABC to 4d547a5e065b Clifford Wolf 2014-08-22 12:20:23 +02:00
  • c2df5b9175 Cosmetic changes to FSM tests Clifford Wolf 2014-08-21 17:40:49 +02:00
  • ad146c2582 Fixed small memory leak in ast simplify Clifford Wolf 2014-08-21 17:33:40 +02:00
  • 6c5cafcd8b Added support for DPI function with different names in C and Verilog Clifford Wolf 2014-08-21 17:22:04 +02:00
  • 085c8e873d Added AstNode::asInt() Clifford Wolf 2014-08-21 17:11:51 +02:00
  • 490d7a5bf2 Fixed memory leak in DPI function calls Clifford Wolf 2014-08-21 13:09:47 +02:00
  • 4f35a81ad9 Merge branch 'master' of github.com:cliffordwolf/yosys Clifford Wolf 2014-08-21 12:58:16 +02:00
  • 7bfc4ae120 Added Verilog/AST support for DPI functions (dpi_call() still unimplemented) Clifford Wolf 2014-08-21 12:43:51 +02:00
  • 38addd4c67 Added support for global tasks and functions Clifford Wolf 2014-08-21 12:42:28 +02:00
  • b37d70dfd7 Added mod->addGate() methods for new gate types Clifford Wolf 2014-08-19 13:44:56 +02:00
  • a92a68ce52 Using "via_celltype" in $mul carry-save-acc implementation Clifford Wolf 2014-08-18 14:30:20 +02:00
  • 640d9fc551 Added "via_celltype" attribute on task/func Clifford Wolf 2014-08-18 14:29:30 +02:00
  • 6f33fc3e87 Performance fix for new $__lcu techmap rule Clifford Wolf 2014-08-18 00:27:54 +02:00
  • 4b3834e0cc Replaced recursive lcu scheme with bk adder Clifford Wolf 2014-08-18 00:03:33 +02:00
  • acb435b6cf Added const folding of AST_CASE to AST simplifier Clifford Wolf 2014-08-18 00:02:30 +02:00
  • aa7a3ed83f Fixed proc_{self,share}_dirname error handling Clifford Wolf 2014-08-17 02:25:59 +02:00
  • aa3a6663e2 Makefile fixes Clifford Wolf 2014-08-17 02:24:53 +02:00
  • 64713647a9 Improved AST ProcessGenerator performance Clifford Wolf 2014-08-17 02:17:49 +02:00
  • f3326a6421 Improved sig.remove2() performance Clifford Wolf 2014-08-17 02:16:56 +02:00
  • d491fd8c19 Use stackmap<> in AST ProcessGenerator Clifford Wolf 2014-08-17 00:57:24 +02:00
  • 9bacc0b54c Added stackmap<> container Clifford Wolf 2014-08-17 00:56:47 +02:00
  • 410d043dd8 Renamed toposort.h to utils.h Clifford Wolf 2014-08-17 00:55:35 +02:00
  • 7f734ecc09 Added module->uniquify() Clifford Wolf 2014-08-16 23:50:36 +02:00
  • f82c978e08 Fixed AOI/OAI expr handling in verilog backend Clifford Wolf 2014-08-16 22:05:09 +02:00
  • 976bda7102 Multiply using a carry-save accumulator Clifford Wolf 2014-08-16 21:07:29 +02:00
  • 3b9157f9a6 Added "test_cell -s <seed>" Clifford Wolf 2014-08-16 19:44:31 +02:00
  • 83e2698e10 AST ProcessGenerator: replaced subst_*_{from,to} with subst_*_map Clifford Wolf 2014-08-16 19:31:59 +02:00
  • 47c2637a96 Added additional gate types: $_NAND_ $_NOR_ $_XNOR_ $_AOI3_ $_OAI3_ $_AOI4_ $_OAI4_ Clifford Wolf 2014-08-16 18:18:30 +02:00
  • 56a30cf42c Added CellTypes::cell_evaluable() Clifford Wolf 2014-08-16 16:12:14 +02:00
  • 1ddf150c35 Changes in techmap $__alu interface Clifford Wolf 2014-08-16 16:01:58 +02:00
  • eb17fbade5 Added "opt -fast" Clifford Wolf 2014-08-16 15:34:15 +02:00
  • dbdf89c705 Added log_spacer() Clifford Wolf 2014-08-16 15:34:00 +02:00
  • 674f421b47 Bugfix in iopadmap Clifford Wolf 2014-08-15 14:29:42 +02:00
  • b64b38eea2 Renamed $lut ports to follow A-Y naming scheme Clifford Wolf 2014-08-15 14:18:40 +02:00
  • f092b50148 Renamed $_INV_ cell type to $_NOT_ Clifford Wolf 2014-08-15 14:11:40 +02:00
  • bf486002d9 Removed old doc references to $safe_pmux Clifford Wolf 2014-08-15 14:04:35 +02:00
  • ca87116449 More idstring sort_by_* helpers and fixed tpl ordering in techmap Clifford Wolf 2014-08-15 02:40:46 +02:00
  • 8ff71b5ae5 Added Frontend "+/" filename syntax for files from proc_share_dir Clifford Wolf 2014-08-15 02:08:02 +02:00
  • d320e75087 document "techmap -map %<design-name>" Clifford Wolf 2014-08-15 02:00:53 +02:00
  • c7afbd9d8e Fixed bug in "read_verilog -ignore_redef" Clifford Wolf 2014-08-15 01:53:22 +02:00
  • 978a933b6a Added RTLIL::SigSpec::to_sigbit_map() Clifford Wolf 2014-08-14 23:14:47 +02:00
  • c83b990458 Changed the AST genWidthRTLIL subst interface to use a std::map Clifford Wolf 2014-08-14 23:02:07 +02:00
  • 2f44d8ccf8 Added sig.{replace,remove,extract} variants for std::{map,set} pattern Clifford Wolf 2014-08-14 22:32:18 +02:00
  • 6d56172c0d Fixed line numbers when using here-doc macros Clifford Wolf 2014-08-14 22:26:30 +02:00
  • 85e3cc12ac Fixed handling of task outputs Clifford Wolf 2014-08-14 22:26:10 +02:00
  • 5602cbde9f Simplified $__arraymul techmap rule Clifford Wolf 2014-08-14 20:53:21 +02:00
  • 1bf7a18fec Added module->ports Clifford Wolf 2014-08-14 16:13:42 +02:00
  • 746aac540b Refactoring of CellType class Clifford Wolf 2014-08-14 15:46:51 +02:00
  • 13f2f36884 RIP $safe_pmux Clifford Wolf 2014-08-14 11:39:46 +02:00
  • 28cf48e31f Some improvements in FSM mapping and recoding Clifford Wolf 2014-08-14 11:22:45 +02:00
  • 996c06f64d Added "abc -D" for setting delay target Clifford Wolf 2014-08-14 11:05:25 +02:00
  • a878095b46 Updated ABC to 4935c2b946de Clifford Wolf 2014-08-14 10:19:12 +02:00
  • 7e758d5fbb Added techmap support for actual lookahead carry unit Clifford Wolf 2014-08-13 18:40:57 +02:00
  • 9a065509ac Preparations for lookahead ALU support in techmap.v Clifford Wolf 2014-08-13 16:36:30 +02:00
  • 28bc7aeb93 Filter ANSI escape sequences from ABC output Clifford Wolf 2014-08-13 13:40:29 +02:00
  • c27120fcbc New interface for $__alu in techmap.v Clifford Wolf 2014-08-13 13:04:28 +02:00
  • f53984795d Added support for non-standard """ macro bodies Clifford Wolf 2014-08-13 13:03:38 +02:00
  • 9d353fc543 Fixed handling of constant-true branches in proc_clean Clifford Wolf 2014-08-12 17:35:22 +02:00
  • 1dd8252169 Added test_verific mode to tests/fsm/generate.py Clifford Wolf 2014-08-12 15:43:30 +02:00
  • e5ac8fdf2b Fixed SigBit(RTLIL::Wire *wire) constructor Clifford Wolf 2014-08-12 15:39:48 +02:00
  • 593264e9ed Fixed building verific bindings Clifford Wolf 2014-08-12 15:21:06 +02:00
  • cad98bcd89 Added multi-dim memory test (requires iverilog git head) Clifford Wolf 2014-08-12 10:37:47 +02:00
  • 5215723c64 Another build fix by americanrouter (via reddit) Clifford Wolf 2014-08-11 15:55:41 +02:00