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https://git.rwth-aachen.de/acs/public/villas/node/
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intc: fix name of register space
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commit
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3 changed files with 86 additions and 2 deletions
84
fpga/include/villas/fpga/ips/gpio.hpp
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84
fpga/include/villas/fpga/ips/gpio.hpp
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/** AXI General Purpose IO (GPIO)
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*
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* @file
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* @author Steffen Vogel <stvogel@eonerc.rwth-aachen.de>
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* @author Daniel Krebs <github@daniel-krebs.net>
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* @copyright 2017-2020, Steffen Vogel
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* @license GNU General Public License (version 3)
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*
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* VILLASfpga
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*********************************************************************************/
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/** @addtogroup fpga VILLASfpga
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* @{
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*/
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#pragma once
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#include <xilinx/xintc.h>
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#include <villas/fpga/ip.hpp>
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namespace villas {
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namespace fpga {
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namespace ip {
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class GeneralPurposeIO : public IpCore
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{
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public:
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bool init();
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private:
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static constexpr char registerMemory[] = "Reg";
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std::list<MemoryBlockName> getMemoryBlocks() const
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{ return { registerMemory }; }
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};
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class GeneralPurposeIOFactory : public IpCoreFactory {
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public:
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GeneralPurposeIOFactory() :
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IpCoreFactory(getName(), getDescription())
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{}
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static constexpr const char*
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getCompatibleVlnvString()
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{ return "xilinx.com:ip:axi_gpio:"; }
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IpCore* create()
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{ return new GeneralPurposeIO; }
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std::string
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getName() const
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{ return "GeneralPurposeIO"; }
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std::string
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getDescription() const
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{ return "Xilinx's AXI4 general purpose IO"; }
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Vlnv getCompatibleVlnv() const
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{ return Vlnv(getCompatibleVlnvString()); }
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};
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} /* namespace ip */
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} /* namespace fpga */
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} /* namespace villas */
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/** @} */
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@ -61,7 +61,7 @@ public:
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private:
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static constexpr char registerMemory[] = "Reg";
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static constexpr char registerMemory[] = "reg0";
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std::list<MemoryBlockName> getMemoryBlocks() const
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{ return { registerMemory }; }
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@ -80,7 +80,7 @@ InterruptController::init()
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XIntc_Out32(base + XIN_IVAR_OFFSET + i * 4, i);
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}
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XIntc_Out32(base + XIN_IMR_OFFSET, 0); /* Use manual acknowlegement for all IRQs */
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XIntc_Out32(base + XIN_IMR_OFFSET, 0x00000000); /* Use manual acknowlegement for all IRQs */
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XIntc_Out32(base + XIN_IAR_OFFSET, 0xFFFFFFFF); /* Acknowlege all pending IRQs manually */
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XIntc_Out32(base + XIN_IMR_OFFSET, 0xFFFFFFFF); /* Use fast acknowlegement for all IRQs */
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XIntc_Out32(base + XIN_IER_OFFSET, 0x00000000); /* Disable all IRQs by default */
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