165 commits

Author	SHA1	Message	Date
daniel-k	3cf50db98d	logging: use new spdlog library in favor of Logger	2018-01-10 15:49:53 +01:00
daniel-k	71a54eeab6	lib/ips: implement fifo driver and adapt test	2018-01-10 11:02:08 +01:00
daniel-k	e2e78cf8b3	lib: minor cleanup	2018-01-10 11:02:08 +01:00
daniel-k	25d5552197	ips/intc: remove early return in start()	2018-01-10 11:02:08 +01:00
daniel-k	79f37ce352	ips/switch: add C++ implementation of switch	2018-01-10 11:02:08 +01:00
daniel-k	a5b5e317d4	wip implementing dependency parsing and proper memeory handling ... works and compiles so for. next is to implement different IP interfaces (Model, Interface, DataMover, Infrastructure, ...)	2018-01-10 11:02:08 +01:00
daniel-k	61ca7aa44f	fpga/ip: add C++ timer implementation	2018-01-10 11:02:08 +01:00
daniel-k	e590d1a350	add namespace villas::fpga and villas::fpga::ip and some renaming	2018-01-10 11:02:08 +01:00
daniel-k	2bf8bf93bd	ips/intc: remove configureJson() method because not needed	2018-01-10 11:02:08 +01:00
daniel-k	151abd2fd5	re-add old interrupt controller to make project compile again	2018-01-10 11:02:08 +01:00
daniel-k	e735c7e248	make linking of the lib work by using old C-symbols until replaced	2018-01-10 11:02:08 +01:00
daniel-k	5d4040aded	first port to C++ of plugin and fpga ip infrastructure	2018-01-10 11:02:08 +01:00
daniel-k	4adb889527	make ips/intc C++	2018-01-10 11:02:08 +01:00
daniel-k	1cde762fc0	ips/gpio: add skeleton for GPIO IP	2017-11-22 19:40:22 +01:00
Steffen Vogel	c3164e93ef	imported source code from VILLASfpga repo and made it compile	2017-11-21 21:31:08 +01:00