Daniel Krebs 89b5169a6e ips/pcie: parse AXI/PCI BARs and create mappings to/from PCIe address space ... This is used for translations that don't use VFIO which used to bridge the PCIe address space by creating direct mappings from process VA to the FPGA. When we want to communicate directly via PCIe without the involvment of the CPU/VFIO, we need the proper translations that are configured in the FPGA hardware.		2018-05-15 18:04:24 +02:00
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bram.cpp	ips/bram: add block RAM IP and use it with DMA test	2018-04-13 15:35:41 +02:00
dft.c	imported source code from VILLASfpga repo and made it compile	2017-11-21 21:31:08 +01:00
dma.cpp	ips/dma: rename pingpong to memcpy and always connect loopback	2018-05-15 18:04:24 +02:00
fifo.cpp	lib/ip: make logger a class member of IpCore	2018-02-14 16:04:33 +01:00
gpio.c	ips/gpio: add skeleton for GPIO IP	2017-11-22 19:40:22 +01:00
intc.cpp	kernel/vfio: port to C++	2018-03-26 16:16:42 +02:00
model.c	imported source code from VILLASfpga repo and made it compile	2017-11-21 21:31:08 +01:00
pcie.cpp	ips/pcie: parse AXI/PCI BARs and create mappings to/from PCIe address space	2018-05-15 18:04:24 +02:00
rtds_axis.c	imported source code from VILLASfpga repo and made it compile	2017-11-21 21:31:08 +01:00
switch.cpp	lib/ip: make logger a class member of IpCore	2018-02-14 16:04:33 +01:00
timer.cpp	lib/ip: make logger a class member of IpCore	2018-02-14 16:04:33 +01:00