drivers: ttc: added support for Zynq Ultrascale MP

This patch deprecates older version 2_0 and adds new major version 3_0 for
Zynq Ultrascale MP support

Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
This commit is contained in:
Kinjal Pravinbhai Patel 2014-12-09 18:02:30 +05:30 committed by Suneel Garapati
parent f91b0e890d
commit 055fab1b3a
14 changed files with 3453 additions and 0 deletions

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###############################################################################
#
# Copyright (C) 2011 - 2014 Xilinx, Inc. All rights reserved.
#
# Permission is hereby granted, free of charge, to any person obtaining a copy
# of this software and associated documentation files (the "Software"), to deal
# in the Software without restriction, including without limitation the rights
# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
# copies of the Software, and to permit persons to whom the Software is
# furnished to do so, subject to the following conditions:
#
# The above copyright notice and this permission notice shall be included in
# all copies or substantial portions of the Software.
#
# Use of the Software is limited solely to applications:
# (a) running on a Xilinx device, or
# (b) that interact with a Xilinx device through a bus or interconnect.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
# XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
# WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
# OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
# SOFTWARE.
#
# Except as contained in this notice, the name of the Xilinx shall not be used
# in advertising or otherwise to promote the sale, use or other dealings in
# this Software without prior written authorization from Xilinx.
#
###############################################################################
OPTION psf_version = 2.1;
BEGIN driver ttcps
OPTION supported_peripherals = (ps7_ttc, ps8_ttc, pss_ttc);
OPTION driver_state = ACTIVE;
OPTION copyfiles = all;
OPTION VERSION = 3.0;
OPTION NAME = ttcps;
END driver

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###############################################################################
#
# Copyright (C) 2012 - 2014 Xilinx, Inc. All rights reserved.
#
# Permission is hereby granted, free of charge, to any person obtaining a copy
# of this software and associated documentation files (the "Software"), to deal
# in the Software without restriction, including without limitation the rights
# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
# copies of the Software, and to permit persons to whom the Software is
# furnished to do so, subject to the following conditions:
#
# The above copyright notice and this permission notice shall be included in
# all copies or substantial portions of the Software.
#
# Use of the Software is limited solely to applications:
# (a) running on a Xilinx device, or
# (b) that interact with a Xilinx device through a bus or interconnect.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
# XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
# WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
# OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
# SOFTWARE.
#
# Except as contained in this notice, the name of the Xilinx shall not be used
# in advertising or otherwise to promote the sale, use or other dealings in
# this Software without prior written authorization from Xilinx.
#
###############################################################################
#
# Modification History
#
# Ver Who Date Changes
# ----- ---- -------- -----------------------------------------------
# 1.00a sdm 01/20/12 Initialize release
# 2.0 adk 12/10/13 Updated as per the New Tcl API's
#
##############################################################################
#uses "xillib.tcl"
proc generate {drv_handle} {
xdefine_include_file $drv_handle "xparameters.h" "XTtcPs" "NUM_INSTANCES" "DEVICE_ID" "C_S_AXI_BASEADDR" "C_TTC_CLK_FREQ_HZ" "C_TTC_CLK_CLKSRC"
xdefine_config_file $drv_handle "xttcps_g.c" "XTtcPs" "DEVICE_ID" "C_S_AXI_BASEADDR" "C_TTC_CLK_FREQ_HZ"
xdefine_canonical_xpars $drv_handle "xparameters.h" "XTtcPs" "DEVICE_ID" "C_S_AXI_BASEADDR" "C_TTC_CLK_FREQ_HZ" "C_TTC_CLK_CLKSRC"
}
proc xdefine_include_file {drv_handle file_name drv_string args} {
# Open include file
set file_handle [::hsm::utils::open_include_file $file_name]
# Get all peripherals connected to this driver
set periphs [::hsm::utils::get_common_driver_ips $drv_handle]
# Handle special cases
set arg "NUM_INSTANCES"
set posn [lsearch -exact $args $arg]
if {$posn > -1} {
puts $file_handle "/* Definitions for driver [string toupper [get_property NAME $drv_handle]] */"
# Define NUM_INSTANCES
puts $file_handle "#define [::hsm::utils::get_driver_param_name $drv_string $arg] [expr [llength $periphs] * 3]"
set args [lreplace $args $posn $posn]
}
# Check if it is a driver parameter
lappend newargs
foreach arg $args {
set value [get_property CONFIG.$arg $drv_handle]
if {[llength $value] == 0} {
lappend newargs $arg
} else {
puts $file_handle "#define [::hsm::utils::get_driver_param_name $drv_string $arg] [get_property CONFIG.$arg $drv_handle]"
}
}
set args $newargs
# Print all parameters for all peripherals
set device_id 0
foreach periph $periphs {
puts $file_handle ""
puts $file_handle "/* Definitions for peripheral [string toupper [get_property NAME $periph]] */"
for {set x 0} {$x<3} {incr x} {
foreach arg $args {
if {[string compare -nocase "DEVICE_ID" $arg] == 0} {
set value [expr $device_id * 3 + $x]
} elseif {[string compare -nocase "C_TTC_CLK_CLKSRC" $arg] == 0} {
set value [::hsm::utils::get_param_value $periph [format "C_TTC_CLK%d_CLKSRC" $x]]
} elseif {[string compare -nocase "C_TTC_CLK_FREQ_HZ" $arg] == 0} {
set value [::hsm::utils::get_param_value $periph [format "C_TTC_CLK%d_FREQ_HZ" $x]]
} else {
set value [::hsm::utils::get_param_value $periph $arg]
}
if {[llength $value] == 0} {
set value 0
}
set value [::hsm::utils::format_addr_string $value $arg]
if {[string match C_* $arg]} {
set arg_name [string range $arg 2 end]
} else {
set arg_name $arg
}
set arg_name [format "XPAR_%s_%d_%s" [string toupper [string range [get_property NAME $periph] 0 end-2]] [expr $device_id * 3 + $x] $arg_name]
regsub "S_AXI_" $arg_name "" arg_name
if {[string compare -nocase "C_S_AXI_BASEADDR" $arg] == 0} {
puts $file_handle "#define $arg_name [string toupper [format 0x%08x [expr $value + $x * 4]]]"
} else {
puts $file_handle "#define $arg_name $value"
}
}
}
incr device_id
puts $file_handle ""
}
puts $file_handle "\n/******************************************************************/\n"
close $file_handle
}
#
# Create configuration C file as required by Xilinx drivers
#
proc xdefine_config_file {drv_handle file_name drv_string args} {
set filename [file join "src" $file_name]
file delete $filename
set config_file [open $filename w]
::hsm::utils::write_c_header $config_file "Driver configuration"
puts $config_file "#include \"xparameters.h\""
puts $config_file "#include \"[string tolower $drv_string].h\""
puts $config_file "\n/*"
puts $config_file "* The configuration table for devices"
puts $config_file "*/\n"
puts $config_file [format "%s_Config %s_ConfigTable\[\] =" $drv_string $drv_string]
puts $config_file "\{"
set periphs [::hsm::utils::get_common_driver_ips $drv_handle]
set start_comma ""
set device_id 0
foreach periph $periphs {
for {set x 0} {$x<3} {incr x} {
puts $config_file [format "%s\t\{" $start_comma]
set comma ""
foreach arg $args {
# Check if this is a driver parameter or a peripheral parameter
set value [get_property CONFIG.$arg $drv_handle]
if {[llength $value] == 0} {
set local_value [get_property CONFIG.$arg $periph]
# If a parameter isn't found locally (in the current
# peripheral), we will (for some obscure and ancient reason)
# look in peripherals connected via point to point links
if { [string compare -nocase $local_value ""] == 0} {
set p2p_name [::hsm::utils::get_p2p_name $periph $arg]
if { [string compare -nocase $p2p_name ""] == 0} {
if {[string match C_* $arg]} {
set arg_name [string range $arg 2 end]
} else {
set arg_name $arg
}
set arg_name [format "XPAR_%s_%d_%s" [string toupper [string range [get_property NAME $periph] 0 end-2]] [expr $device_id * 3 + $x] $arg_name]
regsub "S_AXI_" $arg_name "" arg_name
puts -nonewline $config_file [format "%s\t\t%s" $comma $arg_name]
} else {
regsub "S_AXI_" $p2p_name "" p2p_name
puts -nonewline $config_file [format "%s\t\t%s" $comma $p2p_name]
}
} else {
if {[string match C_* $arg]} {
set arg_name [string range $arg 2 end]
} else {
set arg_name $arg
}
set arg_name [format "XPAR_%s_%d_%s" [string toupper [string range [get_property NAME $periph] 0 end-2]] [expr $device_id * 3 + $x] $arg_name]
regsub "S_AXI_" $arg_name "" arg_name
puts -nonewline $config_file [format "%s\t\t%s" $comma $arg_name]
}
} else {
set arg_name [::hsm::utils::get_driver_param_name $drv_string $arg]
regsub "S_AXI_" $arg_name "" arg_name
puts -nonewline $config_file [format "%s\t\t%s" $comma $arg_name]
}
set comma ",\n"
}
puts -nonewline $config_file "\n\t\}"
set start_comma ",\n"
}
incr device_id
}
puts $config_file "\n\};"
puts $config_file "\n";
close $config_file
}
#-----------------------------------------------------------------------------
# xdefine_canonical_xpars - Used to print out canonical defines for a driver.
# Given a list of arguments, define each as a canonical constant name, using
# the driver name, in an include file.
#-----------------------------------------------------------------------------
proc xdefine_canonical_xpars {drv_handle file_name drv_string args} {
# Open include file
set file_handle [::hsm::utils::open_include_file $file_name]
# Get all the peripherals connected to this driver
set periphs [::hsm::utils::get_common_driver_ips $drv_handle]
# Get the names of all the peripherals connected to this driver
foreach periph $periphs {
set peripheral_name [string toupper [get_property NAME $periph]]
lappend peripherals $peripheral_name
}
# Get possible canonical names for all the peripherals connected to this
# driver
set device_id 0
foreach periph $periphs {
set canonical_name [string toupper [format "%s_%s" $drv_string $device_id]]
lappend canonicals $canonical_name
# Create a list of IDs of the peripherals whose hardware instance name
# doesn't match the canonical name. These IDs can be used later to
# generate canonical definitions
if { [lsearch $peripherals $canonical_name] < 0 } {
lappend indices $device_id
lappend indices [expr $device_id + 1]
lappend indices [expr $device_id + 2]
}
incr device_id
}
set i 0
set device_id 0
foreach periph $periphs {
set periph_name [string toupper [get_property NAME $periph]]
# Generate canonical definitions only for the peripherals whose
# canonical name is not the same as hardware instance name
if { [lsearch $canonicals $periph_name] < 0 } {
puts $file_handle "/* Canonical definitions for peripheral $periph_name */"
for {set x 0} {$x<3} {incr x} {
set canonical_name [format "%s_%s" $drv_string [lindex $indices $i]]
foreach arg $args {
if {[string match C_* $arg]} {
set arg_name [string range $arg 2 end]
} else {
set arg_name $arg
}
set lvalue [format "XPAR_%s_%d_%s" [string toupper $drv_string] [expr $device_id * 3 + $x] $arg_name]
regsub "S_AXI_" $lvalue "" lvalue
# The commented out rvalue is the name of the instance-specific constant
# set rvalue [::hsm::utils::get_ip_param_name $periph $arg]
# The rvalue set below is the actual value of the parameter
if {[string compare -nocase "DEVICE_ID" $arg] == 0} {
set rvalue [format "XPAR_%s_%d_%s" [string toupper [string range [get_property NAME $periph] 0 end-2]] [expr $device_id * 3 + $x] $arg]
} else {
if {[string compare -nocase "C_TTC_CLK_CLKSRC" $arg] == 0} {
set rvalue [::hsm::utils::get_param_value $periph [format "C_TTC_CLK%d_CLKSRC" $x]]
} elseif {[string compare -nocase "C_TTC_CLK_FREQ_HZ" $arg] == 0} {
set rvalue [::hsm::utils::get_param_value $periph [format "C_TTC_CLK%d_FREQ_HZ" $x]]
} else {
set rvalue [::hsm::utils::get_param_value $periph $arg]
if {[string compare -nocase "C_S_AXI_BASEADDR" $arg] == 0} {
set rvalue [string toupper [format 0x%08x [expr $rvalue + $x * 4]]]
}
}
if {[llength $rvalue] == 0} {
set rvalue 0
}
set rvalue [::hsm::utils::format_addr_string $rvalue $arg]
}
puts $file_handle "#define $lvalue $rvalue"
}
puts $file_handle ""
incr i
}
}
incr device_id
}
puts $file_handle "\n/******************************************************************/\n"
close $file_handle
}

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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 3.2 Final//EN">
<html>
<head>
<meta http-equiv="Content-Language" content="en-us">
<meta http-equiv="Content-Type" content="text/html; charset=UTF-8">
<title>Driver example applications</title>
<link rel="stylesheet" type="text/css" href="../help.css">
</head>
<body bgcolor="#FFFFFF">
<h1> Example Applications for the driver ttcps_v2_0 </h1>
<HR>
<ul>
<li>xttcps_low_level_example.c <a href="xttcps_low_level_example.c">(source)</a> </li>
<li>xttcps_intr_example.c <a href="xttcps_intr_example.c">(source)</a> </li>
<li>xttcps_rtc_example.c <a href="xttcps_rtc_example.c">(source)</a> </li>
</ul>
<p><font face="Times New Roman" color="#800000">Copyright <20> 1995-2014 Xilinx, Inc. All rights reserved.</font></p>
</body>
</html>

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/******************************************************************************
*
* Copyright (C) 2010 - 2014 Xilinx, Inc. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* Use of the Software is limited solely to applications:
* (a) running on a Xilinx device, or
* (b) that interact with a Xilinx device through a bus or interconnect.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
* Except as contained in this notice, the name of the Xilinx shall not be used
* in advertising or otherwise to promote the sale, use or other dealings in
* this Software without prior written authorization from Xilinx.
*
******************************************************************************/
/*****************************************************************************/
/**
* @file xttcps_intr_example.c
*
* This file contains a example using two timer counters in the Triple Timer
* Counter (TTC) module in the Ps block in interrupt mode.
*
* The example proceeds using interleaving interrupt handling from both
* timer counters. One timer counter, Ticker, counts how many interrupts
* has occurred to it, and updates a flag for another timer counter upon
* a given threshold. Another timer counter, PWM, waits for the flag set
* from the Ticker, and increases its duty cycle. When the duty cycle of
* PWM reaches 100, the example terminates.
*
* @note
* The example may take seconds to minutes to finish. A small setting of
* PWM_DELTA_DUTY gives a long running time, while a large setting makes
* the example finishes faster.
*
* <pre>
* MODIFICATION HISTORY:
*
* Ver Who Date Changes
* ---- ------ -------- ---------------------------------------------
* 1.00 drg/jz 01/23/10 First release
*</pre>
******************************************************************************/
/***************************** Include Files *********************************/
#include <stdio.h>
#include <stdlib.h>
#include "xparameters.h"
#include "xstatus.h"
#include "xil_exception.h"
#include "xttcps.h"
#include "xscugic.h"
#include "xil_printf.h"
/************************** Constant Definitions *****************************/
/*
* The following constants map to the XPAR parameters created in the
* xparameters.h file. They are only defined here such that a user can easily
* change all the needed parameters in one place.
*/
#define TTC_TICK_DEVICE_ID XPAR_XTTCPS_1_DEVICE_ID
#define TTC_TICK_INTR_ID XPAR_XTTCPS_1_INTR
#define TTC_PWM_DEVICE_ID XPAR_XTTCPS_0_DEVICE_ID
#define TTC_PWM_INTR_ID XPAR_XTTCPS_0_INTR
#define TTCPS_CLOCK_HZ XPAR_XTTCPS_0_CLOCK_HZ
#define INTC_DEVICE_ID XPAR_SCUGIC_SINGLE_DEVICE_ID
/*
* Constants to set the basic operating parameters.
* PWM_DELTA_DUTY is critical to the running time of the test. Smaller values
* make the test run longer.
*/
#define TICK_TIMER_FREQ_HZ 100 /* Tick timer counter's output frequency */
#define PWM_OUT_FREQ 350 /* PWM timer counter's output frequency */
#define PWM_DELTA_DUTY 50 /* Initial and increment to duty cycle for PWM */
#define TICKS_PER_CHANGE_PERIOD TICK_TIMER_FREQ_HZ * 5 /* Tick signals PWM */
/**************************** Type Definitions *******************************/
typedef struct {
u32 OutputHz; /* Output frequency */
u16 Interval; /* Interval value */
u8 Prescaler; /* Prescaler value */
u16 Options; /* Option settings */
} TmrCntrSetup;
/***************** Macros (Inline Functions) Definitions *********************/
/************************** Function Prototypes ******************************/
static int TmrInterruptExample(void); /* Main test */
/* Set up routines for timer counters */
static int SetupTicker(void);
static int SetupPWM(void);
static int SetupTimer(int DeviceID);
/* Interleaved interrupt test for both timer counters */
static int WaitForDutyCycleFull(void);
static int SetupInterruptSystem(u16 IntcDeviceID, XScuGic *IntcInstancePtr);
static void TickHandler(void *CallBackRef);
static void PWMHandler(void *CallBackRef);
/************************** Variable Definitions *****************************/
static XTtcPs TtcPsInst[2]; /* Two timer counters */
static TmrCntrSetup SettingsTable[2] = {
{100, 0, 0, 0}, /* Ticker timer counter initial setup, only output freq */
{200, 0, 0, 0}, /* PWM timer counter initial setup, only output freq */
};
XScuGic InterruptController; /* Interrupt controller instance */
static u32 MatchValue; /* Match value for PWM, set by PWM interrupt handler,
updated by main test routine */
static volatile u32 PWM_UpdateFlag; /* Flag used by Ticker to signal PWM */
static volatile u8 ErrorCount; /* Errors seen at interrupt time */
static volatile u32 TickCount; /* Ticker interrupts between PWM change */
/*****************************************************************************/
/**
*
* This function calls the Ttc interrupt example.
*
* @param None
*
* @return
* - XST_SUCCESS to indicate Success
* - XST_FAILURE to indicate Failure.
*
* @note None
*
*****************************************************************************/
int main(void)
{
int Status;
xil_printf("TTC Interrupt Example Test\r\n");
Status = TmrInterruptExample();
if (Status != XST_SUCCESS) {
xil_printf("TTC Interrupt Example Test Failed\r\n");
return XST_FAILURE;
}
xil_printf("Successfully ran TTC Interrupt Example Test\r\n");
return XST_SUCCESS;
}
/*****************************************************************************/
/**
*
* This function sets up the interrupt example.
*
* @param None.
*
* @return
* - XST_SUCCESS to indicate Success
* - XST_FAILURE to indicate Failure.
*
* @note None
*
****************************************************************************/
static int TmrInterruptExample(void)
{
int Status;
/*
* Make sure the interrupts are disabled, in case this is being run
* again after a failure.
*/
/*
* Connect the Intc to the interrupt subsystem such that interrupts can
* occur. This function is application specific.
*/
Status = SetupInterruptSystem(INTC_DEVICE_ID, &InterruptController);
if (Status != XST_SUCCESS) {
return XST_FAILURE;
}
/*
* Set up the Ticker timer
*/
Status = SetupTicker();
if (Status != XST_SUCCESS) {
return Status;
}
/*
* Set up the PWM timer
*/
Status = SetupPWM();
if (Status != XST_SUCCESS) {
return Status;
}
/*
* Enable interrupts
*/
Status = WaitForDutyCycleFull();
if (Status != XST_SUCCESS) {
return Status;
}
/*
* Stop the counters
*/
XTtcPs_Stop(&(TtcPsInst[TTC_TICK_DEVICE_ID]));
XTtcPs_Stop(&(TtcPsInst[TTC_PWM_DEVICE_ID]));
return XST_SUCCESS;
}
/****************************************************************************/
/**
*
* This function sets up the Ticker timer.
*
* @param None
*
* @return XST_SUCCESS if everything sets up well, XST_FAILURE otherwise.
*
* @note None
*
*****************************************************************************/
int SetupTicker(void)
{
int Status;
TmrCntrSetup *TimerSetup;
XTtcPs *TtcPsTick;
TimerSetup = &(SettingsTable[TTC_TICK_DEVICE_ID]);
/*
* Set up appropriate options for Ticker: interval mode without
* waveform output.
*/
TimerSetup->Options |= (XTTCPS_OPTION_INTERVAL_MODE |
XTTCPS_OPTION_WAVE_DISABLE);
/*
* Calling the timer setup routine
* . initialize device
* . set options
*/
Status = SetupTimer(TTC_TICK_DEVICE_ID);
if(Status != XST_SUCCESS) {
return Status;
}
TtcPsTick = &(TtcPsInst[TTC_TICK_DEVICE_ID]);
/*
* Connect to the interrupt controller
*/
Status = XScuGic_Connect(&InterruptController, TTC_TICK_INTR_ID,
(Xil_ExceptionHandler)TickHandler, (void *)TtcPsTick);
if (Status != XST_SUCCESS) {
return XST_FAILURE;
}
/*
* Enable the interrupt for the Timer counter
*/
XScuGic_Enable(&InterruptController, TTC_TICK_INTR_ID);
/*
* Enable the interrupts for the tick timer/counter
* We only care about the interval timeout.
*/
XTtcPs_EnableInterrupts(TtcPsTick, XTTCPS_IXR_INTERVAL_MASK);
/*
* Start the tick timer/counter
*/
XTtcPs_Start(TtcPsTick);
return Status;
}
/****************************************************************************/
/**
*
* This function sets up the waveform output timer counter (PWM).
*
* @param None
*
* @return XST_SUCCESS if everything sets up well, XST_FAILURE otherwise.
*
* @note None
*
*****************************************************************************/
int SetupPWM(void)
{
int Status;
TmrCntrSetup *TimerSetup;
XTtcPs *TtcPsPWM;
TimerSetup = &(SettingsTable[TTC_PWM_DEVICE_ID]);
/*
* Set up appropriate options for PWM: interval mode and
* match mode for waveform output.
*/
TimerSetup->Options |= (XTTCPS_OPTION_INTERVAL_MODE |
XTTCPS_OPTION_MATCH_MODE);
/*
* Calling the timer setup routine
* initialize device
* set options
*/
Status = SetupTimer(TTC_PWM_DEVICE_ID);
if(Status != XST_SUCCESS) {
return Status;
}
TtcPsPWM = &(TtcPsInst[TTC_PWM_DEVICE_ID]);
/*
* Connect to the interrupt controller
*/
Status = XScuGic_Connect(&InterruptController, TTC_PWM_INTR_ID,
(Xil_ExceptionHandler)PWMHandler, (void *)&MatchValue);
if (Status != XST_SUCCESS) {
return XST_FAILURE;
}
/*
* Enable the interrupt for the Timer counter
*/
XScuGic_Enable(&InterruptController, TTC_PWM_INTR_ID);
/*
* Enable the interrupts for the tick timer/counter
* We only care about the interval timeout.
*/
XTtcPs_EnableInterrupts(TtcPsPWM, XTTCPS_IXR_INTERVAL_MASK);
/*
* Start the tick timer/counter
*/
XTtcPs_Start(TtcPsPWM);
return Status;
}
/****************************************************************************/
/**
*
* This function uses the interrupt inter-locking between the ticker timer
* counter and the waveform output timer counter. When certain amount of
* interrupts have happened to the ticker timer counter, a flag, PWM_UpdateFlag,
* is set to true.
*
* When PWM_UpdateFlag for the waveform timer counter is true, the duty
* cycle for PWM timer counter is increased by PWM_DELTA_DUTY.
* The function exits successfully when the duty cycle for PWM timer
* counter reaches beyond 100.
*
* @param None
*
* @return XST_SUCCESS if duty cycle successfully reaches beyond 100,
* otherwise, XST_FAILURE.
*
* @note None.
*
*****************************************************************************/
int WaitForDutyCycleFull(void)
{
TmrCntrSetup *TimerSetup;
u8 DutyCycle; /* The current output duty cycle */
XTtcPs *TtcPs_PWM; /* Pointer to the instance structure */
TimerSetup = &(SettingsTable[TTC_PWM_DEVICE_ID]);
TtcPs_PWM = &(TtcPsInst[TTC_PWM_DEVICE_ID]);
/*
* Initialize some variables used by the interrupts and in loops.
*/
DutyCycle = PWM_DELTA_DUTY;
PWM_UpdateFlag = TRUE;
ErrorCount = 0;
/*
* Loop until 100% duty cycle in the PWM output.
*/
while (DutyCycle <= 100) {
/*
* If error occurs, disable interrupts, and exit.
*/
if (0 != ErrorCount) {
return XST_FAILURE;
}
/*
* The Ticker interrupt sets a flag for PWM to update its duty
* cycle.
*/
if (PWM_UpdateFlag) {
/* Calculate the new register setting here, not at the
* time critical interrupt level.
*/
MatchValue = (TimerSetup->Interval * DutyCycle) / 100;
/*
* Change the PWM duty cycle
*/
DutyCycle += PWM_DELTA_DUTY;
/*
* Enable the PWM Interval interrupt
*/
XTtcPs_EnableInterrupts(TtcPs_PWM,
XTTCPS_IXR_INTERVAL_MASK);
PWM_UpdateFlag = FALSE;
}
}
return XST_SUCCESS;
}
/****************************************************************************/
/**
*
* This function sets up a timer counter device, using the information in its
* setup structure.
* . initialize device
* . set options
* . set interval and prescaler value for given output frequency.
*
* @param DeviceID is the unique ID for the device.
*
* @return XST_SUCCESS if successful, otherwise XST_FAILURE.
*
* @note None.
*
*****************************************************************************/
int SetupTimer(int DeviceID)
{
int Status;
XTtcPs_Config *Config;
XTtcPs *Timer;
TmrCntrSetup *TimerSetup;
TimerSetup = &SettingsTable[DeviceID];
Timer = &(TtcPsInst[DeviceID]);
/*
* Stop the timer first
*/
XTtcPs_Stop(Timer);
/*
* Look up the configuration based on the device identifier
*/
Config = XTtcPs_LookupConfig(DeviceID);
if (NULL == Config) {
return XST_FAILURE;
}
/*
* Initialize the device
*/
Status = XTtcPs_CfgInitialize(Timer, Config, Config->BaseAddress);
if (Status != XST_SUCCESS) {
return XST_FAILURE;
}
/*
* Set the options
*/
XTtcPs_SetOptions(Timer, TimerSetup->Options);
/*
* Timer frequency is preset in the TimerSetup structure,
* however, the value is not reflected in its other fields, such as
* IntervalValue and PrescalerValue. The following call will map the
* frequency to the interval and prescaler values.
*/
XTtcPs_CalcIntervalFromFreq(Timer, TimerSetup->OutputHz,
&(TimerSetup->Interval), &(TimerSetup->Prescaler));
/*
* Set the interval and prescale
*/
XTtcPs_SetInterval(Timer, TimerSetup->Interval);
XTtcPs_SetPrescaler(Timer, TimerSetup->Prescaler);
return XST_SUCCESS;
}
/****************************************************************************/
/**
*
* This function setups the interrupt system such that interrupts can occur.
* This function is application specific since the actual system may or may not
* have an interrupt controller. The TTC could be directly connected to a
* processor without an interrupt controller. The user should modify this
* function to fit the application.
*
* @param IntcDeviceID is the unique ID of the interrupt controller
* @param IntcInstacePtr is a pointer to the interrupt controller
* instance.
*
* @return XST_SUCCESS if successful, otherwise XST_FAILURE.
*
* @note None.
*
*****************************************************************************/
static int SetupInterruptSystem(u16 IntcDeviceID,
XScuGic *IntcInstancePtr)
{
int Status;
XScuGic_Config *IntcConfig; /* The configuration parameters of the
interrupt controller */
/*
* Initialize the interrupt controller driver
*/
IntcConfig = XScuGic_LookupConfig(IntcDeviceID);
if (NULL == IntcConfig) {
return XST_FAILURE;
}
Status = XScuGic_CfgInitialize(IntcInstancePtr, IntcConfig,
IntcConfig->CpuBaseAddress);
if (Status != XST_SUCCESS) {
return XST_FAILURE;
}
/*
* Connect the interrupt controller interrupt handler to the hardware
* interrupt handling logic in the ARM processor.
*/
Xil_ExceptionRegisterHandler(XIL_EXCEPTION_ID_INT,
(Xil_ExceptionHandler) XScuGic_InterruptHandler,
IntcInstancePtr);
/*
* Enable interrupts in the ARM
*/
Xil_ExceptionEnable();
return XST_SUCCESS;
}
/***************************************************************************/
/**
*
* This function is the handler which handles the periodic tick interrupt.
* It updates its count, and set a flag to signal PWM timer counter to
* update its duty cycle.
*
* This handler provides an example of how to handle data for the TTC and
* is application specific.
*
* @param CallBackRef contains a callback reference from the driver, in
* this case it is the instance pointer for the TTC driver.
*
* @return None.
*
* @note None.
*
*****************************************************************************/
static void TickHandler(void *CallBackRef)
{
u32 StatusEvent;
/*
* Read the interrupt status, then write it back to clear the interrupt.
*/
StatusEvent = XTtcPs_GetInterruptStatus((XTtcPs *)CallBackRef);
XTtcPs_ClearInterruptStatus((XTtcPs *)CallBackRef, StatusEvent);
if (0 != (XTTCPS_IXR_INTERVAL_MASK & StatusEvent)) {
TickCount++;
if (TICKS_PER_CHANGE_PERIOD == TickCount) {
TickCount = 0;
PWM_UpdateFlag = TRUE;
}
}
else {
/*
* The Interval event should be the only one enabled. If it is
* not it is an error
*/
ErrorCount++;
}
}
/***************************************************************************/
/**
*
* This function is the handler which handles the PWM interrupt.
*
* It updates the match register to reflect the change on duty cycle. It also
* disable interrupt at the end. The interrupt will be enabled by the Ticker
* timer counter.
*
* @param CallBackRef contains a callback reference from the driver, in
* this case it is a pointer to the MatchValue variable.
*
* @return None.
*
* @note None.
*
*****************************************************************************/
static void PWMHandler(void *CallBackRef)
{
u32 *MatchReg;
u32 StatusEvent;
XTtcPs *Timer;
MatchReg = (u32 *) CallBackRef;
Timer = &(TtcPsInst[TTC_PWM_DEVICE_ID]);
/*
* Read the interrupt status, then write it back to clear the interrupt.
*/
StatusEvent = XTtcPs_GetInterruptStatus(Timer);
XTtcPs_ClearInterruptStatus(Timer, StatusEvent);
if (0 != (XTTCPS_IXR_INTERVAL_MASK & StatusEvent)) {
XTtcPs_SetMatchValue(Timer, 0, *MatchReg);
}
else {
/*
* If it is not Interval event, it is an error.
*/
ErrorCount++;
}
XTtcPs_DisableInterrupts(Timer, XTTCPS_IXR_ALL_MASK);
}

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@ -0,0 +1,324 @@
/******************************************************************************
*
* Copyright (C) 2010 - 2014 Xilinx, Inc. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* Use of the Software is limited solely to applications:
* (a) running on a Xilinx device, or
* (b) that interact with a Xilinx device through a bus or interconnect.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
* Except as contained in this notice, the name of the Xilinx shall not be used
* in advertising or otherwise to promote the sale, use or other dealings in
* this Software without prior written authorization from Xilinx.
*
******************************************************************************/
/*****************************************************************************/
/**
* @file xttcps_low_level_example.c
*
* This file contains a design example using the Triple Timer Counter hardware
* and driver in polled mode.
*
* The example generates a square wave output on the waveform out pin.
*
* @note
*
* None
*
* <pre>
* MODIFICATION HISTORY:
*
* Ver Who Date Changes
* ---- ------ -------- ---------------------------------------------
* 1.00 drg/jz 01/23/10 First release
*</pre>
******************************************************************************/
/***************************** Include Files *********************************/
#include "xparameters.h"
#include "xstatus.h"
#include "xttcps.h"
#include "xil_printf.h"
/************************** Constant Definitions *****************************/
/*
* The following constants map to the XPAR parameters created in the
* xparameters.h file. They are only defined here such that a user can easily
* change all the needed parameters in one place.
*/
#define PCLK_FREQ_HZ XPAR_XTTCPS_0_CLOCK_HZ /* Input freq */
#define TTC_NUM_DEVICES XPAR_XTTCPS_NUM_INSTANCES
#define TABLE_OFFSET 6
#define MAX_LOOP_COUNT 0xFFFF
/**************************** Type Definitions *******************************/
typedef struct {
u32 OutputHz; /* The frequency the timer should output on the
waveout pin */
u8 OutputDutyCycle; /* The duty cycle of the output wave as a
percentage */
u8 PrescalerValue; /* Value of the prescaler in the Count Control
register */
} TmrCntrSetup;
/***************** Macros (Inline Functions) Definitions *********************/
/************************** Function Prototypes ******************************/
static int TmrCtrLowLevelExample(u8 SettingsTableOffset);
/************************** Variable Definitions *****************************/
/*
* Convert from a 0-2 index to the correct timer counter number as defined in
* xttcps_hw.h
*/
static u32 TimerCounterBaseAddr[] = {
XPS_TTC0_BASEADDR,
XPS_TTC1_BASEADDR
};
/*
* A table of the actual prescaler setting based on the prescaler value from
* 0-15. The setting is 2^(prescaler value + 1). Use a table to avoid doing
* powers at run time.
* A Prescaler value of 16, means use no prescaler, or a prescaler value of 1.
*/
static u32 PrescalerSettings[] = {
2, 4, 8, 16, 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192, 16384,
32768, 65536, 1
};
static TmrCntrSetup SettingsTable[] = {
/* Table offset of 0 */
{10, 50, 6},
{10, 25, 6},
{10, 75, 6},
/* Table offset of 3 */
{100, 50, 3},
{200, 25, 2},
{400, 12.5, 1},
/* Table offset of 6 */
{500, 50, 1},
{1000, 50, 0},
{5000, 50, 16},
/* Table offset of 9 */
{10000, 50, 16},
{50000, 50, 16},
{100000, 50, 16},
/* Table offset of 12 */
{500000, 50, 16},
{1000000, 50, 16},
{5000000, 50, 16},
/* Note: at greater than 1 MHz the timer reload is noticeable. */
};
#define SETTINGS_TABLE_SIZE (sizeof(SettingsTable)/sizeof(TmrCntrSetup))
/*****************************************************************************/
/**
*
* This function is the main function of the Timer/Counter example.
*
* @param None
*
* @return XST_SUCCESS to indicate success, else XST_FAILURE to indicate
* a Failure.
*
* @note None.
*
*****************************************************************************/
int main(void)
{
int Status;
xil_printf("TTC Lowlevel Example Test \r\n");
/*
* Run the Timer Counter - Low Level example.
*/
Status = TmrCtrLowLevelExample(TABLE_OFFSET);
if (Status != XST_SUCCESS) {
xil_printf("TTC Lowlevel Example Test Failed\r\n");
return XST_FAILURE;
}
xil_printf("Successfully ran TTC Lowlevel Example Test\r\n");
return XST_SUCCESS;
}
/*****************************************************************************/
/**
* This function does a minimal test on the timer counter device and
* the low level driver as a design example. The purpose of this function is
* to illustrate how to use the XTtcPs low level driver.
*
*
* @param SettingsTableOffset is an offset into the settings table. This
* allows multiple counter setups to be kept and swapped easily.
*
* @return XST_SUCCESS to indicate success, else XST_FAILURE to indicate
* a Failure.
*
* @note
*
* This function contains a loop which waits for the value of a timer counter
* to change. If the hardware is not working correctly, this function may not
* return.
*
****************************************************************************/
int TmrCtrLowLevelExample(u8 SettingsTableOffset)
{
u32 RegValue;
u32 LoopCount;
u32 TmrCtrBaseAddress;
u32 IntervalValue, MatchValue;
TmrCntrSetup *CurrSetup;
/*
* Assert on the value of constants calculated above
* Because the counters are 16 bits, no value can be greater than 65535
*/
if ((SettingsTableOffset + 2) > SETTINGS_TABLE_SIZE) {
return XST_FAILURE;
}
for (LoopCount = 0; LoopCount < TTC_NUM_DEVICES; LoopCount++) {
/*
* Set the timer counter number to use
*/
TmrCtrBaseAddress = TimerCounterBaseAddr[LoopCount];
/* And get the setup for that counter
*/
CurrSetup = &SettingsTable[SettingsTableOffset + LoopCount];
/*
* Set the Clock Control Register
*/
if (16 > CurrSetup->PrescalerValue) {
/* Use the clock prescaler */
RegValue =
(CurrSetup->
PrescalerValue <<
XTTCPS_CLK_CNTRL_PS_VAL_SHIFT) &
XTTCPS_CLK_CNTRL_PS_VAL_MASK;
RegValue |= XTTCPS_CLK_CNTRL_PS_EN_MASK;
}
else {
/* Do not use the clock prescaler */
RegValue = 0;
}
XTtcPs_WriteReg(TmrCtrBaseAddress, XTTCPS_CLK_CNTRL_OFFSET,
RegValue);
/*
* Set the Interval register. This determines the frequency of
* the waveform. The counter will be reset to 0 each time this
* value is reached.
*/
IntervalValue = PCLK_FREQ_HZ /
(u32) (PrescalerSettings[CurrSetup->PrescalerValue] *
CurrSetup->OutputHz);
/*
* Make sure the value is not to large or too small
*/
if ((65535 < IntervalValue) || (4 > IntervalValue)) {
return XST_FAILURE;
}
XTtcPs_WriteReg(TmrCtrBaseAddress,
XTTCPS_INTERVAL_VAL_OFFSET, IntervalValue);
/*
* Set the Match register. This determines the duty cycle of the
* waveform. The waveform output will be toggle each time this
* value is reached.
*/
MatchValue = (IntervalValue * CurrSetup->OutputDutyCycle) / 100;
/*
* Make sure the value is not to large or too small
*/
if ((65535 < MatchValue) || (4 > MatchValue)) {
return XST_FAILURE;
}
XTtcPs_WriteReg(TmrCtrBaseAddress, XTTCPS_MATCH_0_OFFSET,
MatchValue);
/*
* Set the Counter Control Register
*/
RegValue =
~(XTTCPS_CNT_CNTRL_DIS_MASK |
XTTCPS_CNT_CNTRL_EN_WAVE_MASK) &
(XTTCPS_CNT_CNTRL_INT_MASK |
XTTCPS_CNT_CNTRL_MATCH_MASK |
XTTCPS_CNT_CNTRL_RST_MASK);
XTtcPs_WriteReg(TmrCtrBaseAddress, XTTCPS_CNT_CNTRL_OFFSET,
RegValue);
/*
* Write to the Interrupt enable register. The status flags are
* not active if this is not done.
*/
XTtcPs_WriteReg(TmrCtrBaseAddress, XTTCPS_IER_OFFSET,
XTTCPS_IXR_INTERVAL_MASK);
}
LoopCount = 0;
while (LoopCount < MAX_LOOP_COUNT) {
/*
* Read the status register for debugging
*/
RegValue =
XTtcPs_ReadReg(TmrCtrBaseAddress, XTTCPS_ISR_OFFSET);
/*
* Write the status register to clear the flags
*/
XTtcPs_WriteReg(TmrCtrBaseAddress, XTTCPS_ISR_OFFSET,
RegValue);
if (0 != (XTTCPS_IXR_INTERVAL_MASK & RegValue)) {
LoopCount++;
/*
* Count the number of output cycles so the program will
* eventually exit. Otherwise it would stay in this loop
* indefinitely.
*/
}
}
return XST_SUCCESS;
}

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@ -0,0 +1,490 @@
/******************************************************************************
*
* Copyright (C) 2010 - 2014 Xilinx, Inc. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* Use of the Software is limited solely to applications:
* (a) running on a Xilinx device, or
* (b) that interact with a Xilinx device through a bus or interconnect.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
* Except as contained in this notice, the name of the Xilinx shall not be used
* in advertising or otherwise to promote the sale, use or other dealings in
* this Software without prior written authorization from Xilinx.
*
******************************************************************************/
/*****************************************************************************/
/**
* @file xttcps_rtc_example.c
*
* This example uses one timer/counter to make a real time clock. The number of
* minutes and seconds is displayed on the console.
*
*
* @note
*
* <pre>
* MODIFICATION HISTORY:
*
* Ver Who Date Changes
* ---- ------ -------- ---------------------------------------------
* 1.00 drg/jz 01/23/10 First release
*</pre>
******************************************************************************/
/***************************** Include Files *********************************/
#include <stdio.h>
#include <stdlib.h>
#include "xparameters.h"
#include "xstatus.h"
#include "xil_io.h"
#include "xil_exception.h"
#include "xttcps.h"
#include "xscugic.h"
#include "xil_printf.h"
/************************** Constant Definitions *****************************/
/*
* The following constants map to the XPAR parameters created in the
* xparameters.h file. They are only defined here such that a user can easily
* change all the needed parameters in one place.
*/
#define TTC_TICK_DEVICE_ID XPAR_XTTCPS_0_DEVICE_ID
#define TTC_TICK_INTR_ID XPAR_XTTCPS_0_INTR
#define INTC_DEVICE_ID XPAR_SCUGIC_SINGLE_DEVICE_ID
/*
* Constants to set the basic operating parameters.
* PWM_DELTA_DUTY is critical to the running time of the test. Smaller values
* make the test run longer.
*/
#define TICK_TIMER_FREQ_HZ 100 /* Tick timer counter's output frequency */
#define TICKS_PER_CHANGE_PERIOD TICK_TIMER_FREQ_HZ /* Tick signals per update */
/**************************** Type Definitions *******************************/
typedef struct {
u32 OutputHz; /* Output frequency */
u16 Interval; /* Interval value */
u8 Prescaler; /* Prescaler value */
u16 Options; /* Option settings */
} TmrCntrSetup;
/***************** Macros (Inline Functions) Definitions *********************/
/************************** Function Prototypes ******************************/
static int TmrRtcInterruptExample(void); /* Main test */
/* Set up routines for timer counters */
static int SetupTicker(void);
static int SetupTimer(int DeviceID);
/* Interleaved interrupt test for both timer counters */
static int WaitForDutyCycleFull(void);
static int SetupInterruptSystem(u16 IntcDeviceID, XScuGic *IntcInstancePtr);
static void TickHandler(void *CallBackRef);
/************************** Variable Definitions *****************************/
static XTtcPs TtcPsInst; /* Timer counter instance */
static TmrCntrSetup SettingsTable=
{TICK_TIMER_FREQ_HZ, 0, 0, 0}; /* Ticker timer counter initial setup,
only output freq */
XScuGic InterruptController; /* Interrupt controller instance */
static u8 ErrorCount; /* Errors seen at interrupt time */
static volatile u8 UpdateFlag; /* Flag to update the seconds counter */
static u32 TickCount; /* Ticker interrupts between seconds change */
/*****************************************************************************/
/**
*
* This is the main function that calls the TTC RTC interrupt example.
*
* @param None
*
* @return
* - XST_SUCCESS to indicate Success
* - XST_FAILURE to indicate a Failure.
*
* @note None.
*
*****************************************************************************/
int main(void)
{
int Status;
xil_printf("Starting Timer RTC Example");
Status = TmrRtcInterruptExample();
if (Status != XST_SUCCESS) {
xil_printf("FAIL!");
return XST_FAILURE;
}
xil_printf("Success!");
return XST_SUCCESS;
}
/*****************************************************************************/
/**
*
* This is the main function of the interrupt example.
*
*
* @param None.
*
* @return XST_SUCCESS to indicate success, else XST_FAILURE to indicate
* a Failure.
*
****************************************************************************/
static int TmrRtcInterruptExample(void)
{
int Status;
/*
* Make sure the interrupts are disabled, in case this is being run
* again after a failure.
*/
/*
* Connect the Intc to the interrupt subsystem such that interrupts can
* occur. This function is application specific.
*/
Status = SetupInterruptSystem(INTC_DEVICE_ID, &InterruptController);
if (Status != XST_SUCCESS) {
return XST_FAILURE;
}
/*
* Set up the Ticker timer
*/
Status = SetupTicker();
if (Status != XST_SUCCESS) {
return Status;
}
Status = WaitForDutyCycleFull();
if (Status != XST_SUCCESS) {
return Status;
}
/*
* Stop the counters
*/
XTtcPs_Stop(&TtcPsInst);
return XST_SUCCESS;
}
/****************************************************************************/
/**
*
* This function sets up the Ticker timer.
*
* @param None
*
* @return XST_SUCCESS if everything sets up well, XST_FAILURE otherwise.
*
*****************************************************************************/
int SetupTicker(void)
{
int Status;
TmrCntrSetup *TimerSetup;
XTtcPs *TtcPsTick;
TimerSetup = &SettingsTable;
/*
* Set up appropriate options for Ticker: interval mode without
* waveform output.
*/
TimerSetup->Options |= (XTTCPS_OPTION_INTERVAL_MODE |
XTTCPS_OPTION_WAVE_DISABLE);
/*
* Calling the timer setup routine
* . initialize device
* . set options
*/
Status = SetupTimer(TTC_TICK_DEVICE_ID);
if(Status != XST_SUCCESS) {
return Status;
}
TtcPsTick = &TtcPsInst;
/*
* Connect to the interrupt controller
*/
Status = XScuGic_Connect(&InterruptController, TTC_TICK_INTR_ID,
(Xil_InterruptHandler)TickHandler, (void *)TtcPsTick);
if (Status != XST_SUCCESS) {
return XST_FAILURE;
}
/*
* Enable the interrupt for the Timer counter
*/
XScuGic_Enable(&InterruptController, TTC_TICK_INTR_ID);
/*
* Enable the interrupts for the tick timer/counter
* We only care about the interval timeout.
*/
XTtcPs_EnableInterrupts(TtcPsTick, XTTCPS_IXR_INTERVAL_MASK);
/*
* Start the tick timer/counter
*/
XTtcPs_Start(TtcPsTick);
return Status;
}
/****************************************************************************/
/**
*
* This function uses the interrupt inter-locking between the ticker timer
* counter and the waveform output timer counter. When certain amount of
* interrupts have happened to the ticker timer counter, a flag, UpdateFlag,
* is set to true.
*
*
* @param None
*
* @return XST_SUCCESS if duty cycle successfully reaches beyond 100,
* otherwise XST_FAILURE.
*
*****************************************************************************/
int WaitForDutyCycleFull(void)
{
u32 seconds;
/*
* Initialize some variables used by the interrupts and in loops.
*/
ErrorCount = 0;
seconds = 0;
/*
* Loop until two minutes passes.
*/
while (seconds <= 121) {
/*
* If error occurs, disable interrupts, and exit.
*/
if (0 != ErrorCount) {
return XST_FAILURE;
}
/*
* The Ticker interrupt sets a flag for update.
*/
if (UpdateFlag) {
/*
* Calculate the time setting here, not at the time
* critical interrupt level.
*/
seconds++;
UpdateFlag = FALSE;
xil_printf("Time: %d\n\r", seconds);
}
}
return XST_SUCCESS;
}
/****************************************************************************/
/**
*
* This function sets up a timer counter device, using the information in its
* setup structure.
* . initialize device
* . set options
* . set interval and prescaler value for given output frequency.
*
* @param DeviceID is the unique ID for the device.
*
* @return XST_SUCCESS if successful, otherwise XST_FAILURE.
*
*****************************************************************************/
int SetupTimer(int DeviceID)
{
int Status;
XTtcPs_Config *Config;
XTtcPs *Timer;
TmrCntrSetup *TimerSetup;
TimerSetup = &SettingsTable;
Timer = &TtcPsInst;
/*
* Stop the timer first
*/
XTtcPs_Stop(Timer);
/*
* Look up the configuration based on the device identifier
*/
Config = XTtcPs_LookupConfig(DeviceID);
if (NULL == Config) {
return XST_FAILURE;
}
/*
* Initialize the device
*/
Status = XTtcPs_CfgInitialize(Timer, Config, Config->BaseAddress);
if (Status != XST_SUCCESS) {
return XST_FAILURE;
}
/*
* Set the options
*/
XTtcPs_SetOptions(Timer, TimerSetup->Options);
/*
* Timer frequency is preset in the TimerSetup structure,
* however, the value is not reflected in its other fields, such as
* IntervalValue and PrescalerValue. The following call will map the
* frequency to the interval and prescaler values.
*/
XTtcPs_CalcIntervalFromFreq(Timer, TimerSetup->OutputHz,
&(TimerSetup->Interval), &(TimerSetup->Prescaler));
/*
* Set the interval and prescale
*/
XTtcPs_SetInterval(Timer, TimerSetup->Interval);
XTtcPs_SetPrescaler(Timer, TimerSetup->Prescaler);
return XST_SUCCESS;
}
/****************************************************************************/
/**
*
* This function setups the interrupt system such that interrupts can occur.
* This function is application specific since the actual system may or may not
* have an interrupt controller. The TTC could be directly connected to a
* processor without an interrupt controller. The user should modify this
* function to fit the application.
*
* @param IntcDeviceID is the unique ID of the interrupt controller
* @param IntcInstacePtr is a pointer to the interrupt controller
* instance.
*
* @return XST_SUCCESS if successful, otherwise XST_FAILURE.
*
*****************************************************************************/
static int SetupInterruptSystem(u16 IntcDeviceID,
XScuGic *IntcInstancePtr)
{
int Status;
XScuGic_Config *IntcConfig; /* The configuration parameters of the
interrupt controller */
/*
* Initialize the interrupt controller driver
*/
IntcConfig = XScuGic_LookupConfig(IntcDeviceID);
if (NULL == IntcConfig) {
return XST_FAILURE;
}
Status = XScuGic_CfgInitialize(IntcInstancePtr, IntcConfig,
IntcConfig->CpuBaseAddress);
if (Status != XST_SUCCESS) {
return XST_FAILURE;
}
/*
* Connect the interrupt controller interrupt handler to the hardware
* interrupt handling logic in the ARM processor.
*/
Xil_ExceptionRegisterHandler(XIL_EXCEPTION_ID_IRQ_INT,
(Xil_ExceptionHandler) XScuGic_InterruptHandler,
IntcInstancePtr);
/*
* Enable interrupts in the ARM
*/
Xil_ExceptionEnable();
return XST_SUCCESS;
}
/***************************************************************************/
/**
*
* This function is the handler which handles the periodic tick interrupt.
* It updates its count, and set a flag to signal PWM timer counter to
* update its duty cycle.
*
* This handler provides an example of how to handle data for the TTC and
* is application specific.
*
* @param CallBackRef contains a callback reference from the driver, in
* this case it is the instance pointer for the TTC driver.
*
* @return None.
*
*****************************************************************************/
static void TickHandler(void *CallBackRef)
{
u32 StatusEvent;
/*
* Read the interrupt status, then write it back to clear the interrupt.
*/
StatusEvent = XTtcPs_GetInterruptStatus((XTtcPs *)CallBackRef);
XTtcPs_ClearInterruptStatus((XTtcPs *)CallBackRef, StatusEvent);
if (0 != (XTTCPS_IXR_INTERVAL_MASK & StatusEvent)) {
TickCount++;
if (TICKS_PER_CHANGE_PERIOD == TickCount) {
TickCount = 0;
UpdateFlag = TRUE;
}
}
else {
/*
* The Interval event should be the only one enabled. If it is
* not it is an error
*/
ErrorCount++;
}
}

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@ -0,0 +1,40 @@
COMPILER=
ARCHIVER=
CP=cp
COMPILER_FLAGS=
EXTRA_COMPILER_FLAGS=
LIB=libxil.a
CC_FLAGS = $(COMPILER_FLAGS)
ECC_FLAGS = $(EXTRA_COMPILER_FLAGS)
RELEASEDIR=../../../lib
INCLUDEDIR=../../../include
INCLUDES=-I./. -I${INCLUDEDIR}
OUTS = *.o
LIBSOURCES:=*.c
INCLUDEFILES:=*.h
OBJECTS = $(addsuffix .o, $(basename $(wildcard *.c)))
libs: banner ttcps_libs clean
%.o: %.c
${COMPILER} $(CC_FLAGS) $(ECC_FLAGS) $(INCLUDES) -o $@ $<
banner:
echo "Compiling ttcps"
ttcps_libs: ${OBJECTS}
$(ARCHIVER) -r ${RELEASEDIR}/${LIB} ${OBJECTS}
.PHONY: include
include: ttcps_includes
ttcps_includes:
${CP} ${INCLUDEFILES} ${INCLUDEDIR}
clean:
rm -rf ${OBJECTS}

View file

@ -0,0 +1,423 @@
/******************************************************************************
*
* Copyright (C) 2010 - 2014 Xilinx, Inc. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* Use of the Software is limited solely to applications:
* (a) running on a Xilinx device, or
* (b) that interact with a Xilinx device through a bus or interconnect.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
* Except as contained in this notice, the name of the Xilinx shall not be used
* in advertising or otherwise to promote the sale, use or other dealings in
* this Software without prior written authorization from Xilinx.
*
******************************************************************************/
/*****************************************************************************/
/**
*
* @file xttcps.c
*
* This file contains the implementation of the XTtcPs driver. This driver
* controls the operation of one timer counter in the Triple Timer Counter (TTC)
* module in the Ps block. Refer to xttcps.h for more detailed description
* of the driver.
*
* <pre>
* MODIFICATION HISTORY:
*
* Ver Who Date Changes
* ----- ------ -------- -------------------------------------------------
* 1.00a drg/jz 01/21/10 First release
*
* </pre>
*
******************************************************************************/
/***************************** Include Files *********************************/
#include "xttcps.h"
/************************** Constant Definitions *****************************/
/**************************** Type Definitions *******************************/
/***************** Macros (Inline Functions) Definitions *********************/
/************************** Function Prototypes ******************************/
/************************** Variable Definitions *****************************/
/*****************************************************************************/
/**
*
* Initializes a specific XTtcPs instance such that the driver is ready to use.
* This function initializes a single timer counter in the triple timer counter
* function block.
*
* The state of the device after initialization is:
* - Overflow Mode
* - Internal (pclk) selected
* - Counter disabled
* - All Interrupts disabled
* - Output waveforms disabled
*
* @param InstancePtr is a pointer to the XTtcPs instance.
* @param ConfigPtr is a reference to a structure containing information
* about a specific TTC device.
* @param EffectiveAddr is the device base address in the virtual memory
* address space. The caller is responsible for keeping the address
* mapping from EffectiveAddr to the device physical base address
* unchanged once this function is invoked. Unexpected errors may
* occur if the address mapping changes after this function is
* called. If address translation is not used, then use
* ConfigPtr->BaseAddress for this parameter, passing the physical
* address instead.
*
* @return
*
* - XST_SUCCESS if the initialization is successful.
* - XST_DEVICE_IS_STARTED if the device is started. It must be
* stopped to re-initialize.
*
* @note Device has to be stopped first to call this function to
* initialize it.
*
******************************************************************************/
int XTtcPs_CfgInitialize(XTtcPs *InstancePtr, XTtcPs_Config *ConfigPtr,
u32 EffectiveAddr)
{
/*
* Assert to validate input arguments.
*/
Xil_AssertNonvoid(InstancePtr != NULL);
Xil_AssertNonvoid(ConfigPtr != NULL);
/*
* Set some default values
*/
InstancePtr->Config.DeviceId = ConfigPtr->DeviceId;
InstancePtr->Config.BaseAddress = EffectiveAddr;
InstancePtr->Config.InputClockHz = ConfigPtr->InputClockHz;
/*
* If the timer counter has already started, return an error
* Device should be stopped first.
*/
if(XTtcPs_IsStarted(InstancePtr)) {
return XST_DEVICE_IS_STARTED;
}
/*
* Reset the count control register to it's default value.
*/
XTtcPs_WriteReg(InstancePtr->Config.BaseAddress,
XTTCPS_CNT_CNTRL_OFFSET,
XTTCPS_CNT_CNTRL_RESET_VALUE);
/*
* Reset the rest of the registers to the default values.
*/
XTtcPs_WriteReg(InstancePtr->Config.BaseAddress,
XTTCPS_CLK_CNTRL_OFFSET, 0x00);
XTtcPs_WriteReg(InstancePtr->Config.BaseAddress,
XTTCPS_INTERVAL_VAL_OFFSET, 0x00);
XTtcPs_WriteReg(InstancePtr->Config.BaseAddress,
XTTCPS_MATCH_1_OFFSET, 0x00);
XTtcPs_WriteReg(InstancePtr->Config.BaseAddress,
XTTCPS_MATCH_2_OFFSET, 0x00);
XTtcPs_WriteReg(InstancePtr->Config.BaseAddress,
XTTCPS_MATCH_2_OFFSET, 0x00);
XTtcPs_WriteReg(InstancePtr->Config.BaseAddress,
XTTCPS_IER_OFFSET, 0x00);
XTtcPs_WriteReg(InstancePtr->Config.BaseAddress,
XTTCPS_ISR_OFFSET, XTTCPS_IXR_ALL_MASK);
InstancePtr->IsReady = XIL_COMPONENT_IS_READY;
/*
* Reset the counter value
*/
XTtcPs_ResetCounterValue(InstancePtr);
return XST_SUCCESS;
}
/*****************************************************************************/
/**
*
* This function is used to set the match registers. There are three match
* registers.
*
* The match 0 register is special. If the waveform output mode is enabled, the
* waveform will change polarity when the count matches the value in the match 0
* register. The polarity of the waveform output can also be set using the
* XTtcPs_SetOptions() function.
*
* @param InstancePtr is a pointer to the XTtcPs instance.
* @param MatchIndex is the index to the match register to be set.
* Valid values are 0, 1, or 2.
* @param Value is the 16-bit value to be set in the match register.
*
* @return None
*
* @note None
*
****************************************************************************/
void XTtcPs_SetMatchValue(XTtcPs *InstancePtr, u8 MatchIndex, u16 Value)
{
/*
* Assert to validate input arguments.
*/
Xil_AssertVoid(InstancePtr != NULL);
Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
Xil_AssertVoid(MatchIndex < XTTCPS_NUM_MATCH_REG);
/*
* Write the value to the correct match register with MatchIndex
*/
XTtcPs_WriteReg(InstancePtr->Config.BaseAddress,
XTtcPs_Match_N_Offset(MatchIndex), Value);
}
/*****************************************************************************/
/**
*
* This function is used to get the value of the match registers. There are
* three match registers.
*
* @param InstancePtr is a pointer to the XTtcPs instance.
* @param MatchIndex is the index to the match register to be set.
* Valid values are 0, 1, or 2.
*
* @return None
*
* @note None
*
****************************************************************************/
u16 XTtcPs_GetMatchValue(XTtcPs *InstancePtr, u8 MatchIndex)
{
u32 MatchReg;
/*
* Assert to validate input arguments.
*/
Xil_AssertNonvoid(InstancePtr != NULL);
Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
Xil_AssertNonvoid(MatchIndex < XTTCPS_NUM_MATCH_REG);
MatchReg = XTtcPs_ReadReg(InstancePtr->Config.BaseAddress,
XTtcPs_Match_N_Offset(MatchIndex));
return (u16) MatchReg;
}
/*****************************************************************************/
/**
*
* This function sets the prescaler enable bit and if needed sets the prescaler
* bits in the control register.
*
* @param InstancePtr is a pointer to the XTtcPs instance.
* @param PrescalerValue is a number from 0-16 that sets the prescaler
* to use.
* If the parameter is 0 - 15, use a prescaler on the clock of
* 2^(PrescalerValue+1), or 2-65536.
* If the parameter is XTTCPS_CLK_CNTRL_PS_DISABLE, do not use a
* prescaler.
*
* @return None
*
* @note None
*
****************************************************************************/
void XTtcPs_SetPrescaler(XTtcPs *InstancePtr, u8 PrescalerValue)
{
u32 ClockReg;
/*
* Assert to validate input arguments.
*/
Xil_AssertVoid(InstancePtr != NULL);
Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
Xil_AssertVoid(PrescalerValue <= XTTCPS_CLK_CNTRL_PS_DISABLE);
/*
* Read the clock control register
*/
ClockReg = XTtcPs_ReadReg(InstancePtr->Config.BaseAddress,
XTTCPS_CLK_CNTRL_OFFSET);
/*
* Clear all of the prescaler control bits in the register
*/
ClockReg &=
~(XTTCPS_CLK_CNTRL_PS_VAL_MASK | XTTCPS_CLK_CNTRL_PS_EN_MASK);
if (PrescalerValue < XTTCPS_CLK_CNTRL_PS_DISABLE) {
/*
* Set the prescaler value and enable prescaler
*/
ClockReg |= (PrescalerValue << XTTCPS_CLK_CNTRL_PS_VAL_SHIFT) &
XTTCPS_CLK_CNTRL_PS_VAL_MASK;
ClockReg |= XTTCPS_CLK_CNTRL_PS_EN_MASK;
}
/*
* Write the register with the new values.
*/
XTtcPs_WriteReg(InstancePtr->Config.BaseAddress,
XTTCPS_CLK_CNTRL_OFFSET, ClockReg);
}
/*****************************************************************************/
/**
*
* This function gets the input clock prescaler
*
* @param InstancePtr is a pointer to the XTtcPs instance.
*
* <pre>
* @return The value(n) from which the prescalar value is calculated
* as 2^(n+1). Some example values are given below :
*
* Value Prescaler
* 0 2
* 1 4
* N 2^(n+1)
* 15 65536
* 16 1
* </pre>
*
* @note None.
*
****************************************************************************/
u8 XTtcPs_GetPrescaler(XTtcPs *InstancePtr)
{
u32 ClockReg;
/*
* Assert to validate input arguments.
*/
Xil_AssertNonvoid(InstancePtr != NULL);
Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
/*
* Read the clock control register
*/
ClockReg = XTtcPs_ReadReg(InstancePtr->Config.BaseAddress,
XTTCPS_CLK_CNTRL_OFFSET);
if (0 == (ClockReg & XTTCPS_CLK_CNTRL_PS_EN_MASK)) {
/*
* Prescaler is disabled. Return the correct flag value
*/
return XTTCPS_CLK_CNTRL_PS_DISABLE;
}
return ((ClockReg & XTTCPS_CLK_CNTRL_PS_VAL_MASK) >>
XTTCPS_CLK_CNTRL_PS_VAL_SHIFT);
}
/*****************************************************************************/
/**
*
* This function calculates the interval value as well as the prescaler value
* for a given frequency.
*
* @param InstancePtr is a pointer to the XTtcPs instance.
* @param Freq is the requested output frequency for the device.
* @param Interval is the interval value for the given frequency,
* it is the output value for this function.
* @param Prescaler is the prescaler value for the given frequency,
* it is the output value for this function.
*
* @return None.
*
* @note
* Upon successful calculation for the given frequency, Interval and Prescaler
* carry the settings for the timer counter; Upon unsuccessful calculation,
* Interval and Prescaler are set to 0xFF(FF) for their maximum values to
* signal the caller of failure. Therefore, caller needs to check the return
* interval or prescaler values for whether the function has succeeded.
*
****************************************************************************/
void XTtcPs_CalcIntervalFromFreq(XTtcPs *InstancePtr, u32 Freq,
u16 *Interval, u8 *Prescaler)
{
u8 TmpPrescaler;
u32 TempValue;
u32 InputClock;
InputClock = InstancePtr->Config.InputClockHz;
/*
* Find the smallest prescaler that will work for a given frequency. The
* smaller the prescaler, the larger the count and the more accurate the
* PWM setting.
*/
TempValue = InputClock/ Freq;
if (TempValue < 4) {
/*
* The frequency is too high, it is too close to the input
* clock value. Use maximum values to signal caller.
*/
*Interval = 0xFFFF;
*Prescaler = 0xFF;
return;
}
/*
* First, do we need a prescaler or not?
*/
if (65536 > TempValue) {
/*
* We do not need a prescaler, so set the values appropriately
*/
*Interval = TempValue;
*Prescaler = XTTCPS_CLK_CNTRL_PS_DISABLE;
return;
}
for (TmpPrescaler = 0; TmpPrescaler < XTTCPS_CLK_CNTRL_PS_DISABLE;
TmpPrescaler++) {
TempValue = InputClock/ (Freq * (1 << (TmpPrescaler + 1)));
/*
* The first value less than 2^16 is the best bet
*/
if (65536 > TempValue) {
/*
* Set the values appropriately
*/
*Interval = TempValue;
*Prescaler = TmpPrescaler;
return;
}
}
/* Can not find interval values that work for the given frequency.
* Return maximum values to signal caller.
*/
*Interval = 0XFFFF;
*Prescaler = 0XFF;
return;
}

View file

@ -0,0 +1,407 @@
/******************************************************************************
*
* Copyright (C) 2010 - 2014 Xilinx, Inc. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* Use of the Software is limited solely to applications:
* (a) running on a Xilinx device, or
* (b) that interact with a Xilinx device through a bus or interconnect.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
* Except as contained in this notice, the name of the Xilinx shall not be used
* in advertising or otherwise to promote the sale, use or other dealings in
* this Software without prior written authorization from Xilinx.
*
******************************************************************************/
/*****************************************************************************/
/**
*
* @file xttcps.h
*
* This is the driver for one 16-bit timer counter in the Triple Timer Counter
* (TTC) module in the Ps block.
*
* The TTC module provides three independent timer/counter modules that can each
* be clocked using either the system clock (pclk) or an externally driven
* clock (ext_clk). In addition, each counter can independently prescale its
* selected clock input (divided by 2 to 65536). Counters can be set to
* decrement or increment.
*
* Each of the counters can be programmed to generate interrupt pulses:
* . At a regular, predefined period, that is on a timed interval
* . When the counter registers overflow
* . When the count matches any one of the three 'match' registers
*
* Therefore, up to six different events can trigger a timer interrupt: three
* match interrupts, an overflow interrupt, an interval interrupt and an event
* timer interrupt. Note that the overflow interrupt and the interval interrupt
* are mutually exclusive.
*
* <b>Initialization & Configuration</b>
*
* An XTtcPs_Config structure is used to configure a driver instance.
* Information in the XTtcPs_Config structure is the hardware properties
* about the device.
*
* A driver instance is initialized through
* XTtcPs_CfgInitialize(InstancePtr, CfgPtr, EffectiveAddr). Where CfgPtr
* is a pointer to the XTtcPs_Config structure, it can be looked up statically
* through XTtcPs_LookupConfig(DeviceID), or passed in by the caller. The
* EffectiveAddr can be the static base address of the device or virtual
* mapped address if address translation is supported.
*
* <b>Interrupts</b>
*
* Interrupt handler is not provided by the driver, as handling of interrupt
* is application specific.
*
* @note
* The default setting for a timer/counter is:
* - Overflow Mode
* - Internal clock (pclk) selected
* - Counter disabled
* - All Interrupts disabled
* - Output waveforms disabled
*
* <pre>
* MODIFICATION HISTORY:
*
* Ver Who Date Changes
* ----- ------ -------- -----------------------------------------------------
* 1.00a drg/jz 01/20/10 First release..
* 2.0 adk 12/10/13 Updated as per the New Tcl API's
* 3.0 pkp 12/09/14 Added support for Zynq Ultrascale Mp
* </pre>
*
******************************************************************************/
#ifndef XTTCPS_H /* prevent circular inclusions */
#define XTTCPS_H /* by using protection macros */
#ifdef __cplusplus
extern "C" {
#endif
/***************************** Include Files *********************************/
#include "xttcps_hw.h"
#include "xstatus.h"
/************************** Constant Definitions *****************************/
/** @name Configuration options
*
* Options for the device. Each of the options is bit field, so more than one
* options can be specified.
*
* @{
*/
#define XTTCPS_OPTION_EXTERNAL_CLK 0x0001 /**< External clock source */
#define XTTCPS_OPTION_CLK_EDGE_NEG 0x0002 /**< Clock on trailing edge for
external clock*/
#define XTTCPS_OPTION_INTERVAL_MODE 0x0004 /**< Interval mode */
#define XTTCPS_OPTION_DECREMENT 0x0008 /**< Decrement the counter */
#define XTTCPS_OPTION_MATCH_MODE 0x0010 /**< Match mode */
#define XTTCPS_OPTION_WAVE_DISABLE 0x0020 /**< No waveform output */
#define XTTCPS_OPTION_WAVE_POLARITY 0x0040 /**< Waveform polarity */
/*@}*/
/**************************** Type Definitions *******************************/
/**
* This typedef contains configuration information for the device.
*/
typedef struct {
u16 DeviceId; /**< Unique ID for device */
u32 BaseAddress; /**< Base address for device */
u32 InputClockHz; /**< Input clock frequency */
} XTtcPs_Config;
/**
* The XTtcPs driver instance data. The user is required to allocate a
* variable of this type for each PS timer/counter device in the system. A
* pointer to a variable of this type is then passed to various driver API
* functions.
*/
typedef struct {
XTtcPs_Config Config; /**< Configuration structure */
u32 IsReady; /**< Device is initialized and ready */
} XTtcPs;
/***************** Macros (Inline Functions) Definitions *********************/
/*
* Internal helper macros
*/
#define InstReadReg(InstancePtr, RegOffset) \
(Xil_In32(((InstancePtr)->Config.BaseAddress) + (RegOffset)))
#define InstWriteReg(InstancePtr, RegOffset, Data) \
(Xil_Out32(((InstancePtr)->Config.BaseAddress) + (RegOffset), (Data)))
/*****************************************************************************/
/**
*
* This function starts the counter/timer without resetting the counter value.
*
* @param InstancePtr is a pointer to the XTtcPs instance.
*
* @return None
*
* @note C-style signature:
* void XTtcPs_Start(XTtcPs *InstancePtr)
*
****************************************************************************/
#define XTtcPs_Start(InstancePtr) \
InstWriteReg((InstancePtr), XTTCPS_CNT_CNTRL_OFFSET, \
(InstReadReg((InstancePtr), XTTCPS_CNT_CNTRL_OFFSET) & \
~XTTCPS_CNT_CNTRL_DIS_MASK))
/*****************************************************************************/
/**
*
* This function stops the counter/timer. This macro may be called at any time
* to stop the counter. The counter holds the last value until it is reset,
* restarted or enabled.
*
* @param InstancePtr is a pointer to the XTtcPs instance.
*
* @return None
*
* @note C-style signature:
* void XTtcPs_Stop(XTtcPs *InstancePtr)
*
****************************************************************************/
#define XTtcPs_Stop(InstancePtr) \
InstWriteReg((InstancePtr), XTTCPS_CNT_CNTRL_OFFSET, \
(InstReadReg((InstancePtr), XTTCPS_CNT_CNTRL_OFFSET) | \
XTTCPS_CNT_CNTRL_DIS_MASK))
/*****************************************************************************/
/**
*
* This function checks whether the timer counter has already started.
*
* @param InstancePtr is a pointer to the XTtcPs instance
*
* @return Non-zero if the device has started, '0' otherwise.
*
* @note C-style signature:
* int XTtcPs_IsStarted(XTtcPs *InstancePtr)
*
****************************************************************************/
#define XTtcPs_IsStarted(InstancePtr) \
(int)((InstReadReg((InstancePtr), XTTCPS_CNT_CNTRL_OFFSET) & \
XTTCPS_CNT_CNTRL_DIS_MASK) == 0)
/*****************************************************************************/
/**
*
* This function returns the current 16-bit counter value. It may be called at
* any time.
*
* @param InstancePtr is a pointer to the XTtcPs instance.
*
* @return 16-bit counter value.
*
* @note C-style signature:
* u16 XTtcPs_GetCounterValue(XTtcPs *InstancePtr)
*
****************************************************************************/
#define XTtcPs_GetCounterValue(InstancePtr) \
(u16)InstReadReg((InstancePtr), XTTCPS_COUNT_VALUE_OFFSET)
/*****************************************************************************/
/**
*
* This function sets the interval value to be used in interval mode.
*
* @param InstancePtr is a pointer to the XTtcPs instance.
* @param Value is the 16-bit value to be set in the interval register.
*
* @return None
*
* @note C-style signature:
* void XTtcPs_SetInterval(XTtcPs *InstancePtr, u16 Value)
*
****************************************************************************/
#define XTtcPs_SetInterval(InstancePtr, Value) \
InstWriteReg((InstancePtr), XTTCPS_INTERVAL_VAL_OFFSET, (Value))
/*****************************************************************************/
/**
*
* This function gets the interval value from the interval register.
*
* @param InstancePtr is a pointer to the XTtcPs instance.
*
* @return 16-bit interval value
*
* @note C-style signature:
* u16 XTtcPs_GetInterval(XTtcPs *InstancePtr)
*
****************************************************************************/
#define XTtcPs_GetInterval(InstancePtr) \
(u16)InstReadReg((InstancePtr), XTTCPS_INTERVAL_VAL_OFFSET)
/*****************************************************************************/
/**
*
* This macro resets the count register. It may be called at any time. The
* counter is reset to either 0 or 0xFFFF, or the interval value, depending on
* the increment/decrement mode. The state of the counter, as started or
* stopped, is not affected by calling reset.
*
* @param InstancePtr is a pointer to the XTtcPs instance.
*
* @return None
*
* @note C-style signature:
* void XTtcPs_ResetCounterValue(XTtcPs *InstancePtr)
*
****************************************************************************/
#define XTtcPs_ResetCounterValue(InstancePtr) \
InstWriteReg((InstancePtr), XTTCPS_CNT_CNTRL_OFFSET, \
(InstReadReg((InstancePtr), XTTCPS_CNT_CNTRL_OFFSET) | \
XTTCPS_CNT_CNTRL_RST_MASK))
/*****************************************************************************/
/**
*
* This function enables the interrupts.
*
* @param InstancePtr is a pointer to the XTtcPs instance.
* @param InterruptMask defines which interrupt should be enabled.
* Constants are defined in xttcps_hw.h as XTTCPS_IXR_*.
* This is a bit mask, all set bits will be enabled, cleared bits
* will not be disabled.
*
* @return None.
*
* @note
* C-style signature:
* void XTtcPs_EnableInterrupts(XTtcPs *InstancePtr, u32 InterruptMask)
*
******************************************************************************/
#define XTtcPs_EnableInterrupts(InstancePtr, InterruptMask) \
InstWriteReg((InstancePtr), XTTCPS_IER_OFFSET, \
(InstReadReg((InstancePtr), XTTCPS_IER_OFFSET) | \
(InterruptMask)))
/*****************************************************************************/
/**
*
* This function disables the interrupts.
*
* @param InstancePtr is a pointer to the XTtcPs instance.
* @param InterruptMask defines which interrupt should be disabled.
* Constants are defined in xttcps_hw.h as XTTCPS_IXR_*.
* This is a bit mask, all set bits will be disabled, cleared bits
* will not be disabled.
*
* @return None.
*
* @note
* C-style signature:
* void XTtcPs_DisableInterrupts(XTtcPs *InstancePtr, u32 InterruptMask)
*
******************************************************************************/
#define XTtcPs_DisableInterrupts(InstancePtr, InterruptMask) \
InstWriteReg((InstancePtr), XTTCPS_IER_OFFSET, \
(InstReadReg((InstancePtr), XTTCPS_IER_OFFSET) & \
~(InterruptMask)))
/*****************************************************************************/
/**
*
* This function reads the interrupt status.
*
* @param InstancePtr is a pointer to the XTtcPs instance.
*
* @return None.
*
* @note C-style signature:
* u32 XTtcPs_GetInterruptStatus(XTtcPs *InstancePtr)
*
******************************************************************************/
#define XTtcPs_GetInterruptStatus(InstancePtr) \
InstReadReg((InstancePtr), XTTCPS_ISR_OFFSET)
/*****************************************************************************/
/**
*
* This function clears the interrupt status.
*
* @param InstancePtr is a pointer to the XTtcPs instance.
* @param InterruptMask defines which interrupt should be cleared.
* Constants are defined in xttcps_hw.h as XTTCPS_IXR_*.
* This is a bit mask, all set bits will be cleared, cleared bits
* will not be cleared.
*
* @return None.
*
* @note
* C-style signature:
* void XTtcPs_ClearInterruptStatus(XTtcPs *InstancePtr, u32 InterruptMask)
*
******************************************************************************/
#define XTtcPs_ClearInterruptStatus(InstancePtr, InterruptMask) \
InstWriteReg((InstancePtr), XTTCPS_ISR_OFFSET, \
(InterruptMask))
/************************** Function Prototypes ******************************/
/*
* Initialization functions in xttcps_sinit.c
*/
XTtcPs_Config *XTtcPs_LookupConfig(u16 DeviceId);
/*
* Required functions, in xttcps.c
*/
int XTtcPs_CfgInitialize(XTtcPs *InstancePtr,
XTtcPs_Config * ConfigPtr, u32 EffectiveAddr);
void XTtcPs_SetMatchValue(XTtcPs *InstancePtr, u8 MatchIndex, u16 Value);
u16 XTtcPs_GetMatchValue(XTtcPs *InstancePtr, u8 MatchIndex);
void XTtcPs_SetPrescaler(XTtcPs *InstancePtr, u8 PrescalerValue);
u8 XTtcPs_GetPrescaler(XTtcPs *InstancePtr);
void XTtcPs_CalcIntervalFromFreq(XTtcPs *InstancePtr, u32 Freq,
u16 *Interval, u8 *Prescaler);
/*
* Functions for options, in file xttcps_options.c
*/
int XTtcPs_SetOptions(XTtcPs *InstancePtr, u32 Options);
u32 XTtcPs_GetOptions(XTtcPs *InstancePtr);
/*
* Function for self-test, in file xttcps_selftest.c
*/
int XTtcPs_SelfTest(XTtcPs *InstancePtr);
#ifdef __cplusplus
}
#endif
#endif /* end of protection macro */

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@ -0,0 +1,119 @@
/******************************************************************************
*
* Copyright (C) 2010 - 2014 Xilinx, Inc. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* Use of the Software is limited solely to applications:
* (a) running on a Xilinx device, or
* (b) that interact with a Xilinx device through a bus or interconnect.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
* Except as contained in this notice, the name of the Xilinx shall not be used
* in advertising or otherwise to promote the sale, use or other dealings in
* this Software without prior written authorization from Xilinx.
*
******************************************************************************/
/*****************************************************************************/
/**
*
* @file xttcps_g.c
*
* This file contains a configuration table where each entry is the
* configuration information for one timer counter device in the system.
*
* <pre>
* MODIFICATION HISTORY:
*
* Ver Who Date Changes
* ----- ------ -------- -----------------------------------------------
* 1.00a drg/jz 01/21/10 First release
* 2.00 hk 22/01/14 Added check for picking instances other than
* default.
* </pre>
*
******************************************************************************/
/***************************** Include Files *********************************/
#include "xttcps.h"
#include "xparameters.h"
/************************** Constant Definitions *****************************/
/**************************** Type Definitions *******************************/
/***************** Macros (Inline Functions) Definitions *********************/
/************************** Function Prototypes ******************************/
/************************** Variable Prototypes ******************************/
/**
* This table contains configuration information for each TTC device
* in the system.
*/
XTtcPs_Config XTtcPs_ConfigTable[XPAR_XTTCPS_NUM_INSTANCES] = {
{
XPAR_XTTCPS_0_DEVICE_ID, /* Device ID for instance */
XPAR_XTTCPS_0_BASEADDR, /* Device base address */
XPAR_XTTCPS_0_TTC_CLK_FREQ_HZ /* Device input clock frequency */
},
#ifdef XPAR_XTTCPS_1_DEVICE_ID
{
XPAR_XTTCPS_1_DEVICE_ID, /* Device ID for instance */
XPAR_XTTCPS_1_BASEADDR, /* Device base address */
XPAR_XTTCPS_1_CLOCK_HZ /* Device input clock frequency */
},
#endif
#ifdef XPAR_XTTCPS_2_DEVICE_ID
{
XPAR_XTTCPS_2_DEVICE_ID, /* Device ID for instance */
XPAR_XTTCPS_2_BASEADDR, /* Device base address */
XPAR_XTTCPS_2_CLOCK_HZ /* Device input clock frequency */
},
#endif
#ifdef XPAR_XTTCPS_3_DEVICE_ID
{
XPAR_XTTCPS_3_DEVICE_ID, /* Device ID for instance */
XPAR_XTTCPS_3_BASEADDR, /* Device base address */
XPAR_XTTCPS_3_CLOCK_HZ /* Device input clock frequency */
},
#endif
#ifdef XPAR_XTTCPS_4_DEVICE_ID
{
XPAR_XTTCPS_4_DEVICE_ID, /* Device ID for instance */
XPAR_XTTCPS_4_BASEADDR, /* Device base address */
XPAR_XTTCPS_4_CLOCK_HZ /* Device input clock frequency */
},
#endif
#ifdef XPAR_XTTCPS_5_DEVICE_ID
{
XPAR_XTTCPS_5_DEVICE_ID, /* Device ID for instance */
XPAR_XTTCPS_5_BASEADDR, /* Device base address */
XPAR_XTTCPS_5_CLOCK_HZ /* Device input clock frequency */
},
#endif
};

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/******************************************************************************
*
* Copyright (C) 2010 - 2014 Xilinx, Inc. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* Use of the Software is limited solely to applications:
* (a) running on a Xilinx device, or
* (b) that interact with a Xilinx device through a bus or interconnect.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
* Except as contained in this notice, the name of the Xilinx shall not be used
* in advertising or otherwise to promote the sale, use or other dealings in
* this Software without prior written authorization from Xilinx.
*
******************************************************************************/
/*****************************************************************************/
/**
*
* @file xttcps_hw.h
*
* This file defines the hardware interface to one of the three timer counters
* in the Ps block.
*
*
* <pre>
* MODIFICATION HISTORY:
*
* Ver Who Date Changes
* ----- ------ -------- -------------------------------------------------
* 1.00a drg/jz 01/21/10 First release
*
* </pre>
*
******************************************************************************/
#ifndef XTTCPS_HW_H /* prevent circular inclusions */
#define XTTCPS_HW_H /* by using protection macros */
#ifdef __cplusplus
extern "C" {
#endif
/***************************** Include Files *********************************/
#include "xil_types.h"
#include "xil_assert.h"
#include "xil_io.h"
/************************** Constant Definitions *****************************/
/** @name Register Map
*
* Register offsets from the base address of the device.
*
* @{
*/
#define XTTCPS_CLK_CNTRL_OFFSET 0x00000000 /**< Clock Control Register */
#define XTTCPS_CNT_CNTRL_OFFSET 0x0000000C /**< Counter Control Register*/
#define XTTCPS_COUNT_VALUE_OFFSET 0x00000018 /**< Current Counter Value */
#define XTTCPS_INTERVAL_VAL_OFFSET 0x00000024 /**< Interval Count Value */
#define XTTCPS_MATCH_0_OFFSET 0x00000030 /**< Match 1 value */
#define XTTCPS_MATCH_1_OFFSET 0x0000003C /**< Match 2 value */
#define XTTCPS_MATCH_2_OFFSET 0x00000048 /**< Match 3 value */
#define XTTCPS_ISR_OFFSET 0x00000054 /**< Interrupt Status Register */
#define XTTCPS_IER_OFFSET 0x00000060 /**< Interrupt Enable Register */
/* @} */
/** @name Clock Control Register
* Clock Control Register definitions
* @{
*/
#define XTTCPS_CLK_CNTRL_PS_EN_MASK 0x00000001 /**< Prescale enable */
#define XTTCPS_CLK_CNTRL_PS_VAL_MASK 0x0000001E /**< Prescale value */
#define XTTCPS_CLK_CNTRL_PS_VAL_SHIFT 1 /**< Prescale shift */
#define XTTCPS_CLK_CNTRL_PS_DISABLE 16 /**< Prescale disable */
#define XTTCPS_CLK_CNTRL_SRC_MASK 0x00000020 /**< Clock source */
#define XTTCPS_CLK_CNTRL_EXT_EDGE_MASK 0x00000040 /**< External Clock edge */
/* @} */
/** @name Counter Control Register
* Counter Control Register definitions
* @{
*/
#define XTTCPS_CNT_CNTRL_DIS_MASK 0x00000001 /**< Disable the counter */
#define XTTCPS_CNT_CNTRL_INT_MASK 0x00000002 /**< Interval mode */
#define XTTCPS_CNT_CNTRL_DECR_MASK 0x00000004 /**< Decrement mode */
#define XTTCPS_CNT_CNTRL_MATCH_MASK 0x00000008 /**< Match mode */
#define XTTCPS_CNT_CNTRL_RST_MASK 0x00000010 /**< Reset counter */
#define XTTCPS_CNT_CNTRL_EN_WAVE_MASK 0x00000020 /**< Enable waveform */
#define XTTCPS_CNT_CNTRL_POL_WAVE_MASK 0x00000040 /**< Waveform polarity */
#define XTTCPS_CNT_CNTRL_RESET_VALUE 0x00000021 /**< Reset value */
/* @} */
/** @name Current Counter Value Register
* Current Counter Value Register definitions
* @{
*/
#define XTTCPS_COUNT_VALUE_MASK 0x0000FFFF /**< 16-bit counter value */
/* @} */
/** @name Interval Value Register
* Interval Value Register is the maximum value the counter will count up or
* down to.
* @{
*/
#define XTTCPS_INTERVAL_VAL_MASK 0x0000FFFF /**< 16-bit Interval value*/
/* @} */
/** @name Match Registers
* Definitions for Match registers, each timer counter has three match
* registers.
* @{
*/
#define XTTCPS_MATCH_MASK 0x0000FFFF /**< 16-bit Match value */
#define XTTCPS_NUM_MATCH_REG 3 /**< Num of Match reg */
/* @} */
/** @name Interrupt Registers
* Following register bit mask is for all interrupt registers.
*
* @{
*/
#define XTTCPS_IXR_INTERVAL_MASK 0x00000001 /**< Interval Interrupt */
#define XTTCPS_IXR_MATCH_0_MASK 0x00000002 /**< Match 1 Interrupt */
#define XTTCPS_IXR_MATCH_1_MASK 0x00000004 /**< Match 2 Interrupt */
#define XTTCPS_IXR_MATCH_2_MASK 0x00000008 /**< Match 3 Interrupt */
#define XTTCPS_IXR_CNT_OVR_MASK 0x00000010 /**< Counter Overflow */
#define XTTCPS_IXR_ALL_MASK 0x0000001F /**< All valid Interrupts */
/* @} */
/***************** Macros (Inline Functions) Definitions *********************/
/****************************************************************************/
/**
*
* Read the given Timer Counter register.
*
* @param BaseAddress is the base address of the timer counter device.
* @param RegOffset is the register offset to be read
*
* @return The 32-bit value of the register
*
* @note C-style signature:
* u32 XTtcPs_ReadReg(u32 BaseAddress, u32 RegOffset)
*
*****************************************************************************/
#define XTtcPs_ReadReg(BaseAddress, RegOffset) \
(Xil_In32((BaseAddress) + (RegOffset)))
/****************************************************************************/
/**
*
* Write the given Timer Counter register.
*
* @param BaseAddress is the base address of the timer counter device.
* @param RegOffset is the register offset to be written
* @param Data is the 32-bit value to write to the register
*
* @return None.
*
* @note C-style signature:
* void XTtcPs_WriteReg(XTtcPs BaseAddress, u32 RegOffset,
* u32 Data)
*
*****************************************************************************/
#define XTtcPs_WriteReg(BaseAddress, RegOffset, Data) \
(Xil_Out32((BaseAddress) + (RegOffset), (Data)))
/****************************************************************************/
/**
*
* Calculate a match register offset using the Match Register index.
*
* @param MatchIndex is the 0-2 value of the match register
*
* @return MATCH_N_OFFSET.
*
* @note C-style signature:
* u32 XTtcPs_Match_N_Offset(u8 MatchIndex)
*
*****************************************************************************/
#define XTtcPs_Match_N_Offset(MatchIndex) \
(XTTCPS_MATCH_0_OFFSET + (12 * (MatchIndex)))
/************************** Function Prototypes ******************************/
/************************** Variable Definitions *****************************/
#ifdef __cplusplus
}
#endif
#endif /* end of protection macro */

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@ -0,0 +1,232 @@
/******************************************************************************
*
* Copyright (C) 2010 - 2014 Xilinx, Inc. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* Use of the Software is limited solely to applications:
* (a) running on a Xilinx device, or
* (b) that interact with a Xilinx device through a bus or interconnect.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
* Except as contained in this notice, the name of the Xilinx shall not be used
* in advertising or otherwise to promote the sale, use or other dealings in
* this Software without prior written authorization from Xilinx.
*
******************************************************************************/
/*****************************************************************************/
/**
*
* @file xttcps_options.c
*
* This file contains functions to get or set option features for the device.
*
* <pre>
* MODIFICATION HISTORY:
*
* Ver Who Date Changes
* ----- ------ -------- ---------------------------------------------
* 1.00a drg/jz 01/21/10 First release
* 1.01a nm 03/05/2012 Removed break statement after return to remove
* compilation warnings.
* </pre>
*
******************************************************************************/
/***************************** Include Files *********************************/
#include "xttcps.h"
/************************** Constant Definitions *****************************/
/**************************** Type Definitions *******************************/
/***************** Macros (Inline Functions) Definitions *********************/
/************************** Function Prototypes ******************************/
/************************** Variable Definitions *****************************/
/*
* Create the table of options which are processed to get/set the device
* options. These options are table driven to allow easy maintenance and
* expansion of the options.
*/
typedef struct {
u32 Option;
u32 Mask;
u32 Register;
} OptionsMap;
static OptionsMap TmrCtrOptionsTable[] = {
{XTTCPS_OPTION_EXTERNAL_CLK, XTTCPS_CLK_CNTRL_SRC_MASK,
XTTCPS_CLK_CNTRL_OFFSET},
{XTTCPS_OPTION_CLK_EDGE_NEG, XTTCPS_CLK_CNTRL_EXT_EDGE_MASK,
XTTCPS_CLK_CNTRL_OFFSET},
{XTTCPS_OPTION_INTERVAL_MODE, XTTCPS_CNT_CNTRL_INT_MASK,
XTTCPS_CNT_CNTRL_OFFSET},
{XTTCPS_OPTION_DECREMENT, XTTCPS_CNT_CNTRL_DECR_MASK,
XTTCPS_CNT_CNTRL_OFFSET},
{XTTCPS_OPTION_MATCH_MODE, XTTCPS_CNT_CNTRL_MATCH_MASK,
XTTCPS_CNT_CNTRL_OFFSET},
{XTTCPS_OPTION_WAVE_DISABLE, XTTCPS_CNT_CNTRL_EN_WAVE_MASK,
XTTCPS_CNT_CNTRL_OFFSET},
{XTTCPS_OPTION_WAVE_POLARITY, XTTCPS_CNT_CNTRL_POL_WAVE_MASK,
XTTCPS_CNT_CNTRL_OFFSET},
};
#define XTTCPS_NUM_TMRCTR_OPTIONS (sizeof(TmrCtrOptionsTable) / \
sizeof(OptionsMap))
/*****************************************************************************/
/**
*
* This function sets the options for the TTC device.
*
* @param InstancePtr is a pointer to the XTtcPs instance.
* @param Options contains the specified options to be set. This is a bit
* mask where a 1 means to turn the option on, and a 0 means to
* turn the option off. One or more bit values may be contained
* in the mask. See the bit definitions named XTTCPS_*_OPTION in
* the file xttcps.h.
*
* @return
* - XST_SUCCESS if options are successfully set.
* - XST_FAILURE if any of the options are unknown.
*
* @note None
*
******************************************************************************/
int XTtcPs_SetOptions(XTtcPs *InstancePtr, u32 Options)
{
u32 CountReg;
u32 ClockReg;
unsigned Index;
Xil_AssertNonvoid(InstancePtr != NULL);
Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
ClockReg = XTtcPs_ReadReg(InstancePtr->Config.BaseAddress,
XTTCPS_CLK_CNTRL_OFFSET);
CountReg = XTtcPs_ReadReg(InstancePtr->Config.BaseAddress,
XTTCPS_CNT_CNTRL_OFFSET);
/*
* Loop through the options table, turning the option on or off
* depending on whether the bit is set in the incoming options flag.
*/
for (Index = 0; Index < XTTCPS_NUM_TMRCTR_OPTIONS; Index++) {
if (Options & TmrCtrOptionsTable[Index].Option) {
switch (TmrCtrOptionsTable[Index].Register) {
case XTTCPS_CLK_CNTRL_OFFSET:
/* Add option */
ClockReg |= TmrCtrOptionsTable[Index].Mask;
break;
case XTTCPS_CNT_CNTRL_OFFSET:
/* Add option */
CountReg |= TmrCtrOptionsTable[Index].Mask;
break;
default:
return XST_FAILURE;
}
}
else {
switch (TmrCtrOptionsTable[Index].Register) {
case XTTCPS_CLK_CNTRL_OFFSET:
/* Remove option*/
ClockReg &= ~TmrCtrOptionsTable[Index].Mask;
break;
case XTTCPS_CNT_CNTRL_OFFSET:
/* Remove option*/
CountReg &= ~TmrCtrOptionsTable[Index].Mask;
break;
default:
return XST_FAILURE;
}
}
}
/*
* Now write the registers. Leave it to the upper layers to restart the
* device.
*/
XTtcPs_WriteReg(InstancePtr->Config.BaseAddress,
XTTCPS_CLK_CNTRL_OFFSET, ClockReg);
XTtcPs_WriteReg(InstancePtr->Config.BaseAddress,
XTTCPS_CNT_CNTRL_OFFSET, CountReg);
return XST_SUCCESS;
}
/*****************************************************************************/
/**
*
* This function gets the settings for the options for the TTC device.
*
* @param InstancePtr is a pointer to the XTtcPs instance.
*
* @return
*
* The return u32 contains the specified options that are set. This is a bit
* mask where a '1' means the option is on, and a'0' means the option is off.
* One or more bit values may be contained in the mask. See the bit definitions
* named XTTCPS_*_OPTION in the file xttcps.h.
*
* @note None.
*
******************************************************************************/
u32 XTtcPs_GetOptions(XTtcPs *InstancePtr)
{
u32 OptionsFlag = 0;
u32 Register;
unsigned Index;
Xil_AssertNonvoid(InstancePtr != NULL);
Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
/*
* Loop through the options table to determine which options are set
*/
for (Index = 0; Index < XTTCPS_NUM_TMRCTR_OPTIONS; Index++) {
/*
* Get the control register to determine which options are
* currently set.
*/
Register = XTtcPs_ReadReg(InstancePtr->Config.BaseAddress,
TmrCtrOptionsTable[Index].
Register);
if (Register & TmrCtrOptionsTable[Index].Mask) {
OptionsFlag |= TmrCtrOptionsTable[Index].Option;
}
}
return OptionsFlag;
}

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/******************************************************************************
*
* Copyright (C) 2010 - 2014 Xilinx, Inc. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* Use of the Software is limited solely to applications:
* (a) running on a Xilinx device, or
* (b) that interact with a Xilinx device through a bus or interconnect.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
* Except as contained in this notice, the name of the Xilinx shall not be used
* in advertising or otherwise to promote the sale, use or other dealings in
* this Software without prior written authorization from Xilinx.
*
******************************************************************************/
/*****************************************************************************/
/**
*
* @file xttcps_selftest.c
*
* This file contains the implementation of self test function for the
* XTtcPs driver.
*
* <pre>
* MODIFICATION HISTORY:
*
* Ver Who Date Changes
* ----- ------ -------- ---------------------------------------------
* 1.00a drg/jz 01/21/10 First release
* </pre>
*
******************************************************************************/
/***************************** Include Files *********************************/
#include "xttcps.h"
/************************** Constant Definitions *****************************/
/**************************** Type Definitions *******************************/
/***************** Macros (Inline Functions) Definitions *********************/
/************************** Function Prototypes ******************************/
/************************** Variable Definitions *****************************/
/*****************************************************************************/
/**
*
* Runs a self-test on the driver/device.
*
*
* @param InstancePtr is a pointer to the XTtcPs instance.
*
* @return
*
* - XST_SUCCESS if successful
* - XST_FAILURE indicates a register did not read or write correctly
*
* @note This test fails if it is not called right after initialization.
*
******************************************************************************/
int XTtcPs_SelfTest(XTtcPs *InstancePtr)
{
u32 TempReg;
Xil_AssertNonvoid(InstancePtr != NULL);
Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
/*
* All the TTC registers should be in their default state right now.
*/
TempReg = XTtcPs_ReadReg(InstancePtr->Config.BaseAddress,
XTTCPS_CNT_CNTRL_OFFSET);
if (XTTCPS_CNT_CNTRL_RESET_VALUE != TempReg) {
return XST_FAILURE;
}
return XST_SUCCESS;
}

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/******************************************************************************
*
* Copyright (C) 2010 - 2014 Xilinx, Inc. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* Use of the Software is limited solely to applications:
* (a) running on a Xilinx device, or
* (b) that interact with a Xilinx device through a bus or interconnect.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
* Except as contained in this notice, the name of the Xilinx shall not be used
* in advertising or otherwise to promote the sale, use or other dealings in
* this Software without prior written authorization from Xilinx.
*
******************************************************************************/
/*****************************************************************************/
/**
*
* @file xttcps_sinit.c
*
* The implementation of the XTtcPs driver's static initialization functionality.
*
* <pre>
* MODIFICATION HISTORY:
*
* Ver Who Date Changes
* ----- ------ -------- ---------------------------------------------
* 1.00a drg/jz 01/21/10 First release
* </pre>
*
******************************************************************************/
/***************************** Include Files *********************************/
#include "xparameters.h"
#include "xttcps.h"
/************************** Constant Definitions *****************************/
/**************************** Type Definitions *******************************/
/***************** Macros (Inline Functions) Definitions *********************/
/************************** Function Prototypes ******************************/
/************************** Variable Definitions *****************************/
extern XTtcPs_Config XTtcPs_ConfigTable[];
/*****************************************************************************/
/**
*
* Looks up the device configuration based on the unique device ID. A table
* contains the configuration info for each device in the system.
*
* @param DeviceId contains the unique ID of the device
*
* @return
*
* A pointer to the configuration found or NULL if the specified device ID was
* not found. See xttcps.h for the definition of XTtcPs_Config.
*
* @note None.
*
******************************************************************************/
XTtcPs_Config *XTtcPs_LookupConfig(u16 DeviceId)
{
XTtcPs_Config *CfgPtr = NULL;
unsigned Index;
for (Index = 0; Index < XPAR_XTTCPS_NUM_INSTANCES; Index++) {
if (XTtcPs_ConfigTable[Index].DeviceId == DeviceId) {
CfgPtr = &XTtcPs_ConfigTable[Index];
break;
}
}
return CfgPtr;
}