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axidma: Handle cache flush/invalidate api's properly for a53

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In a53 processor the Cache flush api does both fulsh and invalidate
of the memory once the dma transfer is done before checking the
data we shouldn't invalidate the memory unlike the a9/microblaze case.
This patch updates the axidma examples for the same.

Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Acked-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
This commit is contained in:
Kedareswara rao Appana 2015-08-21 11:10:56 +05:30 • committed by Nava kishore Manne
parent c6b7045164
commit 1f48a8019c
2 changed files with 8 additions and 0 deletions
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5
XilinxProcessorIPLib/drivers/axidma/examples/xaxidma_example_simple_intr.c
View file

@ -326,6 +326,9 @@ int main(void)
* is enabled
*/
Xil_DCacheFlushRange((u32)TxBufferPtr, MAX_PKT_LEN);
#ifdef __aarch64__
Xil_DCacheFlushRange((UINTPTR)RxBufferPtr, MAX_PKT_LEN);
#endif
/* Send a packet */
for(Index = 0; Index < Tries; Index ++) {
@ -438,7 +441,9 @@ static int CheckData(int Length, u8 StartValue)
/* Invalidate the DestBuffer before receiving the data, in case the
* Data Cache is enabled
*/
#ifndef __aarch64__
Xil_DCacheInvalidateRange((u32)RxPacket, Length);
#endif
for(Index = 0; Index < Length; Index++) {
if (RxPacket[Index] != Value) {

3
XilinxProcessorIPLib/drivers/axidma/examples/xaxidma_example_simple_poll.c
View file

@ -277,6 +277,9 @@ int XAxiDma_SimplePollExample(u16 DeviceId)
* is enabled
*/
Xil_DCacheFlushRange((UINTPTR)TxBufferPtr, MAX_PKT_LEN);
#ifdef __aarch64__
Xil_DCacheFlushRange((UINTPTR)RxBufferPtr, MAX_PKT_LEN);
#endif
for(Index = 0; Index < Tries; Index ++) {