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bsp: a53: enabling the SError exception in boot code

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This patch enables Serror exception in boot flow for catching the
asynchronous aborts

Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
This commit is contained in:
Kinjal Pravinbhai Patel 2015-06-10 17:27:23 +05:30 • committed by Nava kishore Manne
parent 99a46157eb
commit 3f2478472f
1 changed files with 5 additions and 0 deletions
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5
lib/bsp/standalone/src/cortexa53/64bit/gcc/boot.S
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@ -198,6 +198,11 @@ OKToRun:
msr TCR_EL3, x1
isb
/* Enable SError Exception for asynchronous abort */
mrs x1,DAIF
bic x1,x1,#(0x1<<8)
msr DAIF,x1
/* Configure SCTLR_EL3 */
mov x1, #0 //Most of the SCTLR_EL3 bits are unknown at reset
orr x1, x1, #(1 << 12) //Enable I cache