dptx: Updated Doxygen documentation.
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
This commit is contained in:
Andrei-Liviu Simion
Jagannadha Sutradharudu Teki
parent
a448e98992
commit
8deec4b397
13 changed files with 307 additions and 122 deletions
|
|
@ -40,6 +40,7 @@
|
|||
<li><a href="#index_l"><span>l</span></a></li>
|
||||
<li><a href="#index_m"><span>m</span></a></li>
|
||||
<li><a href="#index_n"><span>n</span></a></li>
|
||||
<li><a href="#index_o"><span>o</span></a></li>
|
||||
<li><a href="#index_p"><span>p</span></a></li>
|
||||
<li><a href="#index_q"><span>q</span></a></li>
|
||||
<li><a href="#index_r"><span>r</span></a></li>
|
||||
|
|
@ -56,7 +57,8 @@ Here is a list of all class members with links to the classes they belong to:
|
|||
<p>
|
||||
<h3><a class="anchor" name="index_a">- a -</a></h3><ul>
|
||||
<li>Address
|
||||
: <a class="el" href="struct_x_dptx___aux_transaction.html#6a0adf0553c976a5dca175df2c3206ab">XDptx_AuxTransaction</a><li>AvgBytesPerTU
|
||||
: <a class="el" href="struct_x_dptx___aux_transaction.html#6a0adf0553c976a5dca175df2c3206ab">XDptx_AuxTransaction</a><li>AuxDelayUs
|
||||
: <a class="el" href="struct_x_dptx.html#cb98c8c35b97020fe4767c2b174af54b">XDptx</a><li>AvgBytesPerTU
|
||||
: <a class="el" href="struct_x_dptx___main_stream_attributes.html#0d59bf49718427457d95694ecfaf5dcd">XDptx_MainStreamAttributes</a></ul>
|
||||
<h3><a class="anchor" name="index_b">- b -</a></h3><ul>
|
||||
<li>BaseAddr
|
||||
|
|
@ -82,7 +84,8 @@ Here is a list of all class members with links to the classes they belong to:
|
|||
: <a class="el" href="struct_x_dptx___link_config.html#b4c3e5dd659d85aefe6b8e58d5ad2b51">XDptx_LinkConfig</a><li>DpcdRev
|
||||
: <a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html#449c1d535fd06fa4759982f589803532">XDptx_SbMsgLinkAddressReplyPortDetail</a>, <a class="el" href="struct_x_dptx___topology_node.html#6f03fce3f64d138f80870781eeec7f0c">XDptx_TopologyNode</a><li>DpcdRxCapsField
|
||||
: <a class="el" href="struct_x_dptx___sink_config.html#e270033c74fec65bcbdc3d71c95de582">XDptx_SinkConfig</a><li>DpDevPlugStatus
|
||||
: <a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html#536cb9c9bc4ba1c94fbae41e2603a031">XDptx_SbMsgLinkAddressReplyPortDetail</a><li>DualPixelEn
|
||||
: <a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html#536cb9c9bc4ba1c94fbae41e2603a031">XDptx_SbMsgLinkAddressReplyPortDetail</a><li>DpProtocol
|
||||
: <a class="el" href="struct_x_dptx___config.html#26c90c8cdf918c870e7aff75a976e832">XDptx_Config</a><li>DualPixelEn
|
||||
: <a class="el" href="struct_x_dptx___config.html#6f12c22e02f63866b778271799411fcf">XDptx_Config</a><li>DynamicRange
|
||||
: <a class="el" href="struct_x_dptx___main_stream_attributes.html#3ccef994e5c6ac11a2ba6ebf08ede63d">XDptx_MainStreamAttributes</a></ul>
|
||||
<h3><a class="anchor" name="index_e">- e -</a></h3><ul>
|
||||
|
|
@ -140,20 +143,27 @@ Here is a list of all class members with links to the classes they belong to:
|
|||
: <a class="el" href="struct_x_dptx.html#65244ac7460329fff6b94cb8fc022670">XDptx</a><li>MstPbn
|
||||
: <a class="el" href="struct_x_dptx___mst_stream.html#e1c99f9aedb36dbaf64095f508e13143">XDptx_MstStream</a><li>MstStreamConfig
|
||||
: <a class="el" href="struct_x_dptx.html#02c88b01b932312a848aee2c01f1a0b6">XDptx</a><li>MstStreamEnable
|
||||
: <a class="el" href="struct_x_dptx___mst_stream.html#6a69e59854c88800f8d994ae71598eb9">XDptx_MstStream</a></ul>
|
||||
: <a class="el" href="struct_x_dptx___mst_stream.html#6a69e59854c88800f8d994ae71598eb9">XDptx_MstStream</a><li>MstSupport
|
||||
: <a class="el" href="struct_x_dptx___config.html#df88f4ab48c55bacd7bc4f55acafd54e">XDptx_Config</a></ul>
|
||||
<h3><a class="anchor" name="index_n">- n -</a></h3><ul>
|
||||
<li>NodeTable
|
||||
: <a class="el" href="struct_x_dptx___topology.html#a07a0b5e2899d8a6f03a23378f9f6d73">XDptx_Topology</a><li>NodeTotal
|
||||
: <a class="el" href="struct_x_dptx___topology.html#ad5b55de5668c6dc5d23b78daf043717">XDptx_Topology</a><li>NumBytes
|
||||
: <a class="el" href="struct_x_dptx___aux_transaction.html#1094c402f5586820a861ef51b484afc9">XDptx_AuxTransaction</a><li>NumPorts
|
||||
: <a class="el" href="struct_x_dptx___topology.html#ad5b55de5668c6dc5d23b78daf043717">XDptx_Topology</a><li>NumAudioChs
|
||||
: <a class="el" href="struct_x_dptx___config.html#8d1a62f2b08a183d3837151b3a01c79a">XDptx_Config</a><li>NumBytes
|
||||
: <a class="el" href="struct_x_dptx___aux_transaction.html#1094c402f5586820a861ef51b484afc9">XDptx_AuxTransaction</a><li>NumMstStreams
|
||||
: <a class="el" href="struct_x_dptx___config.html#d61517af6e6ef03007a5efdef39de756">XDptx_Config</a><li>NumPorts
|
||||
: <a class="el" href="struct_x_dptx___sb_msg_link_address_reply_device_info.html#47ca31ac5763a49a7e38ead6571664b4">XDptx_SbMsgLinkAddressReplyDeviceInfo</a><li>NumSdpStreams
|
||||
: <a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html#38683b2b110c51c451e8bb6ff954b0b9">XDptx_SbMsgLinkAddressReplyPortDetail</a><li>NumSdpStreamSinks
|
||||
: <a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html#2f6a6889e2000f58bc7a75f38d0a34b5">XDptx_SbMsgLinkAddressReplyPortDetail</a><li>NVid
|
||||
: <a class="el" href="struct_x_dptx___main_stream_attributes.html#00f936032f44f8e35bbc3e8f0c97df27">XDptx_MainStreamAttributes</a></ul>
|
||||
<h3><a class="anchor" name="index_o">- o -</a></h3><ul>
|
||||
<li>OverrideUserPixelWidth
|
||||
: <a class="el" href="struct_x_dptx___main_stream_attributes.html#d81b60fc9d135ee303bf6994dfb0815c">XDptx_MainStreamAttributes</a></ul>
|
||||
<h3><a class="anchor" name="index_p">- p -</a></h3><ul>
|
||||
<li>PathMsg
|
||||
: <a class="el" href="struct_x_dptx___sideband_msg_header.html#5580e4b73c1bd97c43cec826dc7540de">XDptx_SidebandMsgHeader</a><li>Pattern
|
||||
: <a class="el" href="struct_x_dptx___link_config.html#7778d88be19c72355b59a7feeda6a35e">XDptx_LinkConfig</a><li>PeerDeviceType
|
||||
: <a class="el" href="struct_x_dptx___link_config.html#7778d88be19c72355b59a7feeda6a35e">XDptx_LinkConfig</a><li>PayloadDataWidth
|
||||
: <a class="el" href="struct_x_dptx___config.html#d7c3a428223bc15b333f49a099ea0149">XDptx_Config</a><li>PeerDeviceType
|
||||
: <a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html#a162737e3f61ba2e95dee07d502ffcad">XDptx_SbMsgLinkAddressReplyPortDetail</a><li>PeLevel
|
||||
: <a class="el" href="struct_x_dptx___link_config.html#cd23d60f875507803550ff3c43f0baf4">XDptx_LinkConfig</a><li>PixelClkKhz
|
||||
: <a class="el" href="struct_x_dptx___dmt_mode.html#a8befc410e54eb85edb49f4712a667c9">XDptx_DmtMode</a><li>PortDetails
|
||||
|
|
@ -170,8 +180,10 @@ Here is a list of all class members with links to the classes they belong to:
|
|||
: <a class="el" href="struct_x_dptx.html#939b973272c6b24c902ea836517440b2">XDptx</a></ul>
|
||||
<h3><a class="anchor" name="index_s">- s -</a></h3><ul>
|
||||
<li>SAxiClkHz
|
||||
: <a class="el" href="struct_x_dptx___config.html#1e9e27ea68e4b36fb2ede842c77e94c1">XDptx_Config</a><li>ScramblerEn
|
||||
: <a class="el" href="struct_x_dptx___link_config.html#a5f66296bd53c4639485c0443a20401e">XDptx_LinkConfig</a><li>SinkList
|
||||
: <a class="el" href="struct_x_dptx___config.html#1e9e27ea68e4b36fb2ede842c77e94c1">XDptx_Config</a><li>SbMsgDelayUs
|
||||
: <a class="el" href="struct_x_dptx.html#f85b7947bcf05b3a71ad5d27eb746520">XDptx</a><li>ScramblerEn
|
||||
: <a class="el" href="struct_x_dptx___link_config.html#a5f66296bd53c4639485c0443a20401e">XDptx_LinkConfig</a><li>SecondaryChEn
|
||||
: <a class="el" href="struct_x_dptx___config.html#76a6d413d59c2c6386a2dff120137cb9">XDptx_Config</a><li>SinkList
|
||||
: <a class="el" href="struct_x_dptx___topology.html#a2226d73d19995d01005a51b5a53f739">XDptx_Topology</a><li>SinkTotal
|
||||
: <a class="el" href="struct_x_dptx___topology.html#20702947b2076eb482876c65620e64ad">XDptx_Topology</a><li>StartOfMsgTransaction
|
||||
: <a class="el" href="struct_x_dptx___sideband_msg_header.html#8ed85ed1a26348f53358da7307400544">XDptx_SidebandMsgHeader</a><li>SupportDownspreadControl
|
||||
|
|
|
|||
|
|
@ -40,6 +40,7 @@
|
|||
<li><a href="#index_l"><span>l</span></a></li>
|
||||
<li><a href="#index_m"><span>m</span></a></li>
|
||||
<li><a href="#index_n"><span>n</span></a></li>
|
||||
<li><a href="#index_o"><span>o</span></a></li>
|
||||
<li><a href="#index_p"><span>p</span></a></li>
|
||||
<li><a href="#index_q"><span>q</span></a></li>
|
||||
<li><a href="#index_r"><span>r</span></a></li>
|
||||
|
|
@ -56,7 +57,8 @@
|
|||
<p>
|
||||
<h3><a class="anchor" name="index_a">- a -</a></h3><ul>
|
||||
<li>Address
|
||||
: <a class="el" href="struct_x_dptx___aux_transaction.html#6a0adf0553c976a5dca175df2c3206ab">XDptx_AuxTransaction</a><li>AvgBytesPerTU
|
||||
: <a class="el" href="struct_x_dptx___aux_transaction.html#6a0adf0553c976a5dca175df2c3206ab">XDptx_AuxTransaction</a><li>AuxDelayUs
|
||||
: <a class="el" href="struct_x_dptx.html#cb98c8c35b97020fe4767c2b174af54b">XDptx</a><li>AvgBytesPerTU
|
||||
: <a class="el" href="struct_x_dptx___main_stream_attributes.html#0d59bf49718427457d95694ecfaf5dcd">XDptx_MainStreamAttributes</a></ul>
|
||||
<h3><a class="anchor" name="index_b">- b -</a></h3><ul>
|
||||
<li>BaseAddr
|
||||
|
|
@ -82,7 +84,8 @@
|
|||
: <a class="el" href="struct_x_dptx___link_config.html#b4c3e5dd659d85aefe6b8e58d5ad2b51">XDptx_LinkConfig</a><li>DpcdRev
|
||||
: <a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html#449c1d535fd06fa4759982f589803532">XDptx_SbMsgLinkAddressReplyPortDetail</a>, <a class="el" href="struct_x_dptx___topology_node.html#6f03fce3f64d138f80870781eeec7f0c">XDptx_TopologyNode</a><li>DpcdRxCapsField
|
||||
: <a class="el" href="struct_x_dptx___sink_config.html#e270033c74fec65bcbdc3d71c95de582">XDptx_SinkConfig</a><li>DpDevPlugStatus
|
||||
: <a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html#536cb9c9bc4ba1c94fbae41e2603a031">XDptx_SbMsgLinkAddressReplyPortDetail</a><li>DualPixelEn
|
||||
: <a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html#536cb9c9bc4ba1c94fbae41e2603a031">XDptx_SbMsgLinkAddressReplyPortDetail</a><li>DpProtocol
|
||||
: <a class="el" href="struct_x_dptx___config.html#26c90c8cdf918c870e7aff75a976e832">XDptx_Config</a><li>DualPixelEn
|
||||
: <a class="el" href="struct_x_dptx___config.html#6f12c22e02f63866b778271799411fcf">XDptx_Config</a><li>DynamicRange
|
||||
: <a class="el" href="struct_x_dptx___main_stream_attributes.html#3ccef994e5c6ac11a2ba6ebf08ede63d">XDptx_MainStreamAttributes</a></ul>
|
||||
<h3><a class="anchor" name="index_e">- e -</a></h3><ul>
|
||||
|
|
@ -140,20 +143,27 @@
|
|||
: <a class="el" href="struct_x_dptx.html#65244ac7460329fff6b94cb8fc022670">XDptx</a><li>MstPbn
|
||||
: <a class="el" href="struct_x_dptx___mst_stream.html#e1c99f9aedb36dbaf64095f508e13143">XDptx_MstStream</a><li>MstStreamConfig
|
||||
: <a class="el" href="struct_x_dptx.html#02c88b01b932312a848aee2c01f1a0b6">XDptx</a><li>MstStreamEnable
|
||||
: <a class="el" href="struct_x_dptx___mst_stream.html#6a69e59854c88800f8d994ae71598eb9">XDptx_MstStream</a></ul>
|
||||
: <a class="el" href="struct_x_dptx___mst_stream.html#6a69e59854c88800f8d994ae71598eb9">XDptx_MstStream</a><li>MstSupport
|
||||
: <a class="el" href="struct_x_dptx___config.html#df88f4ab48c55bacd7bc4f55acafd54e">XDptx_Config</a></ul>
|
||||
<h3><a class="anchor" name="index_n">- n -</a></h3><ul>
|
||||
<li>NodeTable
|
||||
: <a class="el" href="struct_x_dptx___topology.html#a07a0b5e2899d8a6f03a23378f9f6d73">XDptx_Topology</a><li>NodeTotal
|
||||
: <a class="el" href="struct_x_dptx___topology.html#ad5b55de5668c6dc5d23b78daf043717">XDptx_Topology</a><li>NumBytes
|
||||
: <a class="el" href="struct_x_dptx___aux_transaction.html#1094c402f5586820a861ef51b484afc9">XDptx_AuxTransaction</a><li>NumPorts
|
||||
: <a class="el" href="struct_x_dptx___topology.html#ad5b55de5668c6dc5d23b78daf043717">XDptx_Topology</a><li>NumAudioChs
|
||||
: <a class="el" href="struct_x_dptx___config.html#8d1a62f2b08a183d3837151b3a01c79a">XDptx_Config</a><li>NumBytes
|
||||
: <a class="el" href="struct_x_dptx___aux_transaction.html#1094c402f5586820a861ef51b484afc9">XDptx_AuxTransaction</a><li>NumMstStreams
|
||||
: <a class="el" href="struct_x_dptx___config.html#d61517af6e6ef03007a5efdef39de756">XDptx_Config</a><li>NumPorts
|
||||
: <a class="el" href="struct_x_dptx___sb_msg_link_address_reply_device_info.html#47ca31ac5763a49a7e38ead6571664b4">XDptx_SbMsgLinkAddressReplyDeviceInfo</a><li>NumSdpStreams
|
||||
: <a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html#38683b2b110c51c451e8bb6ff954b0b9">XDptx_SbMsgLinkAddressReplyPortDetail</a><li>NumSdpStreamSinks
|
||||
: <a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html#2f6a6889e2000f58bc7a75f38d0a34b5">XDptx_SbMsgLinkAddressReplyPortDetail</a><li>NVid
|
||||
: <a class="el" href="struct_x_dptx___main_stream_attributes.html#00f936032f44f8e35bbc3e8f0c97df27">XDptx_MainStreamAttributes</a></ul>
|
||||
<h3><a class="anchor" name="index_o">- o -</a></h3><ul>
|
||||
<li>OverrideUserPixelWidth
|
||||
: <a class="el" href="struct_x_dptx___main_stream_attributes.html#d81b60fc9d135ee303bf6994dfb0815c">XDptx_MainStreamAttributes</a></ul>
|
||||
<h3><a class="anchor" name="index_p">- p -</a></h3><ul>
|
||||
<li>PathMsg
|
||||
: <a class="el" href="struct_x_dptx___sideband_msg_header.html#5580e4b73c1bd97c43cec826dc7540de">XDptx_SidebandMsgHeader</a><li>Pattern
|
||||
: <a class="el" href="struct_x_dptx___link_config.html#7778d88be19c72355b59a7feeda6a35e">XDptx_LinkConfig</a><li>PeerDeviceType
|
||||
: <a class="el" href="struct_x_dptx___link_config.html#7778d88be19c72355b59a7feeda6a35e">XDptx_LinkConfig</a><li>PayloadDataWidth
|
||||
: <a class="el" href="struct_x_dptx___config.html#d7c3a428223bc15b333f49a099ea0149">XDptx_Config</a><li>PeerDeviceType
|
||||
: <a class="el" href="struct_x_dptx___sb_msg_link_address_reply_port_detail.html#a162737e3f61ba2e95dee07d502ffcad">XDptx_SbMsgLinkAddressReplyPortDetail</a><li>PeLevel
|
||||
: <a class="el" href="struct_x_dptx___link_config.html#cd23d60f875507803550ff3c43f0baf4">XDptx_LinkConfig</a><li>PixelClkKhz
|
||||
: <a class="el" href="struct_x_dptx___dmt_mode.html#a8befc410e54eb85edb49f4712a667c9">XDptx_DmtMode</a><li>PortDetails
|
||||
|
|
@ -170,8 +180,10 @@
|
|||
: <a class="el" href="struct_x_dptx.html#939b973272c6b24c902ea836517440b2">XDptx</a></ul>
|
||||
<h3><a class="anchor" name="index_s">- s -</a></h3><ul>
|
||||
<li>SAxiClkHz
|
||||
: <a class="el" href="struct_x_dptx___config.html#1e9e27ea68e4b36fb2ede842c77e94c1">XDptx_Config</a><li>ScramblerEn
|
||||
: <a class="el" href="struct_x_dptx___link_config.html#a5f66296bd53c4639485c0443a20401e">XDptx_LinkConfig</a><li>SinkList
|
||||
: <a class="el" href="struct_x_dptx___config.html#1e9e27ea68e4b36fb2ede842c77e94c1">XDptx_Config</a><li>SbMsgDelayUs
|
||||
: <a class="el" href="struct_x_dptx.html#f85b7947bcf05b3a71ad5d27eb746520">XDptx</a><li>ScramblerEn
|
||||
: <a class="el" href="struct_x_dptx___link_config.html#a5f66296bd53c4639485c0443a20401e">XDptx_LinkConfig</a><li>SecondaryChEn
|
||||
: <a class="el" href="struct_x_dptx___config.html#76a6d413d59c2c6386a2dff120137cb9">XDptx_Config</a><li>SinkList
|
||||
: <a class="el" href="struct_x_dptx___topology.html#a2226d73d19995d01005a51b5a53f739">XDptx_Topology</a><li>SinkTotal
|
||||
: <a class="el" href="struct_x_dptx___topology.html#20702947b2076eb482876c65620e64ad">XDptx_Topology</a><li>StartOfMsgTransaction
|
||||
: <a class="el" href="struct_x_dptx___sideband_msg_header.html#8ed85ed1a26348f53358da7307400544">XDptx_SidebandMsgHeader</a><li>SupportDownspreadControl
|
||||
|
|
|
|||
|
|
@ -621,27 +621,27 @@ Here is a list of all file members with links to the files they belong to:
|
|||
: <a class="el" href="xdptx_8h.html#0cfe4355d8e2fa3e46be78c1800bb9d5">xdptx.h</a>, <a class="el" href="xdptx_8c.html#0cfe4355d8e2fa3e46be78c1800bb9d5">xdptx.c</a><li>XDptx_SetVideoMode()
|
||||
: <a class="el" href="xdptx__spm_8c.html#8c94639847747642864da0f053598cea">xdptx_spm.c</a>, <a class="el" href="xdptx_8h.html#8c94639847747642864da0f053598cea">xdptx.h</a><li>XDPTX_SOFT_RESET
|
||||
: <a class="el" href="xdptx__hw_8h.html#d67b688fb3c16c3aa74b8c6f5a6b4967">xdptx_hw.h</a><li>XDPTX_SOFT_RESET_AUX_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#a42b3c0d8bb96f522f7d3c1e16c1ba5d">xdptx_hw.h</a><li>XDPTX_SOFT_RESET_VIDEO_STREAM1_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#a42b3c0d8bb96f522f7d3c1e16c1ba5d">xdptx_hw.h</a><li>XDPTX_SOFT_RESET_VIDEO_STREAM0_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#6f3f8478479f93aeceb830a99019f93d">xdptx_hw.h</a><li>XDPTX_SOFT_RESET_VIDEO_STREAM1_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#037c22e295d3f8b26fcddff580293cc6">xdptx_hw.h</a><li>XDPTX_SOFT_RESET_VIDEO_STREAM2_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#974d191e058d55981244a170102bfb2a">xdptx_hw.h</a><li>XDPTX_SOFT_RESET_VIDEO_STREAM3_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#98c15ede26e0e404a68298f665693276">xdptx_hw.h</a><li>XDPTX_SOFT_RESET_VIDEO_STREAM4_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#7a9059fd1dedbcdd95831b97c8b8e4df">xdptx_hw.h</a><li>XDPTX_SOFT_RESET_VIDEO_STREAM_ALL_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#98c15ede26e0e404a68298f665693276">xdptx_hw.h</a><li>XDPTX_SOFT_RESET_VIDEO_STREAM_ALL_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#b3f82673e49bafb86e6200e25737e799">xdptx_hw.h</a><li>XDPTX_STREAM0
|
||||
: <a class="el" href="xdptx__hw_8h.html#192b3ac947426e2781f599d9aed2be57">xdptx_hw.h</a><li>XDPTX_STREAM1
|
||||
: <a class="el" href="xdptx__hw_8h.html#192b3ac947426e2781f599d9aed2be57">xdptx_hw.h</a><li>XDPTX_STREAM0_MSA_START
|
||||
: <a class="el" href="xdptx__hw_8h.html#33eff8cfa7b53743939c72041d557565">xdptx_hw.h</a><li>XDPTX_STREAM1
|
||||
: <a class="el" href="xdptx__hw_8h.html#3d5adff92f22f4916380275fcb78aca2">xdptx_hw.h</a><li>XDPTX_STREAM1_MSA_START
|
||||
: <a class="el" href="xdptx__hw_8h.html#26719c8b85fcca4dfb4d0b05b4ff830f">xdptx_hw.h</a><li>XDPTX_STREAM2
|
||||
: <a class="el" href="xdptx__hw_8h.html#26719c8b85fcca4dfb4d0b05b4ff830f">xdptx_hw.h</a><li>XDPTX_STREAM1_MSA_START_OFFSET
|
||||
: <a class="el" href="xdptx__hw_8h.html#ed6299b1813092499907e8591e30b355">xdptx_hw.h</a><li>XDPTX_STREAM2
|
||||
: <a class="el" href="xdptx__hw_8h.html#abbb86cc9a2f8bb9dae29262b6d60b2b">xdptx_hw.h</a><li>XDPTX_STREAM2_MSA_START
|
||||
: <a class="el" href="xdptx__hw_8h.html#1df5e69ad67f3cd189cec07e903f7a37">xdptx_hw.h</a><li>XDPTX_STREAM2_MSA_START_OFFSET
|
||||
: <a class="el" href="xdptx__hw_8h.html#c89aaeebe739017bb62da5f7fa83fb7f">xdptx_hw.h</a><li>XDPTX_STREAM3
|
||||
: <a class="el" href="xdptx__hw_8h.html#c9c2cc3ea5a63b843a362b6df260b8e5">xdptx_hw.h</a><li>XDPTX_STREAM3_MSA_START
|
||||
: <a class="el" href="xdptx__hw_8h.html#3051631e2a05018aa80a84c7e5fefbc6">xdptx_hw.h</a><li>XDPTX_STREAM3_MSA_START_OFFSET
|
||||
: <a class="el" href="xdptx__hw_8h.html#08cfbe233278a84564ce994a71bc278a">xdptx_hw.h</a><li>XDPTX_STREAM4_MSA_START
|
||||
: <a class="el" href="xdptx__hw_8h.html#f33541dae460d595f6cc804399632ac3">xdptx_hw.h</a><li>XDPTX_STREAM4_MSA_START_OFFSET
|
||||
: <a class="el" href="xdptx__hw_8h.html#afb94c79ee042aaf261c3028dfe230e2">xdptx_hw.h</a><li>XDPTX_STREAM_ID1
|
||||
: <a class="el" href="xdptx__hw_8h.html#08cfbe233278a84564ce994a71bc278a">xdptx_hw.h</a><li>XDPTX_STREAM_ID0
|
||||
: <a class="el" href="xdptx__hw_8h.html#3320db39117d4dc5a6bc4f95878cc7e2">xdptx_hw.h</a><li>XDPTX_STREAM_ID1
|
||||
: <a class="el" href="xdptx__hw_8h.html#811ba90677c59c67dca8e75145357ecd">xdptx_hw.h</a><li>XDPTX_STREAM_ID2
|
||||
: <a class="el" href="xdptx__hw_8h.html#56fa1ea197ef08a69c7df6eb0b230484">xdptx_hw.h</a><li>XDPTX_STREAM_ID3
|
||||
: <a class="el" href="xdptx__hw_8h.html#8de674862400c37ce9d7b58546755d2f">xdptx_hw.h</a><li>XDPTX_STREAM_ID4
|
||||
: <a class="el" href="xdptx__hw_8h.html#8d25af337e3880dc5478228ac344aba9">xdptx_hw.h</a><li>XDptx_TimerHandler
|
||||
: <a class="el" href="xdptx__hw_8h.html#8de674862400c37ce9d7b58546755d2f">xdptx_hw.h</a><li>XDptx_TimerHandler
|
||||
: <a class="el" href="xdptx_8h.html#c09d771f709e37e756d8de2ba627701f">xdptx.h</a><li>XDPTX_TRAINING_PATTERN_SET
|
||||
: <a class="el" href="xdptx__hw_8h.html#80266896bc3c68c7109deba44db4fcac">xdptx_hw.h</a><li>XDPTX_TRAINING_PATTERN_SET_OFF
|
||||
: <a class="el" href="xdptx__hw_8h.html#47a32150d890b4990105454f66661a7d">xdptx_hw.h</a><li>XDPTX_TRAINING_PATTERN_SET_TP1
|
||||
|
|
|
|||
|
|
@ -553,27 +553,27 @@
|
|||
: <a class="el" href="xdptx__hw_8h.html#e4f88c65a8b0756ac894afc0abdd17ce">xdptx_hw.h</a><li>XDPTX_SCRAMBLING_DISABLE
|
||||
: <a class="el" href="xdptx__hw_8h.html#245e3300cb64b18ae8b5a2c05a2726a5">xdptx_hw.h</a><li>XDPTX_SOFT_RESET
|
||||
: <a class="el" href="xdptx__hw_8h.html#d67b688fb3c16c3aa74b8c6f5a6b4967">xdptx_hw.h</a><li>XDPTX_SOFT_RESET_AUX_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#a42b3c0d8bb96f522f7d3c1e16c1ba5d">xdptx_hw.h</a><li>XDPTX_SOFT_RESET_VIDEO_STREAM1_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#a42b3c0d8bb96f522f7d3c1e16c1ba5d">xdptx_hw.h</a><li>XDPTX_SOFT_RESET_VIDEO_STREAM0_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#6f3f8478479f93aeceb830a99019f93d">xdptx_hw.h</a><li>XDPTX_SOFT_RESET_VIDEO_STREAM1_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#037c22e295d3f8b26fcddff580293cc6">xdptx_hw.h</a><li>XDPTX_SOFT_RESET_VIDEO_STREAM2_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#974d191e058d55981244a170102bfb2a">xdptx_hw.h</a><li>XDPTX_SOFT_RESET_VIDEO_STREAM3_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#98c15ede26e0e404a68298f665693276">xdptx_hw.h</a><li>XDPTX_SOFT_RESET_VIDEO_STREAM4_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#7a9059fd1dedbcdd95831b97c8b8e4df">xdptx_hw.h</a><li>XDPTX_SOFT_RESET_VIDEO_STREAM_ALL_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#98c15ede26e0e404a68298f665693276">xdptx_hw.h</a><li>XDPTX_SOFT_RESET_VIDEO_STREAM_ALL_MASK
|
||||
: <a class="el" href="xdptx__hw_8h.html#b3f82673e49bafb86e6200e25737e799">xdptx_hw.h</a><li>XDPTX_STREAM0
|
||||
: <a class="el" href="xdptx__hw_8h.html#192b3ac947426e2781f599d9aed2be57">xdptx_hw.h</a><li>XDPTX_STREAM1
|
||||
: <a class="el" href="xdptx__hw_8h.html#192b3ac947426e2781f599d9aed2be57">xdptx_hw.h</a><li>XDPTX_STREAM0_MSA_START
|
||||
: <a class="el" href="xdptx__hw_8h.html#33eff8cfa7b53743939c72041d557565">xdptx_hw.h</a><li>XDPTX_STREAM1
|
||||
: <a class="el" href="xdptx__hw_8h.html#3d5adff92f22f4916380275fcb78aca2">xdptx_hw.h</a><li>XDPTX_STREAM1_MSA_START
|
||||
: <a class="el" href="xdptx__hw_8h.html#26719c8b85fcca4dfb4d0b05b4ff830f">xdptx_hw.h</a><li>XDPTX_STREAM2
|
||||
: <a class="el" href="xdptx__hw_8h.html#26719c8b85fcca4dfb4d0b05b4ff830f">xdptx_hw.h</a><li>XDPTX_STREAM1_MSA_START_OFFSET
|
||||
: <a class="el" href="xdptx__hw_8h.html#ed6299b1813092499907e8591e30b355">xdptx_hw.h</a><li>XDPTX_STREAM2
|
||||
: <a class="el" href="xdptx__hw_8h.html#abbb86cc9a2f8bb9dae29262b6d60b2b">xdptx_hw.h</a><li>XDPTX_STREAM2_MSA_START
|
||||
: <a class="el" href="xdptx__hw_8h.html#1df5e69ad67f3cd189cec07e903f7a37">xdptx_hw.h</a><li>XDPTX_STREAM2_MSA_START_OFFSET
|
||||
: <a class="el" href="xdptx__hw_8h.html#c89aaeebe739017bb62da5f7fa83fb7f">xdptx_hw.h</a><li>XDPTX_STREAM3
|
||||
: <a class="el" href="xdptx__hw_8h.html#c9c2cc3ea5a63b843a362b6df260b8e5">xdptx_hw.h</a><li>XDPTX_STREAM3_MSA_START
|
||||
: <a class="el" href="xdptx__hw_8h.html#3051631e2a05018aa80a84c7e5fefbc6">xdptx_hw.h</a><li>XDPTX_STREAM3_MSA_START_OFFSET
|
||||
: <a class="el" href="xdptx__hw_8h.html#08cfbe233278a84564ce994a71bc278a">xdptx_hw.h</a><li>XDPTX_STREAM4_MSA_START
|
||||
: <a class="el" href="xdptx__hw_8h.html#f33541dae460d595f6cc804399632ac3">xdptx_hw.h</a><li>XDPTX_STREAM4_MSA_START_OFFSET
|
||||
: <a class="el" href="xdptx__hw_8h.html#afb94c79ee042aaf261c3028dfe230e2">xdptx_hw.h</a><li>XDPTX_STREAM_ID1
|
||||
: <a class="el" href="xdptx__hw_8h.html#08cfbe233278a84564ce994a71bc278a">xdptx_hw.h</a><li>XDPTX_STREAM_ID0
|
||||
: <a class="el" href="xdptx__hw_8h.html#3320db39117d4dc5a6bc4f95878cc7e2">xdptx_hw.h</a><li>XDPTX_STREAM_ID1
|
||||
: <a class="el" href="xdptx__hw_8h.html#811ba90677c59c67dca8e75145357ecd">xdptx_hw.h</a><li>XDPTX_STREAM_ID2
|
||||
: <a class="el" href="xdptx__hw_8h.html#56fa1ea197ef08a69c7df6eb0b230484">xdptx_hw.h</a><li>XDPTX_STREAM_ID3
|
||||
: <a class="el" href="xdptx__hw_8h.html#8de674862400c37ce9d7b58546755d2f">xdptx_hw.h</a><li>XDPTX_STREAM_ID4
|
||||
: <a class="el" href="xdptx__hw_8h.html#8d25af337e3880dc5478228ac344aba9">xdptx_hw.h</a><li>XDPTX_TRAINING_PATTERN_SET
|
||||
: <a class="el" href="xdptx__hw_8h.html#8de674862400c37ce9d7b58546755d2f">xdptx_hw.h</a><li>XDPTX_TRAINING_PATTERN_SET
|
||||
: <a class="el" href="xdptx__hw_8h.html#80266896bc3c68c7109deba44db4fcac">xdptx_hw.h</a><li>XDPTX_TRAINING_PATTERN_SET_OFF
|
||||
: <a class="el" href="xdptx__hw_8h.html#47a32150d890b4990105454f66661a7d">xdptx_hw.h</a><li>XDPTX_TRAINING_PATTERN_SET_TP1
|
||||
: <a class="el" href="xdptx__hw_8h.html#0028aec42575496731849818fd2dabfc">xdptx_hw.h</a><li>XDPTX_TRAINING_PATTERN_SET_TP2
|
||||
|
|
|
|||
|
|
@ -53,7 +53,7 @@ The driver does not handle audio. For an example as to how to configure and tran
|
|||
Asserts are used within all Xilinx drivers to enforce constraints on argument values. Asserts can be turned off on a system-wide basis by defining, at compile time, the NDEBUG identifier. By default, asserts are turned on and it is recommended that application developers leave asserts on during development.<p>
|
||||
<b>Limitations and known issues</b><p>
|
||||
<ul>
|
||||
<li>For MST mode to correctly display, the current version of the driver requires that each of the DisplayPort TX streams be allocated without skipping streams (i.e. assign stream 1, stream 2, and stream 3 - problems were experienced if skipping stream 2 and assigning stream 4 instead). skipping monitors in a daisy chain is OK as long as they are assigned to streams in order.</li><li>In MST mode, the current version of the driver does not support removal of an allocated stream from the virtual channel payload ID table without clearing the entire table.</li><li>Some sideband messages have not been implemented in the current version of the driver for MST mode. Notable, reception of a CONNECTION_STATUS_NOTIFY sideband message.</li><li>Some monitors required a power cycle for all streams to come up at certain resolutions (outside of the 1080p and UHD/2 resolutions) during testing. Different resolutions for different streams were not tested. This will be investigated for the next SDK release.</li><li>The driver does not handle audio. See the audio example in the driver examples directory for the required sequence for enabling audio.</li></ul>
|
||||
<li>For MST mode to correctly display, the current version of the driver requires that each of the DisplayPort TX streams be allocated without skipping streams (i.e. assign stream 1, stream 2, and stream 3 - problems were experienced if skipping stream 2 and assigning stream 4 instead). skipping monitors in a daisy chain is OK as long as they are assigned to streams in order.</li><li>In MST mode, the current version of the driver does not support removal of an allocated stream from the virtual channel payload ID table without clearing the entire table.</li><li>Some sideband messages have not been implemented in the current version of the driver for MST mode. Notable, reception of a CONNECTION_STATUS_NOTIFY sideband message.</li><li>Some monitors required a power cycle for all streams to come up at certain resolutions (outside of the 1080p and UHD/2 resolutions) during testing. Different resolutions for different streams were not tested. This will be investigated for the next SDK release.</li><li>The driver does not handle audio. See the audio example in the driver examples directory for the required sequence for enabling audio.</li><li>Limited testing was done with 4-byte GT data width.</li><li>Most testing was done on a KC705 board. Some testing was done on a ZC706 board, mostly with a 2-byte GT data width configuration.</li></ul>
|
||||
<p>
|
||||
<dl compact><dt><b>Note:</b></dt><dd>For a 5.4Gbps link rate, a high performance 7 series FPGA is required with a speed grade of -2 or -3.</dd></dl>
|
||||
<pre>
|
||||
|
|
|
|||
|
|
@ -22,6 +22,7 @@
|
|||
<li><a href="functions.html"><span>Class Members</span></a></li>
|
||||
</ul></div>
|
||||
<h1>XDptx Member List</h1>This is the complete list of members for <a class="el" href="struct_x_dptx.html">XDptx</a>, including all inherited members.<p><table>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx.html#cb98c8c35b97020fe4767c2b174af54b">AuxDelayUs</a></td><td><a class="el" href="struct_x_dptx.html">XDptx</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx.html#8dae945757783a68a8106615b59f65c0">BoardChar</a></td><td><a class="el" href="struct_x_dptx.html">XDptx</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx.html#af511bfd6dc96881ff13802a8cc10722">Config</a></td><td><a class="el" href="struct_x_dptx.html">XDptx</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx.html#c27591bcf8d7e13e7b3fdbeb1f968c63">HpdEventCallbackRef</a></td><td><a class="el" href="struct_x_dptx.html">XDptx</a></td><td></td></tr>
|
||||
|
|
@ -34,6 +35,7 @@
|
|||
<tr class="memlist"><td><a class="el" href="struct_x_dptx.html#65244ac7460329fff6b94cb8fc022670">MstEnable</a></td><td><a class="el" href="struct_x_dptx.html">XDptx</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx.html#02c88b01b932312a848aee2c01f1a0b6">MstStreamConfig</a></td><td><a class="el" href="struct_x_dptx.html">XDptx</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx.html#939b973272c6b24c902ea836517440b2">RxConfig</a></td><td><a class="el" href="struct_x_dptx.html">XDptx</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx.html#f85b7947bcf05b3a71ad5d27eb746520">SbMsgDelayUs</a></td><td><a class="el" href="struct_x_dptx.html">XDptx</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx.html#913434506922a73af175516ef84ba126">Topology</a></td><td><a class="el" href="struct_x_dptx.html">XDptx</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx.html#cec7536fbd35b65e8ef4bba747753408">TrainAdaptive</a></td><td><a class="el" href="struct_x_dptx.html">XDptx</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx.html#fbdd98ca9563d3f2fc595ea2d6f6053b">UserTimerPtr</a></td><td><a class="el" href="struct_x_dptx.html">XDptx</a></td><td></td></tr>
|
||||
|
|
|
|||
|
|
@ -49,6 +49,10 @@ The <a class="el" href="struct_x_dptx.html">XDptx</a> driver instance data. The
|
|||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="el" href="struct_x_dptx___topology.html">XDptx_Topology</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx.html#913434506922a73af175516ef84ba126">Topology</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx.html#cb98c8c35b97020fe4767c2b174af54b">AuxDelayUs</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u32 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx.html#f85b7947bcf05b3a71ad5d27eb746520">SbMsgDelayUs</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="el" href="xdptx_8h.html#c09d771f709e37e756d8de2ba627701f">XDptx_TimerHandler</a> </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx.html#67a7c4a7e698ddb155ceaccbf196e82d">UserTimerWaitUs</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">void * </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx.html#fbdd98ca9563d3f2fc595ea2d6f6053b">UserTimerPtr</a></td></tr>
|
||||
|
|
@ -63,6 +67,21 @@ The <a class="el" href="struct_x_dptx.html">XDptx</a> driver instance data. The
|
|||
|
||||
</table>
|
||||
<hr><h2>Member Data Documentation</h2>
|
||||
<a class="anchor" name="cb98c8c35b97020fe4767c2b174af54b"></a><!-- doxytag: member="XDptx::AuxDelayUs" ref="cb98c8c35b97020fe4767c2b174af54b" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u32 <a class="el" href="struct_x_dptx.html#cb98c8c35b97020fe4767c2b174af54b">XDptx::AuxDelayUs</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Amount of latency in micro- seconds to use between AUX transactions.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="8dae945757783a68a8106615b59f65c0"></a><!-- doxytag: member="XDptx::BoardChar" ref="8dae945757783a68a8106615b59f65c0" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
|
|
@ -243,6 +262,21 @@ Configuration structure for a multi-stream transport (MST) stream.
|
|||
Configuration structure for the RX device.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="f85b7947bcf05b3a71ad5d27eb746520"></a><!-- doxytag: member="XDptx::SbMsgDelayUs" ref="f85b7947bcf05b3a71ad5d27eb746520" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u32 <a class="el" href="struct_x_dptx.html#f85b7947bcf05b3a71ad5d27eb746520">XDptx::SbMsgDelayUs</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Amount of latency in micro- seconds to use between sideband messages for multi-stream transport (MST) mode.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="913434506922a73af175516ef84ba126"></a><!-- doxytag: member="XDptx::Topology" ref="913434506922a73af175516ef84ba126" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
|
|
|
|||
|
|
@ -24,12 +24,18 @@
|
|||
<h1>XDptx_Config Member List</h1>This is the complete list of members for <a class="el" href="struct_x_dptx___config.html">XDptx_Config</a>, including all inherited members.<p><table>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___config.html#86d96e1a1ac8550e941d43ffeee25a81">BaseAddr</a></td><td><a class="el" href="struct_x_dptx___config.html">XDptx_Config</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___config.html#70a0f6a8bd4f9e8a200be435d89063c1">DeviceId</a></td><td><a class="el" href="struct_x_dptx___config.html">XDptx_Config</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___config.html#26c90c8cdf918c870e7aff75a976e832">DpProtocol</a></td><td><a class="el" href="struct_x_dptx___config.html">XDptx_Config</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___config.html#6f12c22e02f63866b778271799411fcf">DualPixelEn</a></td><td><a class="el" href="struct_x_dptx___config.html">XDptx_Config</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___config.html#942cbb0213b9727931c2e0a43a5498a4">MaxBitsPerColor</a></td><td><a class="el" href="struct_x_dptx___config.html">XDptx_Config</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___config.html#07c3b796a735220333fd3ac017edf23e">MaxLaneCount</a></td><td><a class="el" href="struct_x_dptx___config.html">XDptx_Config</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___config.html#68a7554cc20c1dbd895a166bd13412e5">MaxLinkRate</a></td><td><a class="el" href="struct_x_dptx___config.html">XDptx_Config</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___config.html#df88f4ab48c55bacd7bc4f55acafd54e">MstSupport</a></td><td><a class="el" href="struct_x_dptx___config.html">XDptx_Config</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___config.html#8d1a62f2b08a183d3837151b3a01c79a">NumAudioChs</a></td><td><a class="el" href="struct_x_dptx___config.html">XDptx_Config</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___config.html#d61517af6e6ef03007a5efdef39de756">NumMstStreams</a></td><td><a class="el" href="struct_x_dptx___config.html">XDptx_Config</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___config.html#d7c3a428223bc15b333f49a099ea0149">PayloadDataWidth</a></td><td><a class="el" href="struct_x_dptx___config.html">XDptx_Config</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___config.html#df2eea4130c268436028df2cbf5357e8">QuadPixelEn</a></td><td><a class="el" href="struct_x_dptx___config.html">XDptx_Config</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___config.html#1e9e27ea68e4b36fb2ede842c77e94c1">SAxiClkHz</a></td><td><a class="el" href="struct_x_dptx___config.html">XDptx_Config</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___config.html#76a6d413d59c2c6386a2dff120137cb9">SecondaryChEn</a></td><td><a class="el" href="struct_x_dptx___config.html">XDptx_Config</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___config.html#1fa10c843358db42acdb3d5d14cecdec">YCrCbEn</a></td><td><a class="el" href="struct_x_dptx___config.html">XDptx_Config</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___config.html#99330a915a6ffaf0122ffd6d835175f9">YOnlyEn</a></td><td><a class="el" href="struct_x_dptx___config.html">XDptx_Config</a></td><td></td></tr>
|
||||
</table>Copyright @ 1995-2014 Xilinx, Inc. All rights reserved.
|
||||
|
|
|
|||
|
|
@ -45,9 +45,21 @@ This typedef contains configuration information for the DisplayPort TX core.
|
|||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___config.html#6f12c22e02f63866b778271799411fcf">DualPixelEn</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___config.html#1fa10c843358db42acdb3d5d14cecdec">YCrCbEn</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___config.html#99330a915a6ffaf0122ffd6d835175f9">YOnlyEn</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___config.html#1fa10c843358db42acdb3d5d14cecdec">YCrCbEn</a></td></tr>
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___config.html#d7c3a428223bc15b333f49a099ea0149">PayloadDataWidth</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___config.html#76a6d413d59c2c6386a2dff120137cb9">SecondaryChEn</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___config.html#8d1a62f2b08a183d3837151b3a01c79a">NumAudioChs</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___config.html#df88f4ab48c55bacd7bc4f55acafd54e">MstSupport</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___config.html#d61517af6e6ef03007a5efdef39de756">NumMstStreams</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___config.html#26c90c8cdf918c870e7aff75a976e832">DpProtocol</a></td></tr>
|
||||
|
||||
</table>
|
||||
<hr><h2>Member Data Documentation</h2>
|
||||
|
|
@ -63,7 +75,7 @@ This typedef contains configuration information for the DisplayPort TX core.
|
|||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
The base address of the core.
|
||||
The base address of the core instance.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="70a0f6a8bd4f9e8a200be435d89063c1"></a><!-- doxytag: member="XDptx_Config::DeviceId" ref="70a0f6a8bd4f9e8a200be435d89063c1" args="" -->
|
||||
|
|
@ -81,6 +93,21 @@ The base address of the core.
|
|||
Device instance ID.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="26c90c8cdf918c870e7aff75a976e832"></a><!-- doxytag: member="XDptx_Config::DpProtocol" ref="26c90c8cdf918c870e7aff75a976e832" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___config.html#26c90c8cdf918c870e7aff75a976e832">XDptx_Config::DpProtocol</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
The DisplayPort protocol version that this core instance is configured for. 0 = v1.1a, 1 = v1.2.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="6f12c22e02f63866b778271799411fcf"></a><!-- doxytag: member="XDptx_Config::DualPixelEn" ref="6f12c22e02f63866b778271799411fcf" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
|
|
@ -93,7 +120,7 @@ Device instance ID.
|
|||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Dual pixel support by this core's instance.
|
||||
Dual pixel support by this core instance.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="942cbb0213b9727931c2e0a43a5498a4"></a><!-- doxytag: member="XDptx_Config::MaxBitsPerColor" ref="942cbb0213b9727931c2e0a43a5498a4" args="" -->
|
||||
|
|
@ -108,7 +135,7 @@ Dual pixel support by this core's instance.
|
|||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
The maximum bits/color supported by this core's instance
|
||||
The maximum bits/color supported by this core instance
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="07c3b796a735220333fd3ac017edf23e"></a><!-- doxytag: member="XDptx_Config::MaxLaneCount" ref="07c3b796a735220333fd3ac017edf23e" args="" -->
|
||||
|
|
@ -123,7 +150,7 @@ The maximum bits/color supported by this core's instance
|
|||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
The maximum lane count supported by this core's instance.
|
||||
The maximum lane count supported by this core instance.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="68a7554cc20c1dbd895a166bd13412e5"></a><!-- doxytag: member="XDptx_Config::MaxLinkRate" ref="68a7554cc20c1dbd895a166bd13412e5" args="" -->
|
||||
|
|
@ -138,7 +165,67 @@ The maximum lane count supported by this core's instance.
|
|||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
The maximum link rate supported by this core's instance.
|
||||
The maximum link rate supported by this core instance.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="df88f4ab48c55bacd7bc4f55acafd54e"></a><!-- doxytag: member="XDptx_Config::MstSupport" ref="df88f4ab48c55bacd7bc4f55acafd54e" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___config.html#df88f4ab48c55bacd7bc4f55acafd54e">XDptx_Config::MstSupport</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Multi-stream transport (MST) mode is enabled by this core instance.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="8d1a62f2b08a183d3837151b3a01c79a"></a><!-- doxytag: member="XDptx_Config::NumAudioChs" ref="8d1a62f2b08a183d3837151b3a01c79a" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___config.html#8d1a62f2b08a183d3837151b3a01c79a">XDptx_Config::NumAudioChs</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
The number of audio channels supported by this core instance.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="d61517af6e6ef03007a5efdef39de756"></a><!-- doxytag: member="XDptx_Config::NumMstStreams" ref="d61517af6e6ef03007a5efdef39de756" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___config.html#d61517af6e6ef03007a5efdef39de756">XDptx_Config::NumMstStreams</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
The total number of MST streams supported by this core instance.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="d7c3a428223bc15b333f49a099ea0149"></a><!-- doxytag: member="XDptx_Config::PayloadDataWidth" ref="d7c3a428223bc15b333f49a099ea0149" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___config.html#d7c3a428223bc15b333f49a099ea0149">XDptx_Config::PayloadDataWidth</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
The payload data width used by this core instance.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="df2eea4130c268436028df2cbf5357e8"></a><!-- doxytag: member="XDptx_Config::QuadPixelEn" ref="df2eea4130c268436028df2cbf5357e8" args="" -->
|
||||
|
|
@ -153,7 +240,7 @@ The maximum link rate supported by this core's instance.
|
|||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Quad pixel support by this core's instance.
|
||||
Quad pixel support by this core instance.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="1e9e27ea68e4b36fb2ede842c77e94c1"></a><!-- doxytag: member="XDptx_Config::SAxiClkHz" ref="1e9e27ea68e4b36fb2ede842c77e94c1" args="" -->
|
||||
|
|
@ -168,7 +255,22 @@ Quad pixel support by this core's instance.
|
|||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
The clock frequency of the core's S_AXI_ACLK port.
|
||||
The clock frequency of the core instance's S_AXI_ACLK port.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="76a6d413d59c2c6386a2dff120137cb9"></a><!-- doxytag: member="XDptx_Config::SecondaryChEn" ref="76a6d413d59c2c6386a2dff120137cb9" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___config.html#76a6d413d59c2c6386a2dff120137cb9">XDptx_Config::SecondaryChEn</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
This core instance supports audio packets being sent by the secondary channel.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="1fa10c843358db42acdb3d5d14cecdec"></a><!-- doxytag: member="XDptx_Config::YCrCbEn" ref="1fa10c843358db42acdb3d5d14cecdec" args="" -->
|
||||
|
|
@ -183,7 +285,7 @@ The clock frequency of the core's S_AXI_ACLK port.
|
|||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
YCrCb format support by this core's instance.
|
||||
YCrCb format support by this core instance.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="99330a915a6ffaf0122ffd6d835175f9"></a><!-- doxytag: member="XDptx_Config::YOnlyEn" ref="99330a915a6ffaf0122ffd6d835175f9" args="" -->
|
||||
|
|
@ -198,7 +300,7 @@ YCrCb format support by this core's instance.
|
|||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
YOnly format support by this core's instance.
|
||||
YOnly format support by this core instance.
|
||||
</div>
|
||||
</div><p>
|
||||
<hr>The documentation for this struct was generated from the following file:<ul>
|
||||
|
|
|
|||
|
|
@ -34,6 +34,7 @@
|
|||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___main_stream_attributes.html#74c3b27ea26a995099b9c553a95448d7">Misc0</a></td><td><a class="el" href="struct_x_dptx___main_stream_attributes.html">XDptx_MainStreamAttributes</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___main_stream_attributes.html#fc4b4810eeb51976a1d823f7657de5b6">Misc1</a></td><td><a class="el" href="struct_x_dptx___main_stream_attributes.html">XDptx_MainStreamAttributes</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___main_stream_attributes.html#00f936032f44f8e35bbc3e8f0c97df27">NVid</a></td><td><a class="el" href="struct_x_dptx___main_stream_attributes.html">XDptx_MainStreamAttributes</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___main_stream_attributes.html#d81b60fc9d135ee303bf6994dfb0815c">OverrideUserPixelWidth</a></td><td><a class="el" href="struct_x_dptx___main_stream_attributes.html">XDptx_MainStreamAttributes</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___main_stream_attributes.html#8f1bf059e425e5775aaa2cb174ebae62">SynchronousClockMode</a></td><td><a class="el" href="struct_x_dptx___main_stream_attributes.html">XDptx_MainStreamAttributes</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___main_stream_attributes.html#10c82634ac61f63dec83f31021a06eb8">TransferUnitSize</a></td><td><a class="el" href="struct_x_dptx___main_stream_attributes.html">XDptx_MainStreamAttributes</a></td><td></td></tr>
|
||||
<tr class="memlist"><td><a class="el" href="struct_x_dptx___main_stream_attributes.html#2b16ea06932fbfc603cde7bf08bf8fe3">UserPixelWidth</a></td><td><a class="el" href="struct_x_dptx___main_stream_attributes.html">XDptx_MainStreamAttributes</a></td><td></td></tr>
|
||||
|
|
|
|||
|
|
@ -65,6 +65,8 @@ This typedef contains the main stream attributes which determine how the video w
|
|||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___main_stream_attributes.html#8f1bf059e425e5775aaa2cb174ebae62">SynchronousClockMode</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">u8 </td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dptx___main_stream_attributes.html#d81b60fc9d135ee303bf6994dfb0815c">OverrideUserPixelWidth</a></td></tr>
|
||||
|
||||
</table>
|
||||
<hr><h2>Member Data Documentation</h2>
|
||||
<a class="anchor" name="0d59bf49718427457d95694ecfaf5dcd"></a><!-- doxytag: member="XDptx_MainStreamAttributes::AvgBytesPerTU" ref="0d59bf49718427457d95694ecfaf5dcd" args="" -->
|
||||
|
|
@ -247,6 +249,21 @@ Miscellaneous stream attributes 1 as specified by the DisplayPort 1.2 specificat
|
|||
N value for the video stream.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="d81b60fc9d135ee303bf6994dfb0815c"></a><!-- doxytag: member="XDptx_MainStreamAttributes::OverrideUserPixelWidth" ref="d81b60fc9d135ee303bf6994dfb0815c" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">u8 <a class="el" href="struct_x_dptx___main_stream_attributes.html#d81b60fc9d135ee303bf6994dfb0815c">XDptx_MainStreamAttributes::OverrideUserPixelWidth</a> </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
If set to 1, the value stored for UserPixelWidth will be used as the pixel width.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="8f1bf059e425e5775aaa2cb174ebae62"></a><!-- doxytag: member="XDptx_MainStreamAttributes::SynchronousClockMode" ref="8f1bf059e425e5775aaa2cb174ebae62" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
|
|
|
|||
|
|
@ -98,8 +98,8 @@ This header file contains the identifiers and low-level driver functions (or mac
|
|||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="xdptx__hw_8h.html#17f41514d28ecba0cd98d2e3605c725c">XDPTX_HPD_DURATION</a> 0x0150</td></tr>
|
||||
|
||||
<tr><td colspan="2"><br><h2>DPTX core registers: Main stream attributes for SST / MST STREAM1.</h2></td></tr>
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="xdptx__hw_8h.html#26719c8b85fcca4dfb4d0b05b4ff830f">XDPTX_STREAM1_MSA_START</a> 0x0180</td></tr>
|
||||
<tr><td colspan="2"><br><h2>DPTX core registers: Main stream attributes for SST / MST STREAM0.</h2></td></tr>
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="xdptx__hw_8h.html#33eff8cfa7b53743939c72041d557565">XDPTX_STREAM0_MSA_START</a> 0x0180</td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="xdptx__hw_8h.html#71148ad51c2dcde442f3661ac23b1c8a">XDPTX_MAIN_STREAM_HTOTAL</a> 0x0180</td></tr>
|
||||
|
||||
|
|
@ -203,19 +203,19 @@ This header file contains the identifiers and low-level driver functions (or mac
|
|||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="xdptx__hw_8h.html#212b5791abb835f33378baa4ec18b421">XDPTX_TX_AUDIO_EXT_DATA</a> 0x0330</td></tr>
|
||||
|
||||
<tr><td colspan="2"><br><h2>DPTX core registers: Main stream attributes for MST STREAM2, 3, and 4.</h2></td></tr>
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="xdptx__hw_8h.html#1df5e69ad67f3cd189cec07e903f7a37">XDPTX_STREAM2_MSA_START</a> 0x0500</td></tr>
|
||||
<tr><td colspan="2"><br><h2>DPTX core registers: Main stream attributes for MST STREAM1, 2, and 3.</h2></td></tr>
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="xdptx__hw_8h.html#26719c8b85fcca4dfb4d0b05b4ff830f">XDPTX_STREAM1_MSA_START</a> 0x0500</td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="xdptx__hw_8h.html#ed6299b1813092499907e8591e30b355">XDPTX_STREAM1_MSA_START_OFFSET</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="xdptx__hw_8h.html#1df5e69ad67f3cd189cec07e903f7a37">XDPTX_STREAM2_MSA_START</a> 0x0550</td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="xdptx__hw_8h.html#c89aaeebe739017bb62da5f7fa83fb7f">XDPTX_STREAM2_MSA_START_OFFSET</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="xdptx__hw_8h.html#3051631e2a05018aa80a84c7e5fefbc6">XDPTX_STREAM3_MSA_START</a> 0x0550</td></tr>
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="xdptx__hw_8h.html#3051631e2a05018aa80a84c7e5fefbc6">XDPTX_STREAM3_MSA_START</a> 0x05A0</td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="xdptx__hw_8h.html#08cfbe233278a84564ce994a71bc278a">XDPTX_STREAM3_MSA_START_OFFSET</a></td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="xdptx__hw_8h.html#f33541dae460d595f6cc804399632ac3">XDPTX_STREAM4_MSA_START</a> 0x05A0</td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="xdptx__hw_8h.html#afb94c79ee042aaf261c3028dfe230e2">XDPTX_STREAM4_MSA_START_OFFSET</a></td></tr>
|
||||
|
||||
<tr><td colspan="2"><br><h2>DPTX core masks, shifts, and register values.</h2></td></tr>
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="xdptx__hw_8h.html#454eb694a138971aaa149fef42d861ab">XDPTX_LINK_BW_SET_162GBPS</a> 0x06</td></tr>
|
||||
|
||||
|
|
@ -245,13 +245,13 @@ This header file contains the identifiers and low-level driver functions (or mac
|
|||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="xdptx__hw_8h.html#e2e63c51f29bff2ce1254d5ca84ec9d8">XDPTX_LINK_QUAL_PATTERN_SET_PRBS7</a> 0x3</td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="xdptx__hw_8h.html#037c22e295d3f8b26fcddff580293cc6">XDPTX_SOFT_RESET_VIDEO_STREAM1_MASK</a> 0x00000001</td></tr>
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="xdptx__hw_8h.html#6f3f8478479f93aeceb830a99019f93d">XDPTX_SOFT_RESET_VIDEO_STREAM0_MASK</a> 0x00000001</td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="xdptx__hw_8h.html#974d191e058d55981244a170102bfb2a">XDPTX_SOFT_RESET_VIDEO_STREAM2_MASK</a> 0x00000002</td></tr>
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="xdptx__hw_8h.html#037c22e295d3f8b26fcddff580293cc6">XDPTX_SOFT_RESET_VIDEO_STREAM1_MASK</a> 0x00000002</td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="xdptx__hw_8h.html#98c15ede26e0e404a68298f665693276">XDPTX_SOFT_RESET_VIDEO_STREAM3_MASK</a> 0x00000004</td></tr>
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="xdptx__hw_8h.html#974d191e058d55981244a170102bfb2a">XDPTX_SOFT_RESET_VIDEO_STREAM2_MASK</a> 0x00000004</td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="xdptx__hw_8h.html#7a9059fd1dedbcdd95831b97c8b8e4df">XDPTX_SOFT_RESET_VIDEO_STREAM4_MASK</a> 0x00000008</td></tr>
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="xdptx__hw_8h.html#98c15ede26e0e404a68298f665693276">XDPTX_SOFT_RESET_VIDEO_STREAM3_MASK</a> 0x00000008</td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="xdptx__hw_8h.html#a42b3c0d8bb96f522f7d3c1e16c1ba5d">XDPTX_SOFT_RESET_AUX_MASK</a> 0x00000080</td></tr>
|
||||
|
||||
|
|
@ -1155,14 +1155,14 @@ This header file contains the identifiers and low-level driver functions (or mac
|
|||
<tr><td class="memItemLeft" nowrap align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="xdptx__hw_8h.html#7a8f4fccb4432d3ba0a8d52cbfb373af">XDPTX_EDID_DTD_SIGNAL_VPOLARITY_SHIFT</a> 2</td></tr>
|
||||
|
||||
<tr><td colspan="2"><br><h2>Stream identification.</h2></td></tr>
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="xdptx__hw_8h.html#3320db39117d4dc5a6bc4f95878cc7e2">XDPTX_STREAM_ID0</a> 0</td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="xdptx__hw_8h.html#811ba90677c59c67dca8e75145357ecd">XDPTX_STREAM_ID1</a> 1</td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="xdptx__hw_8h.html#56fa1ea197ef08a69c7df6eb0b230484">XDPTX_STREAM_ID2</a> 2</td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="xdptx__hw_8h.html#8de674862400c37ce9d7b58546755d2f">XDPTX_STREAM_ID3</a> 3</td></tr>
|
||||
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="xdptx__hw_8h.html#8d25af337e3880dc5478228ac344aba9">XDPTX_STREAM_ID4</a> 4</td></tr>
|
||||
|
||||
<tr><td colspan="2"><br><h2>Sideband message codes when the driver is in MST mode.</h2></td></tr>
|
||||
<tr><td class="memItemLeft" nowrap align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="xdptx__hw_8h.html#b1867ff8828f2a9a0dce425819b55312">XDPTX_SBMSG_LINK_ADDRESS</a> 0x01</td></tr>
|
||||
|
||||
|
|
@ -8794,12 +8794,27 @@ Software reset.
|
|||
Reset AUX logic.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="6f3f8478479f93aeceb830a99019f93d"></a><!-- doxytag: member="xdptx_hw.h::XDPTX_SOFT_RESET_VIDEO_STREAM0_MASK" ref="6f3f8478479f93aeceb830a99019f93d" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">#define XDPTX_SOFT_RESET_VIDEO_STREAM0_MASK 0x00000001 </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Reset video logic.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="037c22e295d3f8b26fcddff580293cc6"></a><!-- doxytag: member="xdptx_hw.h::XDPTX_SOFT_RESET_VIDEO_STREAM1_MASK" ref="037c22e295d3f8b26fcddff580293cc6" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">#define XDPTX_SOFT_RESET_VIDEO_STREAM1_MASK 0x00000001 </td>
|
||||
<td class="memname">#define XDPTX_SOFT_RESET_VIDEO_STREAM1_MASK 0x00000002 </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
|
|
@ -8814,7 +8829,7 @@ Reset video logic.
|
|||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">#define XDPTX_SOFT_RESET_VIDEO_STREAM2_MASK 0x00000002 </td>
|
||||
<td class="memname">#define XDPTX_SOFT_RESET_VIDEO_STREAM2_MASK 0x00000004 </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
|
|
@ -8829,22 +8844,7 @@ Reset video logic.
|
|||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">#define XDPTX_SOFT_RESET_VIDEO_STREAM3_MASK 0x00000004 </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Reset video logic.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="7a9059fd1dedbcdd95831b97c8b8e4df"></a><!-- doxytag: member="xdptx_hw.h::XDPTX_SOFT_RESET_VIDEO_STREAM4_MASK" ref="7a9059fd1dedbcdd95831b97c8b8e4df" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">#define XDPTX_SOFT_RESET_VIDEO_STREAM4_MASK 0x00000008 </td>
|
||||
<td class="memname">#define XDPTX_SOFT_RESET_VIDEO_STREAM3_MASK 0x00000008 </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
|
|
@ -8884,6 +8884,21 @@ Reset video logic for all streams.
|
|||
Average stream symbol timeslots per MTP config.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="33eff8cfa7b53743939c72041d557565"></a><!-- doxytag: member="xdptx_hw.h::XDPTX_STREAM0_MSA_START" ref="33eff8cfa7b53743939c72041d557565" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">#define XDPTX_STREAM0_MSA_START 0x0180 </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Start of the MSA registers for stream 0.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="3d5adff92f22f4916380275fcb78aca2"></a><!-- doxytag: member="xdptx_hw.h::XDPTX_STREAM1" ref="3d5adff92f22f4916380275fcb78aca2" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
|
|
@ -8904,7 +8919,7 @@ Average stream symbol timeslots per MTP config.
|
|||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">#define XDPTX_STREAM1_MSA_START 0x0180 </td>
|
||||
<td class="memname">#define XDPTX_STREAM1_MSA_START 0x0500 </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
|
|
@ -8914,6 +8929,23 @@ Average stream symbol timeslots per MTP config.
|
|||
Start of the MSA registers for stream 1.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="ed6299b1813092499907e8591e30b355"></a><!-- doxytag: member="xdptx_hw.h::XDPTX_STREAM1_MSA_START_OFFSET" ref="ed6299b1813092499907e8591e30b355" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">#define XDPTX_STREAM1_MSA_START_OFFSET </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
<b>Value:</b><div class="fragment"><pre class="fragment">(<a class="code" href="xdptx__hw_8h.html#26719c8b85fcca4dfb4d0b05b4ff830f">XDPTX_STREAM1_MSA_START</a> - \
|
||||
<a class="code" href="xdptx__hw_8h.html#33eff8cfa7b53743939c72041d557565">XDPTX_STREAM0_MSA_START</a>)
|
||||
</pre></div>The MSA registers for stream 1 are at an offset from the corresponding registers of stream 0.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="abbb86cc9a2f8bb9dae29262b6d60b2b"></a><!-- doxytag: member="xdptx_hw.h::XDPTX_STREAM2" ref="abbb86cc9a2f8bb9dae29262b6d60b2b" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
|
|
@ -8934,7 +8966,7 @@ Average stream symbol timeslots per MTP config.
|
|||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">#define XDPTX_STREAM2_MSA_START 0x0500 </td>
|
||||
<td class="memname">#define XDPTX_STREAM2_MSA_START 0x0550 </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
|
|
@ -8957,8 +8989,8 @@ Start of the MSA registers for stream 2.
|
|||
|
||||
<p>
|
||||
<b>Value:</b><div class="fragment"><pre class="fragment">(<a class="code" href="xdptx__hw_8h.html#1df5e69ad67f3cd189cec07e903f7a37">XDPTX_STREAM2_MSA_START</a> - \
|
||||
<a class="code" href="xdptx__hw_8h.html#26719c8b85fcca4dfb4d0b05b4ff830f">XDPTX_STREAM1_MSA_START</a>)
|
||||
</pre></div>The MSA registers for stream 2 are at an offset from the corresponding registers of stream 1.
|
||||
<a class="code" href="xdptx__hw_8h.html#33eff8cfa7b53743939c72041d557565">XDPTX_STREAM0_MSA_START</a>)
|
||||
</pre></div>The MSA registers for stream 2 are at an offset from the corresponding registers of stream 0.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="c9c2cc3ea5a63b843a362b6df260b8e5"></a><!-- doxytag: member="xdptx_hw.h::XDPTX_STREAM3" ref="c9c2cc3ea5a63b843a362b6df260b8e5" args="" -->
|
||||
|
|
@ -8981,7 +9013,7 @@ Average stream symbol timeslots per MTP config.
|
|||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">#define XDPTX_STREAM3_MSA_START 0x0550 </td>
|
||||
<td class="memname">#define XDPTX_STREAM3_MSA_START 0x05A0 </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
|
|
@ -9004,40 +9036,23 @@ Start of the MSA registers for stream 3.
|
|||
|
||||
<p>
|
||||
<b>Value:</b><div class="fragment"><pre class="fragment">(<a class="code" href="xdptx__hw_8h.html#3051631e2a05018aa80a84c7e5fefbc6">XDPTX_STREAM3_MSA_START</a> - \
|
||||
<a class="code" href="xdptx__hw_8h.html#26719c8b85fcca4dfb4d0b05b4ff830f">XDPTX_STREAM1_MSA_START</a>)
|
||||
</pre></div>The MSA registers for stream 3 are at an offset from the corresponding registers of stream 1.
|
||||
<a class="code" href="xdptx__hw_8h.html#33eff8cfa7b53743939c72041d557565">XDPTX_STREAM0_MSA_START</a>)
|
||||
</pre></div>The MSA registers for stream 3 are at an offset from the corresponding registers of stream 0.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="f33541dae460d595f6cc804399632ac3"></a><!-- doxytag: member="xdptx_hw.h::XDPTX_STREAM4_MSA_START" ref="f33541dae460d595f6cc804399632ac3" args="" -->
|
||||
<a class="anchor" name="3320db39117d4dc5a6bc4f95878cc7e2"></a><!-- doxytag: member="xdptx_hw.h::XDPTX_STREAM_ID0" ref="3320db39117d4dc5a6bc4f95878cc7e2" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">#define XDPTX_STREAM4_MSA_START 0x05A0 </td>
|
||||
<td class="memname">#define XDPTX_STREAM_ID0 0 </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
Start of the MSA registers for stream 4.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="afb94c79ee042aaf261c3028dfe230e2"></a><!-- doxytag: member="xdptx_hw.h::XDPTX_STREAM4_MSA_START_OFFSET" ref="afb94c79ee042aaf261c3028dfe230e2" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">#define XDPTX_STREAM4_MSA_START_OFFSET </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
<b>Value:</b><div class="fragment"><pre class="fragment">(<a class="code" href="xdptx__hw_8h.html#f33541dae460d595f6cc804399632ac3">XDPTX_STREAM4_MSA_START</a> - \
|
||||
<a class="code" href="xdptx__hw_8h.html#26719c8b85fcca4dfb4d0b05b4ff830f">XDPTX_STREAM1_MSA_START</a>)
|
||||
</pre></div>The MSA registers for stream 4 are at an offset from the corresponding registers of stream 1.
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="811ba90677c59c67dca8e75145357ecd"></a><!-- doxytag: member="xdptx_hw.h::XDPTX_STREAM_ID1" ref="811ba90677c59c67dca8e75145357ecd" args="" -->
|
||||
|
|
@ -9083,21 +9098,6 @@ Start of the MSA registers for stream 4.
|
|||
|
||||
<p>
|
||||
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="8d25af337e3880dc5478228ac344aba9"></a><!-- doxytag: member="xdptx_hw.h::XDPTX_STREAM_ID4" ref="8d25af337e3880dc5478228ac344aba9" args="" -->
|
||||
<div class="memitem">
|
||||
<div class="memproto">
|
||||
<table class="memname">
|
||||
<tr>
|
||||
<td class="memname">#define XDPTX_STREAM_ID4 4 </td>
|
||||
</tr>
|
||||
</table>
|
||||
</div>
|
||||
<div class="memdoc">
|
||||
|
||||
<p>
|
||||
|
||||
</div>
|
||||
</div><p>
|
||||
<a class="anchor" name="80266896bc3c68c7109deba44db4fcac"></a><!-- doxytag: member="xdptx_hw.h::XDPTX_TRAINING_PATTERN_SET" ref="80266896bc3c68c7109deba44db4fcac" args="" -->
|
||||
|
|
|
|||
|
|
@ -32,7 +32,6 @@ This file contains the stream policy maker functions for the <a class="el" href=
|
|||
als 08/03/14 Initial MST addition.
|
||||
</pre>
|
||||
<p>
|
||||
<code>#include "math.h"</code><br>
|
||||
<code>#include "<a class="el" href="xdptx_8h.html">xdptx.h</a>"</code><br>
|
||||
<code>#include "<a class="el" href="xdptx__hw_8h.html">xdptx_hw.h</a>"</code><br>
|
||||
<code>#include "xstatus.h"</code><br>
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue