v_deinterlacer: Added new driver
HLS generated driver along with manually written layer 2. driver tcl update pending Signed-off-by: Rohit Consul <rohit.consul@xilinx.com>
This commit is contained in:
Rohit Consul
Nava kishore Manne
parent
c9796ae1ff
commit
a88d54eb11
10 changed files with 912 additions and 0 deletions
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# ==============================================================
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# File generated by Vivado(TM) HLS - High-Level Synthesis from C, C++ and SystemC
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# Version: 2015.1
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# Copyright (C) 2015 Xilinx Inc. All rights reserved.
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#
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# ==============================================================
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OPTION psf_version = 2.1;
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BEGIN driver v_deinterlacer
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OPTION supported_peripherals = (v_deinterlacer_v5_0 );
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OPTION driver_state = ACTIVE;
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OPTION copyfiles = all;
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OPTION name = v_deinterlacer;
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OPTION version = 5.0;
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END driver
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# ==============================================================
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# File generated by Vivado(TM) HLS - High-Level Synthesis from C, C++ and SystemC
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# Version: 2015.1
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# Copyright (C) 2015 Xilinx Inc. All rights reserved.
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#
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# ==============================================================
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proc generate {drv_handle} {
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xdefine_include_file $drv_handle "xparameters.h" "XV_deinterlacer" \
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"NUM_INSTANCES" \
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"DEVICE_ID" \
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"C_S_AXI_AXILITES_BASEADDR" \
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"C_S_AXI_AXILITES_HIGHADDR"
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xdefine_config_file $drv_handle "xv_deinterlacer_g.c" "XV_deinterlacer" \
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"DEVICE_ID" \
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"C_S_AXI_AXILITES_BASEADDR"
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xdefine_canonical_xpars $drv_handle "xparameters.h" "XV_deinterlacer" \
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"DEVICE_ID" \
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"C_S_AXI_AXILITES_BASEADDR" \
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"C_S_AXI_AXILITES_HIGHADDR"
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}
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34
XilinxProcessorIPLib/drivers/v_deinterlacer/src/Makefile
Normal file
34
XilinxProcessorIPLib/drivers/v_deinterlacer/src/Makefile
Normal file
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# ==============================================================
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# File generated by Vivado(TM) HLS - High-Level Synthesis from C, C++ and SystemC
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# Version: 2015.1
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# Copyright (C) 2015 Xilinx Inc. All rights reserved.
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#
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# ==============================================================
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COMPILER=
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ARCHIVER=
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CP=cp
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COMPILER_FLAGS=
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EXTRA_COMPILER_FLAGS=
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LIB=libxil.a
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RELEASEDIR=../../../lib
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INCLUDEDIR=../../../include
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INCLUDES=-I./. -I${INCLUDEDIR}
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INCLUDEFILES=*.h
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LIBSOURCES=*.c
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OUTS = *.o
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libs:
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echo "Compiling v_deinterlacer"
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$(COMPILER) $(COMPILER_FLAGS) $(EXTRA_COMPILER_FLAGS) $(INCLUDES) $(LIBSOURCES)
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$(ARCHIVER) -r ${RELEASEDIR}/${LIB} $(OUTS)
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make clean
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include:
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${CP} $(INCLUDEFILES) $(INCLUDEDIR)
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clean:
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rm -rf ${OUTS}
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// ==============================================================
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// File generated by Vivado(TM) HLS - High-Level Synthesis from C, C++ and SystemC
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// Version: 2015.1
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// Copyright (C) 2015 Xilinx Inc. All rights reserved.
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//
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// ==============================================================
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/***************************** Include Files *********************************/
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#include "xv_deinterlacer.h"
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/************************** Function Implementation *************************/
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#ifndef __linux__
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int XV_deinterlacer_CfgInitialize(XV_deinterlacer *InstancePtr, XV_deinterlacer_Config *ConfigPtr) {
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Xil_AssertNonvoid(InstancePtr != NULL);
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Xil_AssertNonvoid(ConfigPtr != NULL);
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InstancePtr->Axilites_BaseAddress = ConfigPtr->Axilites_BaseAddress;
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InstancePtr->IsReady = XIL_COMPONENT_IS_READY;
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return XST_SUCCESS;
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}
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#endif
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void XV_deinterlacer_Start(XV_deinterlacer *InstancePtr) {
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u32 Data;
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Xil_AssertVoid(InstancePtr != NULL);
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Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
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Data = XV_deinterlacer_ReadReg(InstancePtr->Axilites_BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_AP_CTRL) & 0x80;
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XV_deinterlacer_WriteReg(InstancePtr->Axilites_BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_AP_CTRL, Data | 0x01);
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}
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u32 XV_deinterlacer_IsDone(XV_deinterlacer *InstancePtr) {
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u32 Data;
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Xil_AssertNonvoid(InstancePtr != NULL);
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Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
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Data = XV_deinterlacer_ReadReg(InstancePtr->Axilites_BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_AP_CTRL);
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return (Data >> 1) & 0x1;
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}
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u32 XV_deinterlacer_IsIdle(XV_deinterlacer *InstancePtr) {
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u32 Data;
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Xil_AssertNonvoid(InstancePtr != NULL);
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Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
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Data = XV_deinterlacer_ReadReg(InstancePtr->Axilites_BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_AP_CTRL);
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return (Data >> 2) & 0x1;
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}
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u32 XV_deinterlacer_IsReady(XV_deinterlacer *InstancePtr) {
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u32 Data;
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Xil_AssertNonvoid(InstancePtr != NULL);
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Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
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Data = XV_deinterlacer_ReadReg(InstancePtr->Axilites_BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_AP_CTRL);
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// check ap_start to see if the pcore is ready for next input
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return !(Data & 0x1);
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}
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void XV_deinterlacer_EnableAutoRestart(XV_deinterlacer *InstancePtr) {
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Xil_AssertVoid(InstancePtr != NULL);
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Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
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XV_deinterlacer_WriteReg(InstancePtr->Axilites_BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_AP_CTRL, 0x80);
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}
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void XV_deinterlacer_DisableAutoRestart(XV_deinterlacer *InstancePtr) {
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Xil_AssertVoid(InstancePtr != NULL);
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Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
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XV_deinterlacer_WriteReg(InstancePtr->Axilites_BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_AP_CTRL, 0);
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}
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void XV_deinterlacer_Set_read_fb(XV_deinterlacer *InstancePtr, u32 Data) {
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Xil_AssertVoid(InstancePtr != NULL);
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Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
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XV_deinterlacer_WriteReg(InstancePtr->Axilites_BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_READ_FB_DATA, Data);
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}
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u32 XV_deinterlacer_Get_read_fb(XV_deinterlacer *InstancePtr) {
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u32 Data;
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Xil_AssertNonvoid(InstancePtr != NULL);
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Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
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Data = XV_deinterlacer_ReadReg(InstancePtr->Axilites_BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_READ_FB_DATA);
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return Data;
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}
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void XV_deinterlacer_Set_write_fb(XV_deinterlacer *InstancePtr, u32 Data) {
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Xil_AssertVoid(InstancePtr != NULL);
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Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
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XV_deinterlacer_WriteReg(InstancePtr->Axilites_BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_WRITE_FB_DATA, Data);
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}
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u32 XV_deinterlacer_Get_write_fb(XV_deinterlacer *InstancePtr) {
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u32 Data;
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Xil_AssertNonvoid(InstancePtr != NULL);
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Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
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Data = XV_deinterlacer_ReadReg(InstancePtr->Axilites_BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_WRITE_FB_DATA);
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return Data;
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}
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void XV_deinterlacer_Set_colorFormat(XV_deinterlacer *InstancePtr, u32 Data) {
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Xil_AssertVoid(InstancePtr != NULL);
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Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
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XV_deinterlacer_WriteReg(InstancePtr->Axilites_BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_COLORFORMAT_DATA, Data);
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}
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u32 XV_deinterlacer_Get_colorFormat(XV_deinterlacer *InstancePtr) {
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u32 Data;
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Xil_AssertNonvoid(InstancePtr != NULL);
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Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
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Data = XV_deinterlacer_ReadReg(InstancePtr->Axilites_BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_COLORFORMAT_DATA);
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return Data;
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}
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void XV_deinterlacer_Set_algo(XV_deinterlacer *InstancePtr, u32 Data) {
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Xil_AssertVoid(InstancePtr != NULL);
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Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
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XV_deinterlacer_WriteReg(InstancePtr->Axilites_BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_ALGO_DATA, Data);
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}
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u32 XV_deinterlacer_Get_algo(XV_deinterlacer *InstancePtr) {
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u32 Data;
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Xil_AssertNonvoid(InstancePtr != NULL);
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Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
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Data = XV_deinterlacer_ReadReg(InstancePtr->Axilites_BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_ALGO_DATA);
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return Data;
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}
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void XV_deinterlacer_InterruptGlobalEnable(XV_deinterlacer *InstancePtr) {
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Xil_AssertVoid(InstancePtr != NULL);
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Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
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XV_deinterlacer_WriteReg(InstancePtr->Axilites_BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_GIE, 1);
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}
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void XV_deinterlacer_InterruptGlobalDisable(XV_deinterlacer *InstancePtr) {
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Xil_AssertVoid(InstancePtr != NULL);
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Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
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XV_deinterlacer_WriteReg(InstancePtr->Axilites_BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_GIE, 0);
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}
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void XV_deinterlacer_InterruptEnable(XV_deinterlacer *InstancePtr, u32 Mask) {
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u32 Register;
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Xil_AssertVoid(InstancePtr != NULL);
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Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
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Register = XV_deinterlacer_ReadReg(InstancePtr->Axilites_BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_IER);
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XV_deinterlacer_WriteReg(InstancePtr->Axilites_BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_IER, Register | Mask);
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}
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void XV_deinterlacer_InterruptDisable(XV_deinterlacer *InstancePtr, u32 Mask) {
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u32 Register;
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Xil_AssertVoid(InstancePtr != NULL);
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Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
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Register = XV_deinterlacer_ReadReg(InstancePtr->Axilites_BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_IER);
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XV_deinterlacer_WriteReg(InstancePtr->Axilites_BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_IER, Register & (~Mask));
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}
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void XV_deinterlacer_InterruptClear(XV_deinterlacer *InstancePtr, u32 Mask) {
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Xil_AssertVoid(InstancePtr != NULL);
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Xil_AssertVoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
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XV_deinterlacer_WriteReg(InstancePtr->Axilites_BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_ISR, Mask);
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}
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u32 XV_deinterlacer_InterruptGetEnabled(XV_deinterlacer *InstancePtr) {
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Xil_AssertNonvoid(InstancePtr != NULL);
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Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
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return XV_deinterlacer_ReadReg(InstancePtr->Axilites_BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_IER);
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}
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u32 XV_deinterlacer_InterruptGetStatus(XV_deinterlacer *InstancePtr) {
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Xil_AssertNonvoid(InstancePtr != NULL);
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Xil_AssertNonvoid(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
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return XV_deinterlacer_ReadReg(InstancePtr->Axilites_BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_ISR);
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}
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@ -0,0 +1,111 @@
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// ==============================================================
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// File generated by Vivado(TM) HLS - High-Level Synthesis from C, C++ and SystemC
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// Version: 2015.1
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// Copyright (C) 2015 Xilinx Inc. All rights reserved.
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//
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// ==============================================================
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#ifndef XV_DEINTERLACER_H
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#define XV_DEINTERLACER_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/***************************** Include Files *********************************/
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#ifndef __linux__
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#include "xil_types.h"
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#include "xil_assert.h"
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#include "xstatus.h"
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#include "xil_io.h"
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#else
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#include <stdint.h>
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#include <assert.h>
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#include <dirent.h>
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#include <fcntl.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <sys/mman.h>
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#include <unistd.h>
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#include <stddef.h>
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#endif
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#include "xv_deinterlacer_hw.h"
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/**************************** Type Definitions ******************************/
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#ifdef __linux__
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typedef uint8_t u8;
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typedef uint16_t u16;
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typedef uint32_t u32;
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#else
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typedef struct {
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u16 DeviceId;
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u32 Axilites_BaseAddress;
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} XV_deinterlacer_Config;
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#endif
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typedef struct {
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u32 Axilites_BaseAddress;
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u32 IsReady;
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} XV_deinterlacer;
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/***************** Macros (Inline Functions) Definitions *********************/
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#ifndef __linux__
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#define XV_deinterlacer_WriteReg(BaseAddress, RegOffset, Data) \
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Xil_Out32((BaseAddress) + (RegOffset), (u32)(Data))
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#define XV_deinterlacer_ReadReg(BaseAddress, RegOffset) \
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Xil_In32((BaseAddress) + (RegOffset))
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#else
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#define XV_deinterlacer_WriteReg(BaseAddress, RegOffset, Data) \
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*(volatile u32*)((BaseAddress) + (RegOffset)) = (u32)(Data)
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#define XV_deinterlacer_ReadReg(BaseAddress, RegOffset) \
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*(volatile u32*)((BaseAddress) + (RegOffset))
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#define Xil_AssertVoid(expr) assert(expr)
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#define Xil_AssertNonvoid(expr) assert(expr)
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#define XST_SUCCESS 0
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#define XST_DEVICE_NOT_FOUND 2
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#define XST_OPEN_DEVICE_FAILED 3
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#define XIL_COMPONENT_IS_READY 1
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#endif
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/************************** Function Prototypes *****************************/
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#ifndef __linux__
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int XV_deinterlacer_Initialize(XV_deinterlacer *InstancePtr, u16 DeviceId);
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XV_deinterlacer_Config* XV_deinterlacer_LookupConfig(u16 DeviceId);
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int XV_deinterlacer_CfgInitialize(XV_deinterlacer *InstancePtr, XV_deinterlacer_Config *ConfigPtr);
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#else
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int XV_deinterlacer_Initialize(XV_deinterlacer *InstancePtr, const char* InstanceName);
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int XV_deinterlacer_Release(XV_deinterlacer *InstancePtr);
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#endif
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void XV_deinterlacer_Start(XV_deinterlacer *InstancePtr);
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u32 XV_deinterlacer_IsDone(XV_deinterlacer *InstancePtr);
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u32 XV_deinterlacer_IsIdle(XV_deinterlacer *InstancePtr);
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u32 XV_deinterlacer_IsReady(XV_deinterlacer *InstancePtr);
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void XV_deinterlacer_EnableAutoRestart(XV_deinterlacer *InstancePtr);
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void XV_deinterlacer_DisableAutoRestart(XV_deinterlacer *InstancePtr);
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void XV_deinterlacer_Set_read_fb(XV_deinterlacer *InstancePtr, u32 Data);
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u32 XV_deinterlacer_Get_read_fb(XV_deinterlacer *InstancePtr);
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void XV_deinterlacer_Set_write_fb(XV_deinterlacer *InstancePtr, u32 Data);
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u32 XV_deinterlacer_Get_write_fb(XV_deinterlacer *InstancePtr);
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void XV_deinterlacer_Set_colorFormat(XV_deinterlacer *InstancePtr, u32 Data);
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u32 XV_deinterlacer_Get_colorFormat(XV_deinterlacer *InstancePtr);
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void XV_deinterlacer_Set_algo(XV_deinterlacer *InstancePtr, u32 Data);
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u32 XV_deinterlacer_Get_algo(XV_deinterlacer *InstancePtr);
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void XV_deinterlacer_InterruptGlobalEnable(XV_deinterlacer *InstancePtr);
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void XV_deinterlacer_InterruptGlobalDisable(XV_deinterlacer *InstancePtr);
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void XV_deinterlacer_InterruptEnable(XV_deinterlacer *InstancePtr, u32 Mask);
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void XV_deinterlacer_InterruptDisable(XV_deinterlacer *InstancePtr, u32 Mask);
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void XV_deinterlacer_InterruptClear(XV_deinterlacer *InstancePtr, u32 Mask);
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u32 XV_deinterlacer_InterruptGetEnabled(XV_deinterlacer *InstancePtr);
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u32 XV_deinterlacer_InterruptGetStatus(XV_deinterlacer *InstancePtr);
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#ifdef __cplusplus
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}
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#endif
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#endif
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@ -0,0 +1,54 @@
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// ==============================================================
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// File generated by Vivado(TM) HLS - High-Level Synthesis from C, C++ and SystemC
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// Version: 2015.1
|
||||
// Copyright (C) 2015 Xilinx Inc. All rights reserved.
|
||||
//
|
||||
// ==============================================================
|
||||
|
||||
// AXILiteS
|
||||
// 0x00 : Control signals
|
||||
// bit 0 - ap_start (Read/Write/COH)
|
||||
// bit 1 - ap_done (Read/COR)
|
||||
// bit 2 - ap_idle (Read)
|
||||
// bit 3 - ap_ready (Read)
|
||||
// bit 7 - auto_restart (Read/Write)
|
||||
// others - reserved
|
||||
// 0x04 : Global Interrupt Enable Register
|
||||
// bit 0 - Global Interrupt Enable (Read/Write)
|
||||
// others - reserved
|
||||
// 0x08 : IP Interrupt Enable Register (Read/Write)
|
||||
// bit 0 - Channel 0 (ap_done)
|
||||
// bit 1 - Channel 1 (ap_ready)
|
||||
// others - reserved
|
||||
// 0x0c : IP Interrupt Status Register (Read/TOW)
|
||||
// bit 0 - Channel 0 (ap_done)
|
||||
// bit 1 - Channel 1 (ap_ready)
|
||||
// others - reserved
|
||||
// 0x10 : Data signal of read_fb
|
||||
// bit 31~0 - read_fb[31:0] (Read/Write)
|
||||
// 0x14 : reserved
|
||||
// 0x18 : Data signal of write_fb
|
||||
// bit 31~0 - write_fb[31:0] (Read/Write)
|
||||
// 0x1c : reserved
|
||||
// 0x20 : Data signal of colorFormat
|
||||
// bit 7~0 - colorFormat[7:0] (Read/Write)
|
||||
// others - reserved
|
||||
// 0x24 : reserved
|
||||
// 0x28 : Data signal of algo
|
||||
// bit 7~0 - algo[7:0] (Read/Write)
|
||||
// others - reserved
|
||||
// 0x2c : reserved
|
||||
// (SC = Self Clear, COR = Clear on Read, TOW = Toggle on Write, COH = Clear on Handshake)
|
||||
|
||||
#define XV_DEINTERLACER_AXILITES_ADDR_AP_CTRL 0x00
|
||||
#define XV_DEINTERLACER_AXILITES_ADDR_GIE 0x04
|
||||
#define XV_DEINTERLACER_AXILITES_ADDR_IER 0x08
|
||||
#define XV_DEINTERLACER_AXILITES_ADDR_ISR 0x0c
|
||||
#define XV_DEINTERLACER_AXILITES_ADDR_READ_FB_DATA 0x10
|
||||
#define XV_DEINTERLACER_AXILITES_BITS_READ_FB_DATA 32
|
||||
#define XV_DEINTERLACER_AXILITES_ADDR_WRITE_FB_DATA 0x18
|
||||
#define XV_DEINTERLACER_AXILITES_BITS_WRITE_FB_DATA 32
|
||||
#define XV_DEINTERLACER_AXILITES_ADDR_COLORFORMAT_DATA 0x20
|
||||
#define XV_DEINTERLACER_AXILITES_BITS_COLORFORMAT_DATA 8
|
||||
#define XV_DEINTERLACER_AXILITES_ADDR_ALGO_DATA 0x28
|
||||
#define XV_DEINTERLACER_AXILITES_BITS_ALGO_DATA 8
|
||||
|
|
@ -0,0 +1,162 @@
|
|||
/******************************************************************************
|
||||
*
|
||||
* Copyright (C) 2015 Xilinx, Inc. All rights reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* Use of the Software is limited solely to applications:
|
||||
* (a) running on a Xilinx device, or
|
||||
* (b) that interact with a Xilinx device through a bus or interconnect.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
|
||||
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*
|
||||
* Except as contained in this notice, the name of the Xilinx shall not be used
|
||||
* in advertising or otherwise to promote the sale, use or other dealings in
|
||||
* this Software without prior written authorization from Xilinx.
|
||||
*
|
||||
******************************************************************************/
|
||||
/*****************************************************************************/
|
||||
/**
|
||||
*
|
||||
* @file xv_deinterlacer_l2.c
|
||||
*
|
||||
* The deint Layer-2 Driver. The functions in this file provides an abstraction
|
||||
* from the register peek/poke methodology by implementing most common use-case
|
||||
* provided by the sub-core. See xv_deinterlacer_l2.h for a detailed description
|
||||
* of the layer-2 driver
|
||||
*
|
||||
* <pre>
|
||||
* MODIFICATION HISTORY:
|
||||
*
|
||||
* Ver Who Date Changes
|
||||
* ----- ---- -------- -------------------------------------------------------
|
||||
* 1.00 rc 05/01/15 Initial Release
|
||||
|
||||
* </pre>
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
/***************************** Include Files *********************************/
|
||||
#include "xv_deinterlacer_l2.h"
|
||||
|
||||
/************************** Constant Definitions *****************************/
|
||||
|
||||
/**************************** Type Definitions *******************************/
|
||||
|
||||
/**************************** Local Global *******************************/
|
||||
|
||||
/************************** Function Prototypes ******************************/
|
||||
|
||||
/*****************************************************************************/
|
||||
/**
|
||||
* This function starts the deinterlacer core
|
||||
*
|
||||
* @param InstancePtr is a pointer to the core instance to be worked on
|
||||
*
|
||||
* @return None
|
||||
*
|
||||
******************************************************************************/
|
||||
void XV_DeintStart(XV_deinterlacer *InstancePtr)
|
||||
{
|
||||
Xil_AssertVoid(InstancePtr != NULL);
|
||||
|
||||
XV_deinterlacer_EnableAutoRestart(InstancePtr);
|
||||
XV_deinterlacer_Start(InstancePtr);
|
||||
}
|
||||
|
||||
/*****************************************************************************/
|
||||
/**
|
||||
* This function stops the deinterlacer core
|
||||
*
|
||||
* @param InstancePtr is a pointer to the core instance to be worked on
|
||||
*
|
||||
* @return None
|
||||
*
|
||||
******************************************************************************/
|
||||
void XV_DeintStop(XV_deinterlacer *InstancePtr)
|
||||
{
|
||||
Xil_AssertVoid(InstancePtr != NULL);
|
||||
|
||||
XV_deinterlacer_DisableAutoRestart(InstancePtr);
|
||||
}
|
||||
|
||||
/*****************************************************************************/
|
||||
/**
|
||||
* This function sets the deinterlacer cores RD/WR field buffers addresses
|
||||
* and color space
|
||||
*
|
||||
* @param InstancePtr is a pointer to the core instance to be worked on
|
||||
* @param memAddr is the buffer address in DDR for RD/WR clients
|
||||
* @param cformat is the input stream color format
|
||||
*
|
||||
* @return None
|
||||
*
|
||||
******************************************************************************/
|
||||
void XV_DeintSetFieldBuffers(XV_deinterlacer *InstancePtr,
|
||||
u32 memAddr,
|
||||
XVidC_ColorFormat cformat)
|
||||
{
|
||||
Xil_AssertVoid(InstancePtr != NULL);
|
||||
|
||||
XV_deinterlacer_Set_read_fb(InstancePtr, memAddr);
|
||||
XV_deinterlacer_Set_write_fb(InstancePtr, memAddr);
|
||||
XV_deinterlacer_Set_colorFormat(InstancePtr, cformat);
|
||||
}
|
||||
|
||||
/*****************************************************************************/
|
||||
/**
|
||||
*
|
||||
* This function prints Deinterlacer status on console
|
||||
*
|
||||
* @param InstancePtr is the instance pointer to the IP instance.
|
||||
*
|
||||
* @return None
|
||||
*
|
||||
******************************************************************************/
|
||||
void XV_DeintDbgReportStatus(XV_deinterlacer *InstancePtr)
|
||||
{
|
||||
XV_deinterlacer *pDeint = InstancePtr;
|
||||
u32 done, idle, ready, ctrl;
|
||||
u32 rfb, wfb, colformat, algo;
|
||||
|
||||
/*
|
||||
* Assert validates the input arguments
|
||||
*/
|
||||
Xil_AssertVoid(InstancePtr != NULL);
|
||||
|
||||
xil_printf("\r\n\r\n----->Deinterlacer IP STATUS<----\r\n");
|
||||
|
||||
done = XV_deinterlacer_IsDone(pDeint);
|
||||
idle = XV_deinterlacer_IsIdle(pDeint);
|
||||
ready = XV_deinterlacer_IsReady(pDeint);
|
||||
ctrl = XV_deinterlacer_ReadReg(pDeint->Axilites_BaseAddress, XV_DEINTERLACER_AXILITES_ADDR_AP_CTRL);
|
||||
|
||||
rfb = XV_deinterlacer_Get_read_fb(pDeint);
|
||||
wfb = XV_deinterlacer_Get_write_fb(pDeint);
|
||||
colformat = XV_deinterlacer_Get_colorFormat(pDeint);
|
||||
algo = XV_deinterlacer_Get_algo(pDeint);
|
||||
|
||||
xil_printf("IsDone: %d\r\n", done);
|
||||
xil_printf("IsIdle: %d\r\n", idle);
|
||||
xil_printf("IsReady: %d\r\n", ready);
|
||||
xil_printf("Ctrl: 0x%x\r\n\r\n", ctrl);
|
||||
|
||||
xil_printf("Read Frame Buffer: 0x%x\r\n", rfb);
|
||||
xil_printf("Write Frame Buffer: 0x%x\r\n", wfb);
|
||||
xil_printf("Color Format: %d\r\n", colformat);
|
||||
xil_printf("Algo Selected: %d\r\n", algo);
|
||||
}
|
||||
|
|
@ -0,0 +1,115 @@
|
|||
/******************************************************************************
|
||||
*
|
||||
* Copyright (C) 2015 Xilinx, Inc. All rights reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* Use of the Software is limited solely to applications:
|
||||
* (a) running on a Xilinx device, or
|
||||
* (b) that interact with a Xilinx device through a bus or interconnect.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* XILINX CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
||||
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
|
||||
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
|
||||
* SOFTWARE.
|
||||
*
|
||||
* Except as contained in this notice, the name of the Xilinx shall not be used
|
||||
* in advertising or otherwise to promote the sale, use or other dealings in
|
||||
* this Software without prior written authorization from Xilinx.
|
||||
*
|
||||
******************************************************************************/
|
||||
/*****************************************************************************/
|
||||
/**
|
||||
*
|
||||
* @file xv_deinterlacer_l2.h
|
||||
*
|
||||
* This header file contains layer 2 API's of the deint sub-core driver.
|
||||
* The functions contained herein provides a high level implementation of features
|
||||
* provided by the IP, abstracting away the register level details from
|
||||
* the user
|
||||
*
|
||||
* <b>Deinterlacer IP Features </b>
|
||||
*
|
||||
* Currently only 1080i input is supported
|
||||
*
|
||||
* <b>Dependency</b>
|
||||
*
|
||||
* This driver makes use of the video enumerations and data types defined in the
|
||||
* Xilinx Video Common Driver (video_common_vX.x) and as such the common driver
|
||||
* must be included as dependency to compile this driver
|
||||
*
|
||||
* <b>Initialization & Configuration</b>
|
||||
*
|
||||
* The device driver enables higher layer software (e.g., an application) to
|
||||
* communicate to the deint core.
|
||||
*
|
||||
* Before using the layer-2 API's user must initialize the core by calling
|
||||
* Layer-1 API XV_deinterlacer_Initialize(). This function will look for a
|
||||
* configuration structure for the device and initialize it to defined HW
|
||||
* settings. After initialization Layer-2 API's can be used to configure
|
||||
* the core. It is recommended user always make use of Layer-2 API to interact
|
||||
* with core.
|
||||
* Advanced users always have the capability to directly interact with the
|
||||
* core using Layer-1 API's that perform low level register peek/poke.
|
||||
*
|
||||
* <b> Interrupts </b>
|
||||
*
|
||||
* This driver does not have any interrupts
|
||||
*
|
||||
* <b> Virtual Memory </b>
|
||||
*
|
||||
* This driver supports Virtual Memory. The RTOS is responsible for calculating
|
||||
* the correct device base address in Virtual Memory space.
|
||||
*
|
||||
* <b> Threads </b>
|
||||
*
|
||||
* This driver is not thread safe. Any needs for threads or thread mutual
|
||||
* exclusion must be satisfied by the layer above this driver.
|
||||
*
|
||||
*
|
||||
* <pre>
|
||||
* MODIFICATION HISTORY:
|
||||
*
|
||||
* Ver Who Date Changes
|
||||
* ----- ---- -------- -------------------------------------------------------
|
||||
* 1.00 rc 05/01/15 Initial Release
|
||||
|
||||
* </pre>
|
||||
*
|
||||
******************************************************************************/
|
||||
#ifndef XV_DEINTERALCER_L2_H /* prevent circular inclusions */
|
||||
#define XV_DEINTERALCER_L2_H /* by using protection macros */
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include "xvidc.h"
|
||||
#include "xv_deinterlacer.h"
|
||||
|
||||
/************************** Constant Definitions *****************************/
|
||||
|
||||
/**************************** Type Definitions *******************************/
|
||||
|
||||
/************************** Function Prototypes ******************************/
|
||||
void XV_DeintStart(XV_deinterlacer *InstancePtr);
|
||||
void XV_DeintStop(XV_deinterlacer *InstancePtr);
|
||||
void XV_DeintSetFieldBuffers(XV_deinterlacer *InstancePtr,
|
||||
u32 memAddr,
|
||||
XVidC_ColorFormat cformat);
|
||||
|
||||
void XV_DeintDbgReportStatus(XV_deinterlacer *InstancePtr);
|
||||
|
||||
|
||||
#endif /* XSS_DEINT_H_ */
|
||||
|
|
@ -0,0 +1,150 @@
|
|||
// ==============================================================
|
||||
// File generated by Vivado(TM) HLS - High-Level Synthesis from C, C++ and SystemC
|
||||
// Version: 2015.1
|
||||
// Copyright (C) 2015 Xilinx Inc. All rights reserved.
|
||||
//
|
||||
// ==============================================================
|
||||
|
||||
#ifdef __linux__
|
||||
|
||||
/***************************** Include Files *********************************/
|
||||
#include "xv_deinterlacer.h"
|
||||
|
||||
/***************** Macros (Inline Functions) Definitions *********************/
|
||||
#define MAX_UIO_PATH_SIZE 256
|
||||
#define MAX_UIO_NAME_SIZE 64
|
||||
#define MAX_UIO_MAPS 5
|
||||
#define UIO_INVALID_ADDR 0
|
||||
|
||||
/**************************** Type Definitions ******************************/
|
||||
typedef struct {
|
||||
u32 addr;
|
||||
u32 size;
|
||||
} XV_deinterlacer_uio_map;
|
||||
|
||||
typedef struct {
|
||||
int uio_fd;
|
||||
int uio_num;
|
||||
char name[ MAX_UIO_NAME_SIZE ];
|
||||
char version[ MAX_UIO_NAME_SIZE ];
|
||||
XV_deinterlacer_uio_map maps[ MAX_UIO_MAPS ];
|
||||
} XV_deinterlacer_uio_info;
|
||||
|
||||
/***************** Variable Definitions **************************************/
|
||||
static XV_deinterlacer_uio_info uio_info;
|
||||
|
||||
/************************** Function Implementation *************************/
|
||||
static int line_from_file(char* filename, char* linebuf) {
|
||||
char* s;
|
||||
int i;
|
||||
FILE* fp = fopen(filename, "r");
|
||||
if (!fp) return -1;
|
||||
s = fgets(linebuf, MAX_UIO_NAME_SIZE, fp);
|
||||
fclose(fp);
|
||||
if (!s) return -2;
|
||||
for (i=0; (*s)&&(i<MAX_UIO_NAME_SIZE); i++) {
|
||||
if (*s == '\n') *s = 0;
|
||||
s++;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int uio_info_read_name(XV_deinterlacer_uio_info* info) {
|
||||
char file[ MAX_UIO_PATH_SIZE ];
|
||||
sprintf(file, "/sys/class/uio/uio%d/name", info->uio_num);
|
||||
return line_from_file(file, info->name);
|
||||
}
|
||||
|
||||
static int uio_info_read_version(XV_deinterlacer_uio_info* info) {
|
||||
char file[ MAX_UIO_PATH_SIZE ];
|
||||
sprintf(file, "/sys/class/uio/uio%d/version", info->uio_num);
|
||||
return line_from_file(file, info->version);
|
||||
}
|
||||
|
||||
static int uio_info_read_map_addr(XV_deinterlacer_uio_info* info, int n) {
|
||||
int ret;
|
||||
char file[ MAX_UIO_PATH_SIZE ];
|
||||
info->maps[n].addr = UIO_INVALID_ADDR;
|
||||
sprintf(file, "/sys/class/uio/uio%d/maps/map%d/addr", info->uio_num, n);
|
||||
FILE* fp = fopen(file, "r");
|
||||
if (!fp) return -1;
|
||||
ret = fscanf(fp, "0x%x", &info->maps[n].addr);
|
||||
fclose(fp);
|
||||
if (ret < 0) return -2;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int uio_info_read_map_size(XV_deinterlacer_uio_info* info, int n) {
|
||||
int ret;
|
||||
char file[ MAX_UIO_PATH_SIZE ];
|
||||
sprintf(file, "/sys/class/uio/uio%d/maps/map%d/size", info->uio_num, n);
|
||||
FILE* fp = fopen(file, "r");
|
||||
if (!fp) return -1;
|
||||
ret = fscanf(fp, "0x%x", &info->maps[n].size);
|
||||
fclose(fp);
|
||||
if (ret < 0) return -2;
|
||||
return 0;
|
||||
}
|
||||
|
||||
int XV_deinterlacer_Initialize(XV_deinterlacer *InstancePtr, const char* InstanceName) {
|
||||
XV_deinterlacer_uio_info *InfoPtr = &uio_info;
|
||||
struct dirent **namelist;
|
||||
int i, n;
|
||||
char* s;
|
||||
char file[ MAX_UIO_PATH_SIZE ];
|
||||
char name[ MAX_UIO_NAME_SIZE ];
|
||||
int flag = 0;
|
||||
|
||||
assert(InstancePtr != NULL);
|
||||
|
||||
n = scandir("/sys/class/uio", &namelist, 0, alphasort);
|
||||
if (n < 0) return XST_DEVICE_NOT_FOUND;
|
||||
for (i = 0; i < n; i++) {
|
||||
strcpy(file, "/sys/class/uio/");
|
||||
strcat(file, namelist[i]->d_name);
|
||||
strcat(file, "/name");
|
||||
if ((line_from_file(file, name) == 0) && (strcmp(name, InstanceName) == 0)) {
|
||||
flag = 1;
|
||||
s = namelist[i]->d_name;
|
||||
s += 3; // "uio"
|
||||
InfoPtr->uio_num = atoi(s);
|
||||
break;
|
||||
}
|
||||
}
|
||||
if (flag == 0) return XST_DEVICE_NOT_FOUND;
|
||||
|
||||
uio_info_read_name(InfoPtr);
|
||||
uio_info_read_version(InfoPtr);
|
||||
for (n = 0; n < MAX_UIO_MAPS; ++n) {
|
||||
uio_info_read_map_addr(InfoPtr, n);
|
||||
uio_info_read_map_size(InfoPtr, n);
|
||||
}
|
||||
|
||||
sprintf(file, "/dev/uio%d", InfoPtr->uio_num);
|
||||
if ((InfoPtr->uio_fd = open(file, O_RDWR)) < 0) {
|
||||
return XST_OPEN_DEVICE_FAILED;
|
||||
}
|
||||
|
||||
// NOTE: slave interface 'Axilites' should be mapped to uioX/map0
|
||||
InstancePtr->Axilites_BaseAddress = (u32)mmap(NULL, InfoPtr->maps[0].size, PROT_READ|PROT_WRITE, MAP_SHARED, InfoPtr->uio_fd, 0 * getpagesize());
|
||||
assert(InstancePtr->Axilites_BaseAddress);
|
||||
|
||||
InstancePtr->IsReady = XIL_COMPONENT_IS_READY;
|
||||
|
||||
return XST_SUCCESS;
|
||||
}
|
||||
|
||||
int XV_deinterlacer_Release(XV_deinterlacer *InstancePtr) {
|
||||
XV_deinterlacer_uio_info *InfoPtr = &uio_info;
|
||||
|
||||
assert(InstancePtr != NULL);
|
||||
assert(InstancePtr->IsReady == XIL_COMPONENT_IS_READY);
|
||||
|
||||
munmap((void*)InstancePtr->Axilites_BaseAddress, InfoPtr->maps[0].size);
|
||||
|
||||
close(InfoPtr->uio_fd);
|
||||
|
||||
return XST_SUCCESS;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,45 @@
|
|||
// ==============================================================
|
||||
// File generated by Vivado(TM) HLS - High-Level Synthesis from C, C++ and SystemC
|
||||
// Version: 2015.1
|
||||
// Copyright (C) 2015 Xilinx Inc. All rights reserved.
|
||||
//
|
||||
// ==============================================================
|
||||
|
||||
#ifndef __linux__
|
||||
|
||||
#include "xstatus.h"
|
||||
#include "xparameters.h"
|
||||
#include "xv_deinterlacer.h"
|
||||
|
||||
extern XV_deinterlacer_Config XV_deinterlacer_ConfigTable[];
|
||||
|
||||
XV_deinterlacer_Config *XV_deinterlacer_LookupConfig(u16 DeviceId) {
|
||||
XV_deinterlacer_Config *ConfigPtr = NULL;
|
||||
|
||||
int Index;
|
||||
|
||||
for (Index = 0; Index < XPAR_XV_DEINTERLACER_NUM_INSTANCES; Index++) {
|
||||
if (XV_deinterlacer_ConfigTable[Index].DeviceId == DeviceId) {
|
||||
ConfigPtr = &XV_deinterlacer_ConfigTable[Index];
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
return ConfigPtr;
|
||||
}
|
||||
|
||||
int XV_deinterlacer_Initialize(XV_deinterlacer *InstancePtr, u16 DeviceId) {
|
||||
XV_deinterlacer_Config *ConfigPtr;
|
||||
|
||||
Xil_AssertNonvoid(InstancePtr != NULL);
|
||||
|
||||
ConfigPtr = XV_deinterlacer_LookupConfig(DeviceId);
|
||||
if (ConfigPtr == NULL) {
|
||||
InstancePtr->IsReady = 0;
|
||||
return (XST_DEVICE_NOT_FOUND);
|
||||
}
|
||||
|
||||
return XV_deinterlacer_CfgInitialize(InstancePtr, ConfigPtr);
|
||||
}
|
||||
|
||||
#endif
|
||||
Loading…
Add table
Reference in a new issue