Commit graph

66 commits

Author SHA1 Message Date
Nava kishore Manne
6f6f2268ba pdf file updates for 2015.4 release
Signed-off-by: Nava kishore Manne <navam@xilinx.com>
2015-12-01 12:01:33 +05:30
Nava kishore Manne
057fcb7917 Removed version information from all drivers.
Signed-off-by: Nava kishore Manne <navam@xilinx.com>
2015-11-20 16:32:15 +05:30
Harini Katakam
23e6192c2c lwip: Fix typecasting warnings
Emacps phy read function needs a pointer to a variable of type u16
to return phy register value. Fix the type to avoid and clean up warnings.

Signed-off-by: Harini Katakam <harinik@xilinx.com>
Acked-by: Anirudha Sarangi <anirudh@xilinx.com>
2015-11-09 21:52:53 +05:30
Kinjal Pravinbhai Patel
709f03aed0 sw_services: lwip stacksize given through tcl has been modified
With the latest freertos, the stacksize given through tcl is
multiplied internally by wordsize. To take care of that, this
change in stacksize is needed.

Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
Acked-by: Anirudha Sarangi <anirudh@xilinx.com>
2015-11-04 18:48:05 +05:30
Kinjal Pravinbhai Patel
7859933f8a sw_apps & lib: sw_apps and library tcl files have been changed
This patch updates the openamp & freertos sw_apps and
lwip & xilopenamp library to support latest freertos kernel

Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
Acked-by: Anirudha Sarangi <anirudh@xilinx.com>
2015-11-04 18:35:38 +05:30
Kinjal Pravinbhai Patel
419545b52a ThirdParty BSP: FreeRTOS kernel has been upgraded to 8.2.3 version
Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
Acked-by: Anirudha Sarangi <anirudh@xilinx.com>
2015-11-04 18:35:27 +05:30
Kinjal Pravinbhai Patel
4d5eca8c76 ThirdParty bsp: New version of FreeRTOS has been created
This patch deletes the FreeRTOS 8.2.1 kernel version and adds
8.2.3 kernel version

Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
Acked-by: Anirudha Sarangi <anirudh@xilinx.com>
2015-11-04 18:34:09 +05:30
Anirudha Sarangi
e08f7ac1fe lwip: Fix issue related to handling interfaces other than enet0
The existing Zynq adapter has a bug when it handles interfaces other
than enet0. This patch fixes it.

Signed-off-by: Anirudha Sarangi <anirudh@xilinx.com>
Acked by: Punnaiah Choudary Kalluri <punnaia@xilinx.com>
2015-10-30 21:30:48 +05:30
Kinjal Pravinbhai Patel
15ac00e3b6 ThirdParty bsp: added support for cortex-a53 to FreeRTOS
Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
Acked-by: Nava kishore Manne <nava.manne@xilinx.com>
2015-10-21 16:30:48 +05:30
Kinjal Pravinbhai Patel
e822910383 ThirdParty BSP: Created new minor version for FreeRTOS
Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
Acked-by: Nava kishore Manne <nava.manne@xilinx.com>
2015-10-21 16:29:57 +05:30
Nava kishore Manne
b86934051e Revert "ThirdParty BSP: Created new minor version for FreeRTOS"
This reverts commit 354188d5fa.
2015-10-21 15:32:32 +05:30
Nava kishore Manne
e718e42698 Revert "ThirdParty bsp: added support for cortex-a53 to FreeRTOS"
This reverts commit e39dc35507.
2015-10-21 15:30:15 +05:30
Kinjal Pravinbhai Patel
e39dc35507 ThirdParty bsp: added support for cortex-a53 to FreeRTOS
Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
Acked-by: Anirudha Sarangi <anirudh@xilinx.com>
2015-10-20 22:45:11 +05:30
Kinjal Pravinbhai Patel
354188d5fa ThirdParty BSP: Created new minor version for FreeRTOS
Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
Acked-by: Anirudha Sarangi <anirudh@xilinx.com>
2015-10-20 22:44:34 +05:30
Harini Katakam
05efa29697 lwip: Add support for TI phy
Change the initialization, TX/RX tuning and auto negotiation sequence
as per TI phy spec.

Signed-off-by: Harini Katakam <harinik@xilinx.com>
Acked-by: Anirudha Sarangi <anirudh@xilinx.com>
2015-10-12 18:30:40 +05:30
P L Sai Krishna
ce8d105a07 xilopenamp: Corrected the Makefile for IAR.
This patch modifies the Makefile of xilopenamp to
remove the compilation error for IAR compiler.

Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com>
Acked-by: Anirudha Sarangi <anirudh@xilinx.com>
2015-10-12 13:09:11 +05:30
Harini Katakam
151bb50243 lwip: Use xil_printf instead of printf
printf is used only in two places and it was requested to remove these
as it will reduce the size of the library.

Signed-off-by: Harini Katakam <harinik@xilinx.com>
Acked-by: Anirudha Sarangi <anirudh@xilinx.com>
2015-10-11 11:28:44 +05:30
Harini Katakam
c7705e5843 lwip: Remove SYS_ARCH_PROTECT calls in input
Remove protect and unprotect calls in xemacif_input because
this is alreayd present inside individual interface's input calls
and interrupt should be disabled only for that duration.

Signed-off-by: Harini Katakam <harinik@xilinx.com>
Acked-by: Anirudha Sarangi <anirudh@xilinx.com>
2015-10-11 11:28:33 +05:30
Kinjal Pravinbhai Patel
5cf57ad4f1 bsp: freertos: modified tcls and makefile to change the bsp version
This patch modifies FreeRTOS tcl and makefiles to update for
latest version of BSP. It also removes armcc and iccarm folder
from bsp built with gcc

Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
Acked-by: Anirudha Sarangi <anirudh@xilinx.com>
2015-10-08 19:49:09 +05:30
Kinjal Pravinbhai Patel
5290e7629d bsp: freertos: modified portzynq7000.c for zynq openamp support
This patch modifies portzynq7000.c file to make xinterruptcontroller
variable global for openamp support

Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
Acked-by: Anirudha Sarangi <anirudh@xilinx.com>
2015-10-08 19:48:55 +05:30
Kinjal Pravinbhai Patel
f75b62eb34 sw_services: Added support for CortexA9 to OpenAMP library
Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
Acked-by: Anirudha Sarangi <anirudh@xilinx.com>
2015-10-08 19:48:21 +05:30
Anirudha Sarangi
37fa380b82 lwip: Added barriers for EmacPs adapater
This patch adds required barriers in the EmacPs adapter.

Signed-off-by: Anirudha Sarangi <anirudh@xilinx.com>
Acked-by: Harini Katakam <harinik@xilinx.com>
2015-10-01 10:33:55 +05:30
Anirudha Sarangi
179719fb7c lwip: Create a new version of lwip141
Created a new version lwip141_v1_3.

Signed-off-by: Anirudha Sarangi <anirudh@xilinx.com>
Acked-by: Harini Katakam <harinik@xilinx.com>
2015-10-01 10:33:54 +05:30
Anirudha Sarangi
c3b892c57a lwip: Fix FreeRTOS related issues in lwip
Fix various issues related to new FreeRTOS port in lwip.

Signed-off-by: Anirudha Sarangi <anirudh@xilinx.com>
Acked-by: Harini Katakam <harinik@xilinx.com>
2015-09-12 07:02:02 +05:30
Kedareswara rao Appana
18a8502391 lwip: fix compilation issues with non-hier design
The property names for hier and non-hier designs
are differnet for ethernet this patch updates the same.

Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Acked-by: Anirudha Sarangi <anirudh@xilinx.com>
2015-09-10 19:21:34 +05:30
Anirudha Sarangi
2e8a47b645 lwip: Update Changelog
This patch updates changelog for latest changes.

Signed-off-by: Anirudha Sarangi <anirudh@xilinx.com>
Reviewed-by: Punnaiah Choudary Kalluri <punnaia@xilinx.com>
2015-09-04 10:48:56 +05:30
Anirudha Sarangi
931b7746a4 lwip: Add support for the latest freertos821
This patch makes changes to add support for the latest freertos821 by
making changes in mld, tcl and sys_arch.c files.

Signed-off-by: Anirudha Sarangi <anirudh@xilinx.com>
Reviewed-by: Punnaiah Choudary Kalluri <punnaia@xilinx.com>
2015-09-04 10:48:44 +05:30
Anirudha Sarangi
76b6be7e99 XilOpenAMPLib: Fix makefile issues
Fix makefile issues related to incremental build.

Signed-off-by: Anirudha Sarangi <anirudh@xilinx.com>
Reviewed-by: Punnaiah Choudary Kalluri <punnaia@xilinx.com>
2015-09-03 22:27:47 +05:30
Anirudha Sarangi
edfa3762db lwip: Fix makefile issues
Fix makefile issues related to incremental build.

Signed-off-by: Anirudha Sarangi <anirudh@xilinx.com>
Reviewed-by: Punnaiah Choudary Kalluri <punnaia@xilinx.com>
2015-09-03 22:26:47 +05:30
Anirudha Sarangi
5bf727354a XilOpenAMPLib: Fixes warnings
This patches fixes compilation warnings.

Signed-off-by: Anirudha Sarangi <anirudh@xilinx.com>
Acked by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
2015-09-01 11:12:45 +05:30
Anirudha Sarangi
722bb3ce38 FreeRTOSBSP: Update mld file to enable queue set by default
This patch changes the mld file to enable the queue set option by
default.

Signed-off-by: Anirudha Sarangi <anirudh@xilinx.com>
Acked by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
2015-09-01 10:47:06 +05:30
Kinjal Pravinbhai Patel
6ea9d07985 sw_services: added check of R5 processor for xilopenamp library
Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
Acked-for-series: Anirudha Sarangi   <anirudh@xilinx.com>
2015-08-26 18:23:26 +05:30
Anirudha Sarangi
661f0db024 FreeRTOSBSP: Update tcl file to fix issues for CortexA9 case
For CortexA9, the tcl was exporting a wrong hash define to clear
the interrupts. This patch fixes that issue.

Signed-off-by: Anirudha Sarangi <anirudh@xilinx.com>
Acked by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
2015-08-26 18:08:56 +05:30
Anirudha Sarangi
7d03f237e7 FreeRTOSBSP: Make changes in mld file to show correct tick setup
The existing mld file has incorrect tick_setup category. The patch
fixes it. The patch also does some cleanup to remove unnecessary
comments.

Signed-off-by: Anirudha Sarangi <anirudh@xilinx.com>
Acked by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
2015-08-26 18:07:59 +05:30
Kinjal Pravinbhai Patel
a23fcf5be9 sw_services: openamp: added missing include file for freertos
This patch modifies openamp library to include missing header
files to bm_env.c for freertos.

Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
Acked by: Anirudha Sarangi <anirudh@xilinx.com>
2015-08-20 23:13:48 +05:30
Kinjal Pravinbhai Patel
07e5abb299 bsp: R5_freertos: modified freertos asm_vectors
This patch modifies asm_vectors in freertos R5 to put the vectors
beyond 32MB from code

Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
Acked by: Anirudha Sarangi <anirudh@xilinx.com>
2015-08-20 23:13:33 +05:30
Kedareswara rao Appana
004d36f379 lwip: Fix bsp compilation errors when elite is configured with interrupts though a concat IP
This patch fixes the bsp compilation errors when elite is configured
with interrupts though a concat IP.

Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Acked by: Anirudha Sarangi <anirudh@xilinx.com>
2015-08-20 22:35:57 +05:30
Harini Katakam
ed4a66f256 lwip: Give error message when A53 32 bit compiler is used
Error out from tcl when A53 32 bit compiler is used as lwip
library does not support it.

Signed-off-by: Harini Katakam <harinik@xilinx.com>
Acked by: Anirudha Sarangi <anirudh@xilinx.com>
2015-08-19 23:18:56 +05:30
Kinjal Pravinbhai Patel
ab0e0327d9 bsp: FreeRTOS: modified freertos for bug fix and openamp support
This patch modifies tcl file to correct configCLEAR_TICK_INTERRUPT API
definition and added ttc stop & initialize ttc again if ttc config fails
on rerun.

Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
Acked by: Anirudha Sarangi <anirudh@xilinx.com>
2015-08-17 17:43:22 +05:30
Harini Katakam
aca7c184d4 lwip: Use updated autonegotiation for Zynq as well
Read specific status register for negotiated speed and return the same.
The updated masks are only used for ZynqMP currently; follow the same
for Zynq as well. Corrected alignment in a couple of lines.

Signed-off-by: Harini Katakam <harinik@xilinx.com>
Acked-by: Anirudha Sarangi   <anirudh@xilinx.com>
2015-08-14 15:58:09 +05:30
Kinjal Pravinbhai Patel
7cec02a399 sw_services: xilopenamp: Added freertos support to openamp library
Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>
Acked-by: Anirudha Sarangi   <anirudh@xilinx.com>
2015-08-14 11:43:06 +05:30
Harini Katakam
20feb14f15 lwip: Update autonegotiation for ZynqMP
- Update mac address form s32 to u32
- Update autonegotiation for ZynqMP when checking status register for
negotiated speed. Report error when autonegotiation has failed for ~30 secs.

Signed-off-by: Harini Katakam <harinik@xilinx.com>
Acked-by: Anirudha   Sarangi <anirudh@xilinx.com>
2015-08-11 15:53:56 +05:30
Harini Katakam
d73b594273 lwip: Add support for A53
Add support for A53 by doing the following:
- Update conditional checks with __aarch64__
- Update typecast to UINTPTR
- Update u32_t type
- Update debug prints to reflect 64 bit address
- Disable data cache as lwip is not working on A53 with caches at the moment
- Update changelog for previouos missing history as well

Signed-off-by: Harini Katakam <harinik@xilinx.com>
Acked-by: Anirudha   Sarangi <anirudh@xilinx.com>
2015-08-11 15:53:45 +05:30
Harini Katakam
c67a060ab6 lwip: Add support for A53 in the tcl
Add support for A53 processor in the tcl.

Signed-off-by: Harini Katakam <harinik@xilinx.com>
Acked-by: Anirudha   Sarangi <anirudh@xilinx.com>
2015-08-11 15:53:21 +05:30
Nava kishore Manne
7a47ffd9e8 Removed executable file permission from source code files.
Signed-off-by: Nava kishore Manne <navam@xilinx.com>
Acked-by: Anirudha Sarangi   <anirudh@xilinx.com>
2015-08-03 18:32:57 +05:30
Kedareswara rao Appana
93b8d7f2f5 lwip: remove unnessary code check in tcl
This patch removes the unnecessary check in the lwip tcl
it is causing the compilation issues in few ethernetlite based designs.

Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Acked-by: Anirudha Sarangi   <anirudh@xilinx.com>
2015-08-03 18:32:01 +05:30
Suneel Garapati
15a5404a04 Thirdparty: bsp: freeRTOS support for all architectures
add freeRTOS bsp to support microblaze, cortexa9 and cortexr5
architectures for respective platforms.

Signed-off-by: Suneel Garapati <suneel.garapati@xilinx.com>
Acked-by: Anirudha Sarangi   <anirudh@xilinx.com>
2015-07-31 16:56:23 +05:30
Kedareswara rao Appana
436240a4f7 lwip: Add support for axi ethernet with fifo on zynq
This patch adds lwip support for the axi ethernet with fifo
combination on zynq.

Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Acked-by: Anirudha Sarangi   <anirudh@xilinx.com>
2015-07-31 16:56:13 +05:30
Nava kishore Manne
e35699808d Update Tcl files to support MultiBd and Packaged Bd Designs
Signed-off-by: Nava kishore Manne <navam@xilinx.com>
Acked-by: Naga Sureshkumar Relli <nagasure@xilinx.com>
2015-07-31 16:55:01 +05:30
Harini Katakam
7f8e620772 lwip: Add support for Zynq Ultrascale MPSoC
Add support to be used with newer version of GEM in Zynq Ultrascale MPSoC.
Use TX Q1 and RX Q0; segregate Zynq specific TLB attributes and SLCR settings.

Signed-off-by: Harini Katakam <harinik@xilinx.com>
Reviewed-by: Anirudha Sarangi   <anirudh@xilinx.com>
2015-07-23 12:51:12 +05:30