Commit graph

4 commits

Author SHA1 Message Date
Harini Katakam
daedbcdf08 qspipsu: Change comment about bus width of dummy entry
The recommendation from design is to have bus width of dummy entry =
bus width of address phase (whether this is 1, 2 or 4).
This code will remain same irrespective of QEMU. Hence change the comment.

Signed-off-by: Harini Katakam <harinik@xilinx.com>
2015-05-04 10:57:42 +05:30
P L Sai Krishna
b2ef81cba0 qspipsu_v1_1: Added returns for failure cases in examples.
This patch add returns for failure cases in examples.

Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com>
2015-05-04 10:57:41 +05:30
P L Sai Krishna
5d9aa73bd2 qspipsu_v1_0: Enabled cache in examples.
This patch enables the cache in examples and modified the buffer
alignment to 64-byte.

Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com>
2015-04-22 11:18:24 +05:30
P L Sai Krishna
42cc06acb2 qspipsu_v1_1: Added new version for qspipsu.
This patch add new version 1.1 for qspipsu and deprecates
older version.

Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com>
2015-04-22 11:18:23 +05:30