Kinjal Pravinbhai Patel 6565a67b0e bsp: a9: change in xil_cache APIs ... This patch modifies Xil_DCacheInvalidateRange and Xil_DCacheFlushRange to remove unnecessary dsb in the APIs. It also adds necessary Xil_L2CacheSync in Xil_L2CacheInvalidateRange API. Signed-off-by: Kinjal Pravinbhai Patel <patelki@xilinx.com>		2015-06-24 14:51:11 +05:30
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data	standalone : Removed profiling support for A53/R5.	2015-04-27 12:57:06 +05:30
doc	bsp: update documentation pdf	2015-04-27 12:56:54 +05:30
src	bsp: a9: change in xil_cache APIs	2015-06-24 14:51:11 +05:30