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  • 8acdd90bc9 Merge branch 'btor' of https://github.com/ahmedirfan1983/yosys into btor Ahmed Irfan 2015-04-03 16:34:05 +02:00
  • 7ad179151b appnote for verilog to btor Ahmed Irfan 2015-04-03 16:20:29 +02:00
  • 4b44907619 documentation improvements Clifford Wolf 2015-03-29 20:22:08 +02:00
  • a923a63a89 Ignore celldefine directive in verilog front-end Clifford Wolf 2015-03-25 19:46:12 +01:00
  • e468d4cc60 Fixes in cmos_cells.v Clifford Wolf 2015-03-25 09:00:41 +01:00
  • 68bbb15214 Fixed detection of absolute paths in ABC for win32 Clifford Wolf 2015-03-22 11:03:56 +01:00
  • 611cd010ae Added blif reference to appnote 010 Clifford Wolf 2015-03-22 09:49:46 +01:00
  • 6f8547bfc6 Merge branch 'master' of github.com:cliffordwolf/yosys Clifford Wolf 2015-03-20 09:10:16 +01:00
  • 604c097f98 fix for python 2.6.6 Clifford Wolf 2015-03-20 09:10:02 +01:00
  • 8b1e0bdd9e Fixed handling of quotes in liberty parser Clifford Wolf 2015-03-18 16:03:19 +01:00
  • aed4d763cf Added hierarchy -auto-top Clifford Wolf 2015-03-18 08:33:40 +01:00
  • 67e6dcd34a Added Verilog backend $dffsr support Clifford Wolf 2015-03-18 08:01:37 +01:00
  • 6c8fdb1829 Documentation for JSON format, added attributes Clifford Wolf 2015-03-06 10:21:21 +01:00
  • 42d5d94a5d Added very first version of "synth_ice40" Clifford Wolf 2015-03-05 20:37:55 +01:00
  • ed15400fc6 Fixed bug in "hierarchy" for parametric designs Clifford Wolf 2015-03-04 15:52:34 +01:00
  • adc12ce46e Json bugfix Clifford Wolf 2015-03-03 09:41:41 +01:00
  • 4fc63f27a1 Json backend improvements Clifford Wolf 2015-03-03 09:28:44 +01:00
  • 795a6e1d04 Added write_blif -attr Clifford Wolf 2015-03-02 23:47:45 +01:00
  • 8b488983d0 Added JSON backend Clifford Wolf 2015-03-02 23:30:58 +01:00
  • 422794c584 Const-fold parameter defs on-demand in AstNode::detectSignWidthWorker() Clifford Wolf 2015-03-01 11:20:22 +01:00
  • 5d4f513c3b Added $assume support to write_smt2 Clifford Wolf 2015-02-26 19:02:55 +01:00
  • 1f1deda888 Added non-std verilog assume() statement Clifford Wolf 2015-02-26 18:47:39 +01:00
  • b005eedf36 Added $assume cell type Clifford Wolf 2015-02-26 18:04:10 +01:00
  • 27a918eadf Merge branch 'master' of github.com:cliffordwolf/yosys Clifford Wolf 2015-02-25 23:01:54 +01:00
  • 331f8b8d0b Bugfix in iopadmap Clifford Wolf 2015-02-25 23:01:42 +01:00
  • 3fe18c26cd Added "keep_hierarchy" attribute Clifford Wolf 2015-02-25 12:46:00 +01:00
  • 9ae21263f0 Some cleanups in "clean" Clifford Wolf 2015-02-24 22:31:30 +01:00
  • 81fa4e81a6 Fixed compilation problems with gcc 4.6.3; use enum instead of const ints. (original patch by Andrew Becker <andrew.becker@epfl.ch>) Clifford Wolf 2015-02-24 11:01:00 +01:00
  • ff3f2448b1 Minor "write_smt2" help msg change Clifford Wolf 2015-02-22 16:30:02 +01:00
  • c4f383e452 Fixed "check -assert" Clifford Wolf 2015-02-22 16:29:44 +01:00
  • 4b89dd983c Added "<mod>_a" and "<mod>_i" to write_smt2 output Clifford Wolf 2015-02-22 16:19:10 +01:00
  • d361d313e1 Added "check -assert" doc Clifford Wolf 2015-02-22 13:02:48 +01:00
  • e8307cefd9 Added "check -assert" Clifford Wolf 2015-02-22 13:00:41 +01:00
  • 39d25b212c Fixed "sat -initsteps" off-by-one bug Clifford Wolf 2015-02-22 12:42:05 +01:00
  • fae0e75ace Added "sat -stepsize" and "sat -tempinduct-step" Clifford Wolf 2015-02-21 22:52:49 +01:00
  • b19c926af8 sat docu change Clifford Wolf 2015-02-21 22:03:54 +01:00
  • 9237fb924e When "sat -tempinduct-baseonly -maxsteps N" reaches maxsteps it is a good thing. Clifford Wolf 2015-02-21 20:05:16 +01:00
  • 1688b9b464 Added "sat -tempinduct-baseonly -tempinduct-inductonly" Clifford Wolf 2015-02-21 17:53:22 +01:00
  • dcbd00c101 Fixed basecase init for "sat -tempinduct" Clifford Wolf 2015-02-21 17:43:49 +01:00
  • 49dd9c713f Fixed "flatten" for non-pre-derived modules Clifford Wolf 2015-02-21 15:01:13 +01:00
  • 1f6737f08f Hotfix for yosysjs/demo03.html Clifford Wolf 2015-02-21 14:31:02 +01:00
  • 1fe15a5973 YosysJS: Wait for Viz to load Clifford Wolf 2015-02-21 14:25:34 +01:00
  • 4e6ca7760f Replaced ezDefaultSAT with ezSatPtr Clifford Wolf 2015-02-21 12:15:41 +01:00
  • f778a4081c Catch constants assigned to cell outputs in "flatten" Clifford Wolf 2015-02-21 11:21:28 +01:00
  • d5ce9a32ef Added deep recursion warning to AST simplify Clifford Wolf 2015-02-20 10:33:20 +01:00
  • dc1a0f06fc Parser support for complex delay expressions Clifford Wolf 2015-02-20 10:21:36 +01:00
  • 78b991d760 YosysJS firefox fixes Clifford Wolf 2015-02-19 13:55:36 +01:00
  • e0e6d130cd YosysJS stuff Clifford Wolf 2015-02-19 13:36:54 +01:00
  • 08c0fe164f format fixes in "sat -dump_json" Clifford Wolf 2015-02-19 13:19:04 +01:00
  • 1ecee6c49c Added "sat -dump_json" (WaveJSON format) Clifford Wolf 2015-02-19 10:53:40 +01:00
  • 20eb5cad4b Changed "show" defaults for Win32 Clifford Wolf 2015-02-19 09:11:38 +01:00
  • c2ba4fb2fd Convert floating point cell parameters to strings Clifford Wolf 2015-02-18 23:35:23 +01:00
  • f41378af8c Fixed clang (svn trunk) warnings Clifford Wolf 2015-02-18 14:54:22 +01:00
  • e4cf604ffd Merge branch 'master' of github.com:cliffordwolf/yosys Clifford Wolf 2015-02-18 07:19:03 +01:00
  • 5f54be54b8 Added "select %xe %cie %coe" Clifford Wolf 2015-02-18 07:18:34 +01:00
  • 024aa559e2 wreduce help typo fix Clifford Wolf 2015-02-17 13:02:16 +01:00
  • 138547f41b CodingReadme Clifford Wolf 2015-02-17 13:01:01 +01:00
  • 4c22195c38 YosysJS fixes for firefox Clifford Wolf 2015-02-16 14:10:00 +01:00
  • 3e5e9a3889 More YosysJS stuff Clifford Wolf 2015-02-16 13:23:54 +01:00
  • 33e80b96c7 Added YosysJS wrapper Clifford Wolf 2015-02-16 12:41:48 +01:00
  • 0748ef638d Bugfix in wreduce Clifford Wolf 2015-02-16 09:08:00 +01:00
  • 162432a722 More yosys.js improvements Clifford Wolf 2015-02-16 00:11:22 +01:00
  • 0283703f9e Added Viz to yosys.js Clifford Wolf 2015-02-15 22:53:41 +01:00
  • 549d56bd21 Added yosys.js FS support Clifford Wolf 2015-02-15 18:10:54 +01:00
  • 8d45f81046 More emcc stuff Clifford Wolf 2015-02-15 17:14:09 +01:00
  • c2cc342e1a Improved yosys.js example Clifford Wolf 2015-02-15 16:16:08 +01:00
  • 4d34d031f9 Added "stat" to "synth" and "synth_xilinx" Clifford Wolf 2015-02-15 13:25:15 +01:00
  • 881dcd8af9 Added final checks to "synth" and "synth_xilinx" Clifford Wolf 2015-02-15 13:00:00 +01:00
  • 40f021e136 Added "check -noinit" Clifford Wolf 2015-02-15 12:58:12 +01:00
  • a54c994e2b Cosmetic fixes in "hierarchy" for blackbox modules Clifford Wolf 2015-02-15 12:57:41 +01:00
  • 3216f9420e More emscripten stuff, Added example app Clifford Wolf 2015-02-15 12:09:30 +01:00
  • 86819cc9f8 Fixed default EMCCFLAGS Clifford Wolf 2015-02-15 10:30:29 +01:00
  • ec05242c27 Smaller default parameters in $mem simlib model Clifford Wolf 2015-02-15 00:20:05 +01:00
  • c6ae9ebb79 Fixed "stat" handling of blackbox modules Clifford Wolf 2015-02-14 22:36:34 +01:00
  • e9368a1d7e Various fixes for memories with offsets Clifford Wolf 2015-02-14 14:21:15 +01:00
  • dcf2e24240 Added $meminit support to "memory" command Clifford Wolf 2015-02-14 12:55:03 +01:00
  • 913c304fe6 Added $meminit test case Clifford Wolf 2015-02-14 11:26:20 +01:00
  • 7f1a1759d7 Added "read_verilog -nomeminit" and "nomeminit" attribute Clifford Wolf 2015-02-14 11:21:12 +01:00
  • a8e9d37c14 Creating $meminit cells in verilog front-end Clifford Wolf 2015-02-14 10:49:30 +01:00
  • 910556560f Added $meminit cell type Clifford Wolf 2015-02-14 10:23:03 +01:00
  • ef151b0b30 Fixed handling of "//" in filenames in verilog pre-processor Clifford Wolf 2015-02-14 08:41:03 +01:00
  • 756b4064b2 Fixed "write_verilog -attr2comment" handling of "*/" in strings Clifford Wolf 2015-02-13 22:48:10 +01:00
  • a0a0594d1e hotfix in "check" command Clifford Wolf 2015-02-13 14:40:49 +01:00
  • 04cb947d6a Added "check" command Clifford Wolf 2015-02-13 14:34:51 +01:00
  • cd919abdf1 Added AstNode::simplify() recursion counter Clifford Wolf 2015-02-13 12:33:12 +01:00
  • 2f0edff019 Added EMCCFLAGS Clifford Wolf 2015-02-13 12:32:04 +01:00
  • d58c3eca3a Some test related fixes Clifford Wolf 2015-02-12 17:45:44 +01:00
  • 554a8df5e2 Added "proc_dlatch" Clifford Wolf 2015-02-12 16:56:01 +01:00
  • 87819c62fa Less aggressive "share" defaults Clifford Wolf 2015-02-10 20:51:37 +01:00
  • 4f68a77e3f Improved read_verilog support for empty behavioral statements Clifford Wolf 2015-02-10 12:17:29 +01:00
  • 510deb3577 Added "scc -expect <N> -nofeedback" Clifford Wolf 2015-02-10 08:48:55 +01:00
  • adf4ecbc1f Some hashlib improvements Clifford Wolf 2015-02-09 20:11:51 +01:00
  • 68979d1395 Various changes to release checklist Clifford Wolf 2015-02-09 16:36:37 +01:00
  • a779a09771 Fixed creation of command reference in manual Clifford Wolf 2015-02-09 13:24:29 +01:00
  • e0ff4d1152 We are now in 0.5+ development Clifford Wolf 2015-02-09 13:12:48 +01:00
  • c3c9fbfb8c Yosys 0.5 yosys-0.5 Clifford Wolf 2015-02-09 12:49:52 +01:00
  • 8901f405ca Bugfix in "make vcxsrc" Clifford Wolf 2015-02-09 12:48:15 +01:00
  • b944fef925 Updated command reference in manual Clifford Wolf 2015-02-09 12:05:02 +01:00
  • 85887de547 Various presentation fixes Clifford Wolf 2015-02-09 12:02:21 +01:00
  • f889e3d385 Fixed iterator invalidation bug in "rename" command Clifford Wolf 2015-02-09 00:18:36 +01:00