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4f74107e91
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install third party libraries to /usr/local/lib64 instead of /usr/local/lib
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2017-05-08 00:50:53 +02:00 |
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49054eef9f
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cleanup: removed trailing whitespaces in code
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2017-05-05 19:24:16 +00:00 |
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9b1e6a33ed
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add license to headers
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2017-04-27 13:20:20 +02:00 |
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5be1853649
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added GPL license to file headers
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2017-04-27 12:56:43 +02:00 |
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Georg Reinke
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f5aba31045
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remove libconfig references from libvillas-ext
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2017-04-26 11:58:12 +02:00 |
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9efd4dc000
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do not cast void pointers
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2017-03-27 12:58:40 +02:00 |
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644352538d
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move checks into *_check(), set default values in _init()
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2017-03-27 12:57:41 +02:00 |
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b1fdeac63f
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advio: fixed unit tests
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2017-03-25 21:13:45 +01:00 |
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edc1e0196d
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added new fpga_ip_type callbacks to differentiate between intialiazation and start of an IP core
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2017-03-25 21:13:07 +01:00 |
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1bb91ce8af
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added _vd and _vt members for struct fpga_ip (now in line with nodes, hooks, models, etc..)
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2017-03-25 21:10:25 +01:00 |
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2757011e1b
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several smaller fixes and documentation updates
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2017-03-12 17:13:37 -03:00 |
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cdd5a2ca90
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refactoring: unified states of common objects: nodes, paths, node-types, plugins, hooks, etc..
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2017-03-11 23:50:30 -03:00 |
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e27f0b699f
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several fixes for clean compilation
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2017-03-03 20:21:33 -04:00 |
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3e7c855526
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updated licence and copyright info in file headers
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2017-03-03 20:20:13 -04:00 |
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7ec6aee288
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Merge remote-tracking branch 'rwth/develop' into feature-curlio
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2017-02-18 11:05:11 -05:00 |
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7de25683d7
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fpga: refactored VILLASfpga node type
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2017-02-18 10:43:58 -05:00 |
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90cad8e829
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refactored FPGA VLNV parser / comparison code
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2017-02-15 17:57:45 -03:00 |
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5beb70d0c6
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Updated and modularised Makefiles
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2017-02-15 17:54:52 -03:00 |
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e9f8a50c3c
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introduce new plugin system for extensions
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2017-02-12 14:35:05 -03:00 |
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1dba01a8ae
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Re-license source code to LGPLv2.1 (closes #56)
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2016-11-22 11:14:25 -05:00 |
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b9f681751a
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fix compiler error
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2016-09-13 21:15:53 -04:00 |
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7f4f898b70
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fixed compiler warnings about uninitialized use
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2016-07-26 15:42:11 +02:00 |
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f6dd0b117b
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merged config-fpga.h into config.h
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2016-07-18 15:09:49 +02:00 |
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0cc67a892c
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improved configuration file parsing
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2016-07-11 11:36:23 +02:00 |
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abd8148a2b
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fixed compiler warnings
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2016-07-11 09:16:31 +02:00 |
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3f012c8575
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finished FPGA stuff
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2016-07-08 13:32:18 +02:00 |
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87bd0c3b8c
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reworked interrupt handling
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2016-07-08 13:31:23 +02:00 |
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88157a3023
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improved AXI4 switch configuration
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2016-07-08 13:01:40 +02:00 |
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ac389a76ff
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added DMA memory managment functions
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2016-07-08 12:59:09 +02:00 |
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87eb7c13e2
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removed obsolete BRAM IP driver
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2016-07-08 12:14:54 +02:00 |
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68f2dbea76
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major changes in the VILLASfpga code. Lots of smaller improvements and fixed
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2016-06-26 15:22:25 +02:00 |
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c67af15a2c
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fixed all major bugs in FPGA code
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2016-06-19 19:30:00 +02:00 |
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98fb370e85
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first steps towards flexible and configurable VILLASfpga / VILLASnode integration
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2016-06-15 20:05:09 +02:00 |
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bffb47dca8
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added VILLASfpga code
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2016-06-14 01:23:44 +02:00 |
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