1
0
Fork 0
mirror of https://git.rwth-aachen.de/acs/public/villas/node/ synced 2025-03-09 00:00:00 +01:00
Commit graph

345 commits

Author SHA1 Message Date
Niklas Eiling
590cef10d0 add check for missed interrupts when handling reads
introduce new struct Completion that is returned by Dma::readCompletion
and Dma::writeCompletion

Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2023-01-30 16:12:16 +01:00
Niklas Eiling
ab39f57405 add more configuration options to villas-fpga-ctrl
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2023-01-30 16:12:15 +01:00
Niklas Eiling
498af9fd1c ips/dma: make read correctly wait on interrupts
Modify villas-fpga-ctrl to fit the new behavior of Dma.
Makes reading from DMA work even when we are too slow and
only receive partial batches of BDs.

Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2023-01-30 16:12:15 +01:00
Niklas Eiling
5ab6007909 small code review
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2023-01-30 16:12:10 +01:00
Niklas Eiling
14f924b6c5 rework MemoryBlock use to make use of shared_ptr so the lifetime of the objects is properly tracked
this fixes that the wrong order of allocating and PciCard destruction
causes an undefined state.

Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2023-01-30 16:09:09 +01:00
Niklas Eiling
40d0452b0a move connectString parsing into separate class
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2023-01-30 16:02:32 +01:00
Niklas Eiling
b66733640a format and comment fixes
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2023-01-30 16:02:32 +01:00
Pascal Henry Bauer
f81a1ddc6d moved destructor to base class
Signed-off-by: Pascal Henry Bauer <pascal.bauer@rwth-aachen.de>
2023-01-27 16:57:31 +01:00
Pascal Henry Bauer
7f2ed2180d fixed formatting
Signed-off-by: Pascal Henry Bauer <pascal.bauer@rwth-aachen.de>
2023-01-27 14:04:22 +01:00
Pascal Henry Bauer
3587ccc0fa change pciecard name to pcie_card
Signed-off-by: Pascal Henry Bauer <pascal.bauer@rwth-aachen.de>
2023-01-26 18:30:14 +01:00
Pascal Henry Bauer
6b87c9bc30 refactor to use pcie card (Legacy)
Signed-off-by: Pascal Henry Bauer <pascal.bauer@rwth-aachen.de>
2023-01-26 18:30:14 +01:00
Pascal Henry Bauer
e8b593cf1f added card definitions
Signed-off-by: Pascal Henry Bauer <pascal.bauer@rwth-aachen.de>
2023-01-26 18:30:14 +01:00
Pascal Henry Bauer
7534086e08 change core to use base class card over pcieclass
Signed-off-by: Pascal Henry Bauer <pascal.bauer@rwth-aachen.de>
2023-01-26 18:30:14 +01:00
Pascal Henry Bauer
ae944b6ce3 added copyright information
Signed-off-by: Pascal Henry Bauer <pascal.bauer@rwth-aachen.de>
2023-01-26 18:30:14 +01:00
Pascal Henry Bauer
a10e568777 added pcieclass to buildsystem
Signed-off-by: Pascal Henry Bauer <pascal.bauer@rwth-aachen.de>
2023-01-26 18:30:14 +01:00
Pascal Henry Bauer
d2d7f9430d moved pciecard to own file
Signed-off-by: Pascal Henry Bauer <pascal.bauer@rwth-aachen.de>
2023-01-26 18:30:14 +01:00
Pascal Henry Bauer
e254e7cfe6 move card class to own file
Signed-off-by: Pascal Henry Bauer <pascal.bauer@rwth-aachen.de>
2023-01-26 17:08:19 +01:00
94cf3583d8 fix naming of fpgaHelper file
Signed-off-by: Steffen Vogel <post@steffenvogel.de>
2023-01-09 08:11:35 +01:00
9b27c31b9c fixup copyright texts
Signed-off-by: Steffen Vogel <post@steffenvogel.de>
2023-01-07 17:32:48 +01:00
f776cba693 relicense project to Apache 2.0
The project is now also REUSE compliant: https://reuse.software/
Previous copyright holders have provided their
acknowledgement to transition to the new license in the
following GitHub PR: https://github.com/VILLASframework/fpga/pull/66

Signed-off-by: Steffen Vogel <post@steffenvogel.de>
2023-01-07 17:20:15 +01:00
53ddbe4e10 refactor registration of IP core drivers to be aligned with registration of VILLASnode formats and node-types
Signed-off-by: Steffen Vogel <post@steffenvogel.de>
2023-01-05 14:21:20 +01:00
Niklas Eiling
c6a2629dff remove redundant and wrong comment
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2023-01-05 14:03:36 +01:00
Niklas Eiling
80af655ac5 make DMA ip unmap memory owned by itself
unmapping of the scatter gather attribute memory was done
after the DMA destructor was called, leading to Card trying to
unmap memory that was already freed.
This lead to crashing during cleaning up.

Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2023-01-04 17:17:21 +01:00
Niklas Eiling
a818bc0b64 combine functionalities of binaries into a single one
combine what was previously achieved by the separate binaries
villas-fpga-xbar-select and villas-fpga-cat into a single new
binary villas-fpga-ctl. Here we can select crossbar connections
via command line parameters. To avoid regression there are shell
scripts providing the old functionalities directly.

Currently the villas-fpga-pipe functionality is not supported,
because we still need to implement stdin input and routing that
to the fpga.

Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2023-01-04 17:16:35 +01:00
Niklas Eiling
f5b0762b1a make memory manager destroy IP objects and improve DMA logging
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2023-01-04 11:04:48 +01:00
Pascal Bauer
082dd40edb added class name before virtual method
Signed-off-by: Pascal Bauer <pascal.bauer@rwth-aachen.de>
2022-12-19 15:47:36 +01:00
Pascal Bauer
c77d124682 fixed allocation order
Signed-off-by: Pascal Bauer <pascal.bauer@rwth-aachen.de>
2022-12-19 15:47:36 +01:00
Pascal Bauer
a2b8b2942e fixed memory leak (missing deletes before return)
Signed-off-by: Pascal Bauer <pascal.bauer@rwth-aachen.de>
2022-12-19 15:47:35 +01:00
dee5b2d81f update Steffens mail address
Signed-off-by: Steffen Vogel <post@steffenvogel.de>
2022-12-14 17:44:17 +01:00
92ab5d078f remove aliases for smart pointers and lists
Signed-off-by: Steffen Vogel <post@steffenvogel.de>
2022-12-07 19:04:47 +01:00
Niklas Eiling
03f8d0782e Revert "core: move configuration of polling mode to parse()"
The changes lead to crashing because intc will not be configured
properly. Also revert removing configDone in ips/dma

This reverts commit 3b8949afe9.

Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2022-12-05 10:36:45 +01:00
c77a0d510a card: allow configuration of AXI-Stream switch paths
Signed-off-by: Steffen Vogel <post@steffenvogel.de>
2022-12-05 09:36:47 +01:00
c2437b51cf smaller code-style fixes
Signed-off-by: Steffen Vogel <post@steffenvogel.de>
2022-12-05 09:35:33 +01:00
3b8949afe9 core: move configuration of polling mode to parse()
Signed-off-by: Steffen Vogel <post@steffenvogel.de>
2022-12-05 09:35:32 +01:00
09af6d9e88 refactor Core::configure() to Core::parse()
Signed-off-by: Steffen Vogel <post@steffenvogel.de>
2022-12-05 09:35:32 +01:00
0959809573 code style fixes
Signed-off-by: Steffen Vogel <post@steffenvogel.de>
2022-12-05 09:35:32 +01:00
14c7e57a8a fix parsing of IP parameters
Signed-off-by: Steffen Vogel <post@steffenvogel.de>
2022-12-05 09:35:32 +01:00
Niklas Eiling
1fecb66fb3 bump common subrepo and use shared pointers for vfio::Container
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2022-12-05 09:31:37 +01:00
Niklas Eiling
74ad0783f6 bump common subrepo and use new interface
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2022-12-02 13:52:32 +01:00
Niklas Eiling
905d28d1e4 ips/dma: use destructor to reset DMA controller
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2022-12-02 13:52:31 +01:00
Niklas Eiling
0d0aae090d add villas-fpga-xbar-select; improve DMA parameters in ips/dma 2022-11-29 14:51:54 +01:00
Niklas Eiling
f105b08144 clean up and comment ips/dma.cpp 2022-11-29 14:51:53 +01:00
Niklas Eiling
0c6c30dda3 ips/dma: comment debug outputs to improve villas-fpga-cat performance
fix rebase artifacts
2022-11-29 14:51:53 +01:00
Niklas Eiling
e029963839 move helper functions from villas-fpga-pipe into separate file 2022-11-29 14:51:53 +01:00
ba16653820 minor code-style fixes 2022-11-11 05:03:43 -05:00
Niklas Eiling
e4a469f99f ips/dma: fix hasScatterGather using wrong member variable; Throw error used on unconfigured Dma 2022-11-11 04:53:58 -05:00
Niklas Eiling
49db359851 ips: fix some formatting issues 2022-11-11 04:53:58 -05:00
Niklas Eiling
dfb2a967d8 ips/dma: use NodeFactory's configureJson to setup memory graph 2022-11-11 04:53:58 -05:00
Niklas Eiling
7b4176a710 ips/dma: use json_unpack 2022-11-11 04:53:58 -05:00
Niklas Eiling
bac0b7309a add card config option "polling" to configure polling mode in IP cores; add json parsing of hwdef to dma IP core to replace hardcoded DMA settings. 2022-11-11 04:53:58 -05:00