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8 commits

Author SHA1 Message Date
Niklas Eiling
590cef10d0 add check for missed interrupts when handling reads
introduce new struct Completion that is returned by Dma::readCompletion
and Dma::writeCompletion

Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2023-01-30 16:12:16 +01:00
9b27c31b9c fixup copyright texts
Signed-off-by: Steffen Vogel <post@steffenvogel.de>
2023-01-07 17:32:48 +01:00
f776cba693 relicense project to Apache 2.0
The project is now also REUSE compliant: https://reuse.software/
Previous copyright holders have provided their
acknowledgement to transition to the new license in the
following GitHub PR: https://github.com/VILLASframework/fpga/pull/66

Signed-off-by: Steffen Vogel <post@steffenvogel.de>
2023-01-07 17:20:15 +01:00
eff0f2e83f fix RTDS IP unit test
Signed-off-by: Steffen Vogel <post@steffenvogel.de>
2023-01-05 14:21:20 +01:00
dee5b2d81f update Steffens mail address
Signed-off-by: Steffen Vogel <post@steffenvogel.de>
2022-12-14 17:44:17 +01:00
0e0197a3be fix coding style 2022-10-28 08:03:57 -04:00
9ef01d068e update year in copyright notices 2022-08-30 12:22:40 -04:00
a04c1d7abf ci: add cppcheck 2020-09-21 09:37:10 +02:00
Renamed from fpga/tests/rtds.cpp (Browse further)