Mirrors/VILLASnode
1
0
Fork 0
mirror of https://git.rwth-aachen.de/acs/public/villas/node/ synced 2025-03-09 00:00:00 +01:00
Code Issues Releases Wiki Activity
6135 commits 171 branches 31 tags 76 MiB
Commit graph

172 commits

Author SHA1 Message Date
Niklas Eiling
da96f8b585 fpga: improve comments in register.cpp 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-04-18 14:46:03 +02:00
Niklas Eiling
1a0c4a5ef0 fpga: fix includes and various comments 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-04-18 14:32:52 +02:00
Niklas Eiling
55070cd235 fpga: improve comments for fastRead and fastWrite 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-04-18 10:35:12 +02:00
Niklas Eiling
d08a79b49c fpga: expose methods for finer control over DMA data path 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-04-18 10:35:12 +02:00
Niklas Eiling
a2b7050fd1 fpga: improve dma latency 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-04-18 10:35:11 +02:00
Niklas Eiling
fdfa98359d fpga: turn off all interrupts when using polling 
this improves the latency by at least 4 us in my setup.

Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-04-18 10:34:17 +02:00
Niklas Eiling
25c021ee75 fpga: optimize sg descriptor rings 
we are now using only one memory block for both sg rings. This is
required so that the SG interface can benefit from a read cache

Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-04-18 10:34:17 +02:00
Niklas Eiling
c644c8f630 fpga: DMA: poll BD instead of hardware register 
polling HW is slow (>1us). Polling RAM is faster. This is a first implementation which only polls the first BD that is active. This is why this commit also removes the second read in nodes/fpga. This is not really useful anyways.

Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-03-14 16:07:45 +01:00
Niklas Eiling
ca03e1d406 fpga: enable using Xilinx xdma IP as DMA to AXI bridge as required for Ultrascale+ FPGAs 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-03-14 16:07:45 +01:00
Niklas Eiling
7f1fe8f742 fpga: default Dino rate should be 20kHz 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-03-14 16:07:45 +01:00
Steffen Vogel
dc436073a2 Use spaces for indention of C++ comments 
Signed-off-by: Steffen Vogel <post@steffenvogel.de>
 2024-02-29 23:18:47 +01:00
Steffen Vogel
3d73c759ea Reformat all code with clang-format 
Signed-off-by: Steffen Vogel <post@steffenvogel.de>
 2024-02-29 19:34:27 +01:00
Niklas Eiling
033634ac47 register: ignore strict aliasing for setting register as float 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-02-26 15:39:27 +01:00
Niklas Eiling
a3209aa344 use polling instead of interrupt 
but keep interrupts for i2c

Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-02-26 11:50:44 +01:00
Niklas Eiling
d588f5f2a2 dino: use enum instead of literal for GAIN 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-02-26 11:50:44 +01:00
Niklas Eiling
fb742dddd1 register: increase register num to 8 
the VHDL changed so we need to change register here too

Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-02-26 11:50:44 +01:00
Niklas Eiling
ee068621e6 ips/register: add default config for Dino 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-02-14 14:20:33 +01:00
Niklas Eiling
d54e4eb3f0 ips/register: add IP for the new register interface 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-02-14 14:20:33 +01:00
Niklas Eiling
1bb6c221f6 ips/dma: fix memory leak in libxil code by explicitly calling free on 
CyclicBd

Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-02-14 14:20:33 +01:00
Niklas Eiling
c730412e98 ips/intc: move deinit to stop instead of destructor 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-02-14 14:20:33 +01:00
Niklas Eiling
2c72af935a ips/i2c: move deinit to stop instead of destructor 
accessing register space from destructor can cause use after free errors

Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-02-14 14:20:33 +01:00
Niklas Eiling
6e1783612d ips/intc: remove access to xilinx driver in case we are using VFIO 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-02-07 18:21:45 +01:00
Niklas Eiling
d6fd533f0c ips/dma: make interrupt handling more robust 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-02-07 18:21:45 +01:00
Niklas Eiling
e505bfb5d9 ips/dma: reformat and make more robust 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-02-07 18:21:45 +01:00
Niklas Eiling
f2db38fe44 ip/switch: reformat and add function that prints current switch config 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-02-07 18:21:45 +01:00
Niklas Eiling
7c6d350eb0 format and increase robustness of interuppt handling 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-02-07 18:21:45 +01:00
Niklas Eiling
8b95182b08 automatically configure and test Dino based on hwdef json 
this currently requires manually adding the mapping of Dinos to i2c
buses in the fpga json.

Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-01-09 17:14:05 +01:00
Niklas Eiling
b5682290c2 I2c: use Switch::selfTest to check i2c bus 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-01-09 17:14:05 +01:00
Niklas Eiling
d4a868ae7c Dino: add debug output for direction registers of io extender 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-01-09 17:14:05 +01:00
Niklas Eiling
db062f08bd Dino: overload operator>> for IoextPorts 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-01-09 17:14:05 +01:00
Niklas Eiling
60c65c2880 verify more assumptions in i2c 
add selftest to I2c and readback Dino configuration to verify it was
actually set

Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-01-09 17:14:05 +01:00
Niklas Eiling
335dd2c0ce fix bug where Dino IP always read 0 from i2c. Add hardware mutex to I2c 
and to I2c::Switch

Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-01-09 17:14:05 +01:00
Niklas Eiling
acaa4dd9de improve i2c IP 
more code reuse, add function for reading from a register i.e. combined
write and read

Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-01-09 17:14:05 +01:00
Niklas Eiling
08b666a548 make I2c destructor call to I2c::reset explicit 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-01-09 17:14:05 +01:00
Niklas Eiling
dbe4e4e472 add i2c configuration logic to dino IP 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-01-09 17:14:05 +01:00
Niklas Eiling
810b1259f8 fix double start of i2c bus driver and move channel map to header 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-01-09 17:14:05 +01:00
Niklas Eiling
48846ace39 i2c: add handling of BusNotBusy interrupt on reads. add retrying of 
channel reads in case inconsistent state was detected.

Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-01-09 17:14:05 +01:00
Niklas Eiling
57177c074e fix several issues with i2c implementation and add support for 
interacting with i2c switches

Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-01-09 17:14:05 +01:00
Niklas Eiling
1578a26915 i2c: fix missing getMemoryBlocks method leading to unmapped memory 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-01-09 17:14:05 +01:00
Niklas Eiling
d34ab182e4 fix unmapped ring buffers in dma.cpp leading to segfault 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-01-09 17:14:05 +01:00
Niklas Eiling
7e07da6e60 add i2c ip draft 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-01-09 17:14:05 +01:00
Niklas Eiling
d61337023e add draft for i2c drvier implementation 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2023-12-13 15:17:26 +01:00
Niklas Eiling
654ee84e9e make FPGA device interface agnostic 
remove explicit mentioning of PCIe in the use of Device as a preparation
for integrating platform devices. auto formatted some files.

Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2023-12-12 14:08:34 +01:00
Steffen Vogel
157d5b21d7 Make REUSE copyright notice the same as in other VILLASframework projects and fix comments (#82) 
This edits the headers in every file so the copyright notice mentions RWTH Aachen University. We also update some copyright years and fix various comments so the header is the same across all of VILLASframework.

* Harmonize comment and code-style

Signed-off-by: Steffen Vogel <steffen.vogel@opal-rt.com>

* Harmonize comment and code-style

Signed-off-by: Steffen Vogel <steffen.vogel@opal-rt.com>

---------

Signed-off-by: Steffen Vogel <steffen.vogel@opal-rt.com>
 2023-09-08 11:35:18 +02:00
Niklas Eiling
7847658548 fix output formatting not being able to print numbers larger than 9 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2023-03-20 15:35:38 +01:00
Niklas Eiling
e6f035cd31 add basic thread-safety to ips/dma 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2023-01-30 16:12:16 +01:00
Niklas Eiling
590cef10d0 add check for missed interrupts when handling reads 
introduce new struct Completion that is returned by Dma::readCompletion
and Dma::writeCompletion

Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2023-01-30 16:12:16 +01:00
Niklas Eiling
498af9fd1c ips/dma: make read correctly wait on interrupts 
Modify villas-fpga-ctrl to fit the new behavior of Dma.
Makes reading from DMA work even when we are too slow and
only receive partial batches of BDs.

Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2023-01-30 16:12:15 +01:00
Niklas Eiling
14f924b6c5 rework MemoryBlock use to make use of shared_ptr so the lifetime of the objects is properly tracked 
this fixes that the wrong order of allocating and PciCard destruction
causes an undefined state.

Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2023-01-30 16:09:09 +01:00
Pascal Henry Bauer
3587ccc0fa change pciecard name to pcie_card 
Signed-off-by: Pascal Henry Bauer <pascal.bauer@rwth-aachen.de>
 2023-01-26 18:30:14 +01:00