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Author SHA1 Message Date
Niklas Eiling
08f109b924 update fpga subrepo so we can use the new std::filesystem free API 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-02-26 17:10:57 +01:00
Steffen Vogel
226ccecd19 Remove usage of std::filesystem 
Signed-off-by: Steffen Vogel <steffen.vogel@opal-rt.com>
 2024-02-26 17:10:57 +01:00
Niklas Eiling
542132de92 add API for createCards without std::filesystem 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-02-26 16:53:38 +01:00
Niklas Eiling
033634ac47 register: ignore strict aliasing for setting register as float 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-02-26 15:39:27 +01:00
Niklas Eiling
8a40b873be register: fix wrong fomatter declaration 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-02-26 15:11:58 +01:00
Niklas Eiling
d24a323e5c utils: remove cards from createCard 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-02-26 11:50:44 +01:00
Niklas Eiling
a3209aa344 use polling instead of interrupt 
but keep interrupts for i2c

Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-02-26 11:50:44 +01:00
Niklas Eiling
d588f5f2a2 dino: use enum instead of literal for GAIN 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-02-26 11:50:44 +01:00
Niklas Eiling
fb742dddd1 register: increase register num to 8 
the VHDL changed so we need to change register here too

Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-02-26 11:50:44 +01:00
Niklas Eiling
4b7ed781c0 card: add API to create a single card 
this is a preparation for allowing defining the card in the node config
rather than separately.

Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-02-26 11:50:44 +01:00
Niklas Eiling
ee068621e6 ips/register: add default config for Dino 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-02-14 14:20:33 +01:00
Niklas Eiling
dc270de8f0 update common subrepo 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-02-14 14:20:33 +01:00
Niklas Eiling
d54e4eb3f0 ips/register: add IP for the new register interface 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-02-14 14:20:33 +01:00
Niklas Eiling
1bb6c221f6 ips/dma: fix memory leak in libxil code by explicitly calling free on 
CyclicBd

Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-02-14 14:20:33 +01:00
Niklas Eiling
b0ccbddc6f card: call stop on all ips when destructor is called 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-02-14 14:20:33 +01:00
Niklas Eiling
c730412e98 ips/intc: move deinit to stop instead of destructor 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-02-14 14:20:33 +01:00
Niklas Eiling
2c72af935a ips/i2c: move deinit to stop instead of destructor 
accessing register space from destructor can cause use after free errors

Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-02-14 14:20:33 +01:00
Niklas Eiling
2a74f7e8c2 add register interface to dino bitstream and make the necessary changes 
to jsons and hwh parser

Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-02-14 14:20:33 +01:00
Steffen Vogel
272a3fac36 Fix include order 
Signed-off-by: Steffen Vogel <steffen.vogel@opal-rt.com>
 2024-02-14 10:09:52 +01:00
Steffen Vogel
c1410ef8a8 Fix formatting using clang-format 
Signed-off-by: Steffen Vogel <steffen.vogel@opal-rt.com>
 2024-02-14 10:09:52 +01:00
Steffen Vogel
0be29ffcab python: Pin dependencies 
Signed-off-by: Steffen Vogel <steffen.vogel@opal-rt.com>
 2024-02-13 16:23:02 +01:00
Steffen Vogel
b4fcd0c566 decvontainer: Fix formatting 
Signed-off-by: Steffen Vogel <steffen.vogel@opal-rt.com>
 2024-02-13 16:23:02 +01:00
Steffen Vogel
dd72179a35 python: Fix formatting 
Signed-off-by: Steffen Vogel <steffen.vogel@opal-rt.com>
 2024-02-13 16:23:02 +01:00
Steffen Vogel
e30e361c31 devcontainer: Do not use unsupported variable substitution 
Signed-off-by: Steffen Vogel <steffen.vogel@opal-rt.com>
 2024-02-13 16:23:02 +01:00
Steffen Vogel
9b3a33f31b Remove unused C++20 include which breaks build on C++17 compilers 
Signed-off-by: Steffen Vogel <steffen.vogel@opal-rt.com>
 2024-02-13 16:23:02 +01:00
Steffen Vogel
2f15e151b4 deps: Do now show Git warning about detached HEAD state 
Signed-off-by: Steffen Vogel <steffen.vogel@opal-rt.com>
 2024-02-13 16:23:02 +01:00
Steffen Vogel
d544ab70bc Fix typo in README 
Signed-off-by: Steffen Vogel <steffen.vogel@opal-rt.com>
 2024-02-13 16:23:02 +01:00
Niklas Eiling
f699179ef7 add docker tag to reuse step 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-02-08 11:19:51 +01:00
Niklas Eiling
eeb933854c update fpga subrepo 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-02-08 11:19:51 +01:00
Niklas Eiling
eb450eb650 update common and fpga submodules 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-02-08 11:19:51 +01:00
Niklas Eiling
4ca9c88bd0 fpga: add note about wrong cast 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-02-08 11:19:51 +01:00
Niklas Eiling
97a391c271 update fpga submodule 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-02-08 11:19:51 +01:00
Niklas Eiling
18aa0c8862 rework fpga node type 
The various changes in fpga require a rewrite of the fpga node type.
To allow relative paths for the fpga config file, Config and SuperNode
had to be modified so they store the path of the main config file.
The syntax of the fpga node type configuration has changed - the example
config in etc has been modified accordingly.

Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-02-08 11:19:51 +01:00
Niklas Eiling
f09e6e909b fix possible segfault due to non-functional range check with unsigned int 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-02-08 11:19:51 +01:00
Niklas Eiling
535560d39d ci: fix errors when building docker container on non-master branch 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-02-07 18:21:45 +01:00
Niklas Eiling
a0fc73f2ee villas-fpga-ctrl: return to old loggers 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-02-07 18:21:45 +01:00
Niklas Eiling
6e1783612d ips/intc: remove access to xilinx driver in case we are using VFIO 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-02-07 18:21:45 +01:00
Niklas Eiling
d6fd533f0c ips/dma: make interrupt handling more robust 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-02-07 18:21:45 +01:00
Niklas Eiling
e505bfb5d9 ips/dma: reformat and make more robust 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-02-07 18:21:45 +01:00
Niklas Eiling
13ba256e4a update common submodule 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-02-07 18:21:45 +01:00
Niklas Eiling
f2db38fe44 ip/switch: reformat and add function that prints current switch config 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-02-07 18:21:45 +01:00
Niklas Eiling
7c6d350eb0 format and increase robustness of interuppt handling 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-02-07 18:21:45 +01:00
Niklas Eiling
edb996ebfd add fmt::formatter for Dino::IoextPorts 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-02-07 18:21:45 +01:00
Niklas Eiling
645429b9c8 lib/CMakeLists.txt: fix error in syntax 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-01-12 12:01:51 +01:00
Niklas Eiling
b2fcfeaa67 move more of the switch configuration boilerplate into ConnectString 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-01-12 11:46:59 +01:00
Niklas Eiling
147725daef libvillas-fpga.so: only link with stdc++fs for gcc8 and earlier 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-01-12 11:46:59 +01:00
Niklas Eiling
ca6c70e09b ConnectString: Make channel data type more generic 
we can not only connect Aurora channels to the switch so use Node
instead as the data type

Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-01-12 11:46:59 +01:00
Niklas Eiling
1c2d8e440b update and reformat villas-fpga-ctrl 
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-01-09 17:14:05 +01:00
Niklas Eiling
897d916886 Core/Card: enable IP init requiring other IPs 
add initialized IP to card->ips already during initialization so that
later IPs can use early initiliazed IPs to do their initilization.
E.g. Dino needs I2c for initialization.

Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-01-09 17:14:05 +01:00
Niklas Eiling
8b95182b08 automatically configure and test Dino based on hwdef json 
this currently requires manually adding the mapping of Dinos to i2c
buses in the fpga json.

Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
 2024-01-09 17:14:05 +01:00