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80abbb866b
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add latest vc707 config
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2022-10-27 06:01:42 -04:00 |
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9ef01d068e
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update year in copyright notices
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2022-08-30 12:22:40 -04:00 |
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28262ef79b
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remove old configs
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2022-08-30 12:21:45 -04:00 |
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53c4c4bf77
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remove obsolete htdocs setting
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2022-03-04 03:30:42 -05:00 |
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Hatim Kanchwala
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89f75c9a57
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Remove old JSON config files
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2020-07-04 15:11:00 +02:00 |
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Hatim Kanchwala
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73e85f2e5a
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Add intial header file for Aurora
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2020-05-26 14:46:35 +02:00 |
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dd1a17c4a5
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update bitstream configs
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2019-08-15 13:57:29 +02:00 |
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2112038d70
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Merge branch 'feature/hls-rtds2gpu' into develop
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2018-08-21 13:51:32 +02:00 |
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7fd6599ea6
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update copyright years
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2018-06-25 15:33:14 +02:00 |
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Daniel Krebs
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194c4e3eef
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etc: update fpga.json with changes related to stream routing
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2018-06-04 17:36:36 +02:00 |
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Daniel Krebs
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5c67dc3727
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rtds2gpu: update vlnv to match v1.1 and adapt config to new bitstream
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2018-06-04 17:36:15 +02:00 |
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Daniel Krebs
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bf286568dd
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rtds2gpu IP works
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2018-06-04 17:36:15 +02:00 |
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Daniel Krebs
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68e5481d97
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config: new config for changed bitstream
AXI-BAR0 on PCIe bridge now allows access to whole PCI address space.
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2018-05-15 18:04:24 +02:00 |
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Daniel Krebs
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73c6ae1f71
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hwdef-parse: follow OR-gate merging DMA interrupts
Also update JSON config with the new output.
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2018-02-14 14:34:03 +01:00 |
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Daniel Krebs
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95adaad32f
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etc/json: update config file with current output of hwdef-parse
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2018-02-14 07:26:39 +01:00 |
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daniel-k
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92aea92f19
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etc: update fpga.json with output of hwdef-parse
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2018-01-23 14:43:53 +01:00 |
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daniel-k
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f94476b716
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ip/node: rename OtherIpNode to StreamPort and other to to
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2018-01-10 11:02:08 +01:00 |
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daniel-k
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4d3e4dd931
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ips: make irqs a list
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2018-01-10 11:02:08 +01:00 |
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daniel-k
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12024d53e5
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lib/ip-node: add IpNode class, IpCore which has streaming ports
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2018-01-10 11:02:08 +01:00 |
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daniel-k
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a5b5e317d4
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wip implementing dependency parsing and proper memeory handling
works and compiles so for. next is to implement different IP interfaces
(Model, Interface, DataMover, Infrastructure, ...)
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2018-01-10 11:02:08 +01:00 |
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daniel-k
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eeafb2bcc6
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etc/fpga: card is in slot 03:00.0 currently
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2017-11-28 12:06:26 +01:00 |
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daniel-k
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c67c8aac5b
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tests: add fpga.json and correctly parse it for unit tests
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2017-11-22 19:46:07 +01:00 |
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c3164e93ef
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imported source code from VILLASfpga repo and made it compile
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2017-11-21 21:31:08 +01:00 |
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