There is a bug wherein the DMA listening to RX empty status goes busy
if RX FIFO clear bit is set in the FIFO control register, even if there
is no transfer request. So switch to I/O mode always to clear RX FIFO and
restore the mode in the end.
Signed-off-by: Harini Katakam <harinik@xilinx.com>
This patch documented the parameters of XQspiPsu_SelectFlash API
to remove doxygen warnings and modified the xqspipsu.h file
header as number of characters in a line are more than usual.
Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com>
This patch does following things
1. Added IO mode support for qspipsu.
2. Modified the GenFifoEntryData API since unaligned data should
be the last entry in GenFifo.
Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com>
