Bit 21 of DPTX register PHY_CONFIG (0x200) enables 8b10b encoding.
In v6.0 of the DPTX core, the default value is '1'.
Current driver should keep this value untouched when writing to the PHY_CONFIG
register.
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
It seems that monitors capable of MST, upon switching to SST mode in the monitor
options menu, respond with NACK when the segment pointer is written.
These same monitors ACK segment pointer writes when running in MST mode.
Tested monitors that are SST only monitors also ACK segment pointer writes.
The issue here is that MST monitors running in SST mode will error out when the
I2C read function is called because the segment pointer is always being written
to 0 (segment pointer is reset), and thus receives a NACK.
This patch prevents this from happening.
From now on, if the user changes the segment pointer, it is up to them to reset
it to 0.
The I2C read will only increment the segment pointer when required to do a read
outside of the base EDID block.
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
Added frame rate into DisplayPort calculations to follow updates for the
commone video driver.
Note, this is the deprecated TX-only driver for DisplayPort (the TX-only driver,
dptx_v3_0, and the unified TX-RX driver, dp_v1_0, are both released for 2015.1).
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
Since the check link status function is no longer being called within the
establish link function, some additional assertions need to be done.
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
Use burst writes when possible.
- Detached writing the voltage swing and preemphasis settings to the core from
writing to the sink using AUX writes. Now, a pointer to an array is taken as an
argument and the array is modified with the data to write over AUX. This allows
preparation of a burst write when the voltage swing and preemphasis settings can
be written at the same time as another adjacent DPCD access.
The scrambler is now enabled/disabled while writing the training patterns.
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
Previously, the establish link function was checking the status of all lanes and
only retraining if the link isn't trained. This results in no retraining if the
application reduces the lane count.
The link should always be retrained on a change in lane count.
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
Previously, the PHY status for all lanes was being checked. This results in the
driver thinking that the PHY never comes out of reset if the core is limited to
a maximum lane count of 1 or 2 at the time the core is initialized.
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
The sink reordering would fail on retrieval of tiling information from a sink
that does not have a Tiled Display Topology (TDT) data block. This behavior is
incorrect since subsequent sinks may be a part of a tiled display.
Modified the function to be void.
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
Added functionality that reorders the sink list such that topologies containing
tiled display(s) will have the contained sinks reordered in a consistent manner.
The need for such functionality exists because not all tiled displays will have
the same internal topologies.
It was observed that two 4k2k MST based monitors (tiled display, 2 sinks) from
different manufacturers would have the left and right images swapped using
identical stream-to-sink mappings.
Thus, the need to obtain the tiled display topology information of all sinks and
their relative tile location is required to send the correct stream to the
desired sink.
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
These macros parse tile location, total horizontal and vertical tiles, and tile
order from the Tiled Display Topology section data block.
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
Given a sink, the function will attempt to retrieve the Tiled Display Topology
section data block which is part of the DisplayID structure.
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
The Tiled Display Topology (TDT) section data block is part of the DisplayID.
The driver currently supports DisplayID as an extension block to the base EDID
structure.
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
Given a sink, the function will attempt to retrieve an EDID extension block of
type DisplayID.
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
Created a file containing utility functions related to the Extended Display
Identification Information (EDID).
The initial functions included are used to fetch EDID blocks.
Block numbering starts with 0 being the base EDID block, and extension block
starting at 1.
EDID blocks are 128 bytes in size.
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
The 16-byte chunking is already done by XDptx_AuxCommon, so there is no need to
do it in XDptx_IicRead.
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
- Added function header comments for the remote I2C and remote DPCD read and
write functions.
- Updated the function header comments for immediate I2C and AUX read and write
functions.
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
Some monitors don't support sideband messages with IIC reads greater than 16
bytes. This improvement breaks up the higher-level read/write request into
multiple reads/writes that work with up to 16 bytes in size.
These higher-level remote IIC read/write functions also serve as a wrapper for
an IIC read/write in case that the link count total is equal to 1 (a read/write
request to the RX device directly connected to the TX (not "remote")).
Signed-off-by: Andrei-Liviu Simion <andrei.simion@xilinx.com>
