Commit graph

58 commits

Author SHA1 Message Date
4f5e2ce13b heading towards merging the 32/64 paging code 2014-05-14 18:56:15 +02:00
ff130c4538 moved VMA initialization of APIC and MultiProcessing related stuff to apic.c 2014-05-14 18:01:58 +02:00
44f6905e4d added missing vma region 2014-05-14 17:43:20 +02:00
6f5a7157bb rewrite of multiprocessing table parsing 2014-05-14 17:43:03 +02:00
8287ab79d3 fixed SMP with new paging code 2014-05-14 15:17:34 +02:00
39bb5e8d56 fixed mapping for APIC and IOAPIC 2014-02-18 11:06:13 +01:00
af9bda06f8 renamed mmu.h to memory.h as its not related to the MMU and contains
prototypes for memory.c
2014-01-09 16:20:18 +01:00
d5f60ef542 fixed two smaller bugs and some compiler warnings 2014-01-09 16:12:13 +01:00
403c529e8b fixed copy&paste bug and moved cpu initialization in cpu_init() 2013-10-16 17:50:37 +02:00
Stefan Lankes
8a7463883a disable IOAPIC's timer and add helper function to determine the version of the IOAPIC 2012-08-01 09:51:20 +02:00
Stefan Lankes
bb467767d0 enable the SMP support on systems with a X2APIC 2012-07-22 22:19:50 +02:00
Stefan Lankes
84945aee64 add MSR and X2APIC support 2012-07-22 13:16:17 +02:00
Stefan Lankes
ae1216f757 user a read barrier instead of a normal barrier to serialize calls of rdtsc 2012-07-19 08:28:23 +02:00
Stefan Lankes
4ebfbdf63d Merge branch 'master' into tickless 2012-07-14 13:28:08 -07:00
Stefan Lankes
764134bd18 remove bug by searching lapci on a 64bit system 2012-07-10 22:43:02 +02:00
Stefan Lankes
24914fcb4f add prototype of a tickless kernel
only by entering the kernel, the tick counter will be updated
=> by using this feature, MetalSVM supports only LwIP's raw interface,
   because we have no guarantee that the tcpip thread will get computation time
=> no NETCONN & BSD socket support
=> no load balancing support
2012-07-03 16:46:54 +02:00
Stefan Lankes
ab27285843 disable obsolete 64bit code 2012-06-13 11:22:38 +02:00
Stefan Lankes
e06d910514 enable SMP support for 64bit systems 2012-06-12 23:42:02 +02:00
Stefan Lankes
08bcc19626 enable full (64bit) APIC support
- no SMP support
2012-06-11 21:49:17 +02:00
Stefan Lankes
1e275732c5 simplify the APIC and GDT code 2012-06-10 23:40:22 +02:00
Stefan Lankes
654e91b0a2 add LAPIC support of the 64bit kernel 2012-06-10 21:38:01 +02:00
Stefan Lankes
e9ddfd0db2 dump current value of CR0 2011-09-22 21:36:29 +02:00
Stefan Lankes
35621d72d1 first try to realize task stealing 2011-08-18 12:16:31 +02:00
Stefan Lankes
387ef0ea9b cosmetic changes 2011-08-04 16:48:04 +02:00
Stefan Lankes
452aa3b1d1 cosmetic changes and add some scheduling statistics 2011-08-03 19:37:05 +02:00
Stefan Lankes
577300919c fix bug in search_apic and uses function to find the MP Config Table 2011-08-03 07:37:57 +02:00
Stefan Lankes
d91b0d49c2 minor bug fix
=> search the MP Config Table below 1MB
2011-08-02 18:29:20 +02:00
Stefan Lankes
27ee238684 search MP table on all systems 2011-07-31 19:15:06 +02:00
Stefan Lankes
ff2b9da103 do not longer search a MP table, if MAX_CORES is set to 1 2011-07-22 21:17:15 +02:00
Stefan Lankes
a422926dda cosmetic changes 2011-07-19 09:23:55 +02:00
Stefan Lankes
b1c5bf67c2 use a more robust method to find the MP table 2011-07-19 07:36:24 +02:00
Stefan Lankes
d203a070f4 add IPI support to flush the TLB on the other cores 2011-07-19 07:16:49 +02:00
Stefan Lankes
85768e6f58 fix bug in APIC code
=> before we enable the interrupts,  we map the APIC registers
2011-07-18 15:51:26 +02:00
Stefan Lankes
e595fae384 add SMP support
- this is experimental version
- by setting MAX_CORES to 1, you are to disable the SMP support
2011-07-18 09:14:28 +02:00
Stefan Lankes
47f37e3b00 use memory barriers instead of read memory barriers to determine the current TSC
=> more accurate caclculation of the timer frequency
+ minor cosmetic changes
2011-04-18 15:07:45 +02:00
Stefan Lankes
e3e06fe523 set APICID of the boot processor to 0 2011-04-08 16:02:29 +02:00
Stefan Lankes
ea5b7e4930 reset APIC before timer initialization 2011-04-08 16:02:01 +02:00
Stefan Lankes
e599063dd2 cosmetic changes 2011-04-05 11:37:20 +02:00
Stefan Lankes
b46664b375 increasing the readability 2011-04-05 11:33:41 +02:00
Stefan Lankes
e8abd6f336 minor improvements and cosmetic changes to increase the readability 2011-04-05 02:00:02 -07:00
Stefan Lankes
f14c693e10 fix bug in the routine, which calculates the apic timer frequecy 2011-04-01 00:24:03 -07:00
Stefan Lankes
f9ec7ccadc redesign of the SCC's init routines 2011-03-25 20:28:43 +01:00
Stefan Lankes
ec5c78fbb3 remove compiler warnings 2011-03-04 23:33:58 +01:00
Stefan Lankes
c21b1bf8a2 remove compiler warnings 2011-03-04 22:42:41 +01:00
Stefan Lankes
56ee331596 add nested spinlocks
- required to avoid deadlocks
2011-03-04 11:38:40 +01:00
Stefan Lankes
16efb49204 remove obsolete function arguments 2011-02-24 10:15:58 +01:00
Stefan Lankes
31ad08b7ae Remap lapic and ioapic to the kernel space + some cosmetic changes 2011-02-21 08:36:06 +01:00
stefan
810b13f37e - use the function lapic_read instead of direct memory access to the apic entries
git-svn-id: http://svn.lfbs.rwth-aachen.de/svn/scc/trunk/MetalSVM@370 315a16e6-25f9-4109-90ae-ca3045a26c18
2011-01-07 05:37:42 +00:00
stefan
9d2b73c6cb - add a workaround to use paging and the apic at the same time
(we don't use __attribute__((optimize(0))))


git-svn-id: http://svn.lfbs.rwth-aachen.de/svn/scc/trunk/MetalSVM@366 315a16e6-25f9-4109-90ae-ca3045a26c18
2011-01-05 20:12:07 +00:00
stefan
8646b56a63 - minor changes to support APIC
(currently, we got page fault by entering apic_calibration)
- first steps to realize a loader



git-svn-id: http://svn.lfbs.rwth-aachen.de/svn/scc/trunk/MetalSVM@365 315a16e6-25f9-4109-90ae-ca3045a26c18
2011-01-05 10:16:53 +00:00