Niklas Eiling
f688640059
fpga: use separate locks for write and read to allow them to be used concurrently
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Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2024-06-18 12:39:43 +02:00
Niklas Eiling
4017441bf3
fpga: use constants to access registers
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Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2024-06-18 12:39:43 +02:00
Niklas Eiling
851f66050c
fpga: convert SignalType to string before printing
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Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2024-06-18 12:39:43 +02:00
Niklas Eiling
bb57c75a4b
fpga: move register config for dino to DinoAdc
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Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2024-06-18 12:39:43 +02:00
Niklas Eiling
ddbe16c841
fpga: fix empty search path being an error
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Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2024-06-18 12:39:43 +02:00
7f857f392c
Fix formatting
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Signed-off-by: Steffen Vogel <post@steffenvogel.de>
2024-06-18 12:39:43 +02:00
Niklas Eiling
a6751c4c6e
fpga: improve comments in register.cpp
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Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2024-06-18 12:39:42 +02:00
Niklas Eiling
28c24ea22a
fpga: fix includes and various comments
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Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2024-06-18 12:39:42 +02:00
Niklas Eiling
0ae08e8434
fpga: improve comments for fastRead and fastWrite
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Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2024-06-18 12:39:42 +02:00
Niklas Eiling
3e525d075b
fpga: expose methods for finer control over DMA data path
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Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2024-06-18 12:39:42 +02:00
Niklas Eiling
f67ca37b0c
fpga: improve dma latency
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Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2024-06-18 12:39:42 +02:00
Niklas Eiling
937cdda11f
fpga: turn off all interrupts when using polling
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this improves the latency by at least 4 us in my setup.
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2024-06-18 12:39:42 +02:00
Niklas Eiling
69b5425c0c
fpga: optimize sg descriptor rings
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we are now using only one memory block for both sg rings. This is
required so that the SG interface can benefit from a read cache
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2024-06-18 12:39:42 +02:00
714db711db
Remove unused includes and variables
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Signed-off-by: Steffen Vogel <post@steffenvogel.de>
2024-06-18 12:39:42 +02:00
Niklas Eiling
dae9b5d6bc
fpga: make Dino and Aurora IPs optional in utils
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Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2024-06-18 12:39:42 +02:00
Niklas Eiling
d9b3bdb0de
fpga: DMA: poll BD instead of hardware register
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polling HW is slow (>1us). Polling RAM is faster. This is a first implementation which only polls the first BD that is active. This is why this commit also removes the second read in nodes/fpga. This is not really useful anyways.
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2024-06-18 12:39:42 +02:00
Niklas Eiling
2f0a10c49b
fpga: enable using Xilinx xdma IP as DMA to AXI bridge as required for Ultrascale+ FPGAs
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Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2024-06-18 12:39:42 +02:00
Niklas Eiling
06201c94fa
fpga: default Dino rate should be 20kHz
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Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2024-06-18 12:39:42 +02:00
Niklas Eiling
214e45c636
fpga: fpga::createCards not finding a config is not an error
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Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2024-06-18 12:39:42 +02:00
dc436073a2
Use spaces for indention of C++ comments
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Signed-off-by: Steffen Vogel <post@steffenvogel.de>
2024-02-29 23:18:47 +01:00
4b36073711
Use spaces for indention of CMake files
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Signed-off-by: Steffen Vogel <post@steffenvogel.de>
2024-02-29 23:18:47 +01:00
3d73c759ea
Reformat all code with clang-format
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Signed-off-by: Steffen Vogel <post@steffenvogel.de>
2024-02-29 19:34:27 +01:00
a2abaa3cda
Merge project files, scripts and CMake files of VILLASfpga
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Signed-off-by: Steffen Vogel <post@steffenvogel.de>
2024-02-29 19:33:23 +01:00
Niklas Eiling
542132de92
add API for createCards without std::filesystem
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Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2024-02-26 16:53:38 +01:00
Niklas Eiling
033634ac47
register: ignore strict aliasing for setting register as float
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Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2024-02-26 15:39:27 +01:00
Niklas Eiling
d24a323e5c
utils: remove cards from createCard
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Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2024-02-26 11:50:44 +01:00
Niklas Eiling
a3209aa344
use polling instead of interrupt
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but keep interrupts for i2c
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2024-02-26 11:50:44 +01:00
Niklas Eiling
d588f5f2a2
dino: use enum instead of literal for GAIN
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Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2024-02-26 11:50:44 +01:00
Niklas Eiling
fb742dddd1
register: increase register num to 8
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the VHDL changed so we need to change register here too
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2024-02-26 11:50:44 +01:00
Niklas Eiling
4b7ed781c0
card: add API to create a single card
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this is a preparation for allowing defining the card in the node config
rather than separately.
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2024-02-26 11:50:44 +01:00
Niklas Eiling
ee068621e6
ips/register: add default config for Dino
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Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2024-02-14 14:20:33 +01:00
Niklas Eiling
d54e4eb3f0
ips/register: add IP for the new register interface
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Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2024-02-14 14:20:33 +01:00
Niklas Eiling
1bb6c221f6
ips/dma: fix memory leak in libxil code by explicitly calling free on
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CyclicBd
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2024-02-14 14:20:33 +01:00
Niklas Eiling
b0ccbddc6f
card: call stop on all ips when destructor is called
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Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2024-02-14 14:20:33 +01:00
Niklas Eiling
c730412e98
ips/intc: move deinit to stop instead of destructor
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Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2024-02-14 14:20:33 +01:00
Niklas Eiling
2c72af935a
ips/i2c: move deinit to stop instead of destructor
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accessing register space from destructor can cause use after free errors
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2024-02-14 14:20:33 +01:00
Niklas Eiling
6e1783612d
ips/intc: remove access to xilinx driver in case we are using VFIO
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Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2024-02-07 18:21:45 +01:00
Niklas Eiling
d6fd533f0c
ips/dma: make interrupt handling more robust
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Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2024-02-07 18:21:45 +01:00
Niklas Eiling
e505bfb5d9
ips/dma: reformat and make more robust
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Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2024-02-07 18:21:45 +01:00
Niklas Eiling
f2db38fe44
ip/switch: reformat and add function that prints current switch config
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Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2024-02-07 18:21:45 +01:00
Niklas Eiling
7c6d350eb0
format and increase robustness of interuppt handling
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Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2024-02-07 18:21:45 +01:00
Niklas Eiling
645429b9c8
lib/CMakeLists.txt: fix error in syntax
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Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2024-01-12 12:01:51 +01:00
Niklas Eiling
b2fcfeaa67
move more of the switch configuration boilerplate into ConnectString
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Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2024-01-12 11:46:59 +01:00
Niklas Eiling
147725daef
libvillas-fpga.so: only link with stdc++fs for gcc8 and earlier
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Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2024-01-12 11:46:59 +01:00
Niklas Eiling
ca6c70e09b
ConnectString: Make channel data type more generic
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we can not only connect Aurora channels to the switch so use Node
instead as the data type
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2024-01-12 11:46:59 +01:00
Niklas Eiling
897d916886
Core/Card: enable IP init requiring other IPs
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add initialized IP to card->ips already during initialization so that
later IPs can use early initiliazed IPs to do their initilization.
E.g. Dino needs I2c for initialization.
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2024-01-09 17:14:05 +01:00
Niklas Eiling
8b95182b08
automatically configure and test Dino based on hwdef json
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this currently requires manually adding the mapping of Dinos to i2c
buses in the fpga json.
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2024-01-09 17:14:05 +01:00
Niklas Eiling
b5682290c2
I2c: use Switch::selfTest to check i2c bus
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Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2024-01-09 17:14:05 +01:00
Niklas Eiling
d4a868ae7c
Dino: add debug output for direction registers of io extender
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Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2024-01-09 17:14:05 +01:00
Niklas Eiling
db062f08bd
Dino: overload operator>> for IoextPorts
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Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2024-01-09 17:14:05 +01:00
