Niklas Eiling
3e64e5d238
hwdef-parse.py: add interrupt controller added as module_ref to
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whitelist
Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2024-01-09 17:14:05 +01:00
Niklas Eiling
ba71f6384f
hwdef-parse.py: add SPDX compliant license info
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Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2023-12-13 15:11:26 +01:00
Niklas Eiling
ada7cac017
hwdef-parse.py: whitelist iic and DINO IPs
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Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2023-12-13 15:11:26 +01:00
Niklas Eiling
e2382c643b
add hwdef-parse script from hardware repo
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Signed-off-by: Niklas Eiling <niklas.eiling@eonerc.rwth-aachen.de>
2023-12-13 15:11:26 +01:00
2ad5fc1ccf
remove broken symlink
2022-10-27 06:01:55 -04:00
8bb033f89d
update hardware submodule and move hwdef-parse script into hardware repo
2020-07-08 14:14:38 +02:00
2112038d70
Merge branch 'feature/hls-rtds2gpu' into develop
2018-08-21 13:51:32 +02:00
7409d2024d
add more copyright / license headers
2018-06-25 17:03:09 +02:00
Daniel Krebs
bf286568dd
rtds2gpu IP works
2018-06-04 17:36:15 +02:00
Daniel Krebs
63df68480f
scripts/hwdef-parse: promote fifo to stream IP and populate all switch ports
2018-06-04 14:20:06 +02:00
Daniel Krebs
01803abade
hwdef-parse: parse PCI and AXI BARs
2018-05-15 18:04:24 +02:00
Daniel Krebs
73c6ae1f71
hwdef-parse: follow OR-gate merging DMA interrupts
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Also update JSON config with the new output.
2018-02-14 14:34:03 +01:00
Daniel Krebs
be3538f697
hwdef-parse: fix switch/num_port to be an integer
2018-02-14 07:26:39 +01:00
Daniel Krebs
44ad827121
hwdef-parse: treat PCIe bridge the same as all other IPs
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This is needed in order to construct a global memory graph.
2018-02-14 07:26:39 +01:00
daniel-k
bbff2c9a88
hwdef-parse: count total switch ports and populate property
2018-01-23 14:41:31 +01:00
daniel-k
fb37253623
hwdef-parse: populate all memory ranges based on name
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This used to overwrite earlier memory ranges because the same was
used ('baseaddr', 'highaddr'). Now, deduce name from BASENAME and
remove prefix `C_`.
2018-01-23 14:38:12 +01:00
daniel-k
02ea98dd97
hwdef-parse: add port name
2018-01-23 12:30:54 +01:00
daniel-k
df93004720
scripts/hwdef-parse: include intc instance name in irq ports
2018-01-17 17:00:00 +01:00
daniel-k
935fa847aa
scripts/hwdef-parse: update ports format
2018-01-17 16:51:02 +01:00
daniel-k
4db0a98082
scripts/hwdef-parse: add memory view for each instance
2018-01-17 16:51:02 +01:00
daniel-k
f5a3c8c712
scripts/hwdef-parse: only set irqs and ports if there are any
2018-01-17 16:31:47 +01:00
c3164e93ef
imported source code from VILLASfpga repo and made it compile
2017-11-21 21:31:08 +01:00
